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1 | ## |
2 | ## This file is part of the libsigrokdecode project. | |
3 | ## | |
4 | ## Copyright (C) 2017 Karl Palsson <karlp@etactica.com> | |
5 | ## | |
6 | ## Permission is hereby granted, free of charge, to any person obtaining a copy | |
7 | ## of this software and associated documentation files (the "Software"), to deal | |
8 | ## in the Software without restriction, including without limitation the rights | |
9 | ## to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
10 | ## copies of the Software, and to permit persons to whom the Software is | |
11 | ## furnished to do so, subject to the following conditions: | |
12 | ## | |
13 | ## The above copyright notice and this permission notice shall be included in all | |
14 | ## copies or substantial portions of the Software. | |
15 | ## | |
16 | ## THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | ## IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | ## FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE | |
19 | ## AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | ## LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
21 | ## OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | |
22 | ## SOFTWARE. | |
23 | ||
24 | import math | |
25 | import sigrokdecode as srd | |
26 | from .lists import * | |
27 | ||
28 | class Decoder(srd.Decoder): | |
b197383c | 29 | api_version = 3 |
888790e9 UH |
30 | id = 'ade77xx' |
31 | name = 'ADE77xx' | |
32 | longname = 'Analog Devices ADE77xx' | |
e439018a KP |
33 | desc = 'Poly phase multifunction energy metering IC protocol.' |
34 | license = 'mit' | |
35 | inputs = ['spi'] | |
888790e9 | 36 | outputs = ['ade77xx'] |
e439018a KP |
37 | annotations = ( |
38 | ('read', 'Register read commands'), | |
39 | ('write', 'Register write commands'), | |
40 | ('warning', 'Warnings'), | |
41 | ) | |
42 | annotation_rows = ( | |
43 | ('read', 'Read', (0,)), | |
44 | ('write', 'Write', (1,)), | |
45 | ('warnings', 'Warnings', (2,)), | |
46 | ) | |
47 | ||
1f953c5d | 48 | def reset_data(self): |
e439018a | 49 | self.expected = 0 |
abf9deff | 50 | self.mosi_bytes, self.miso_bytes = [], [] |
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51 | |
52 | def __init__(self): | |
10aeb8ea GS |
53 | self.reset() |
54 | ||
55 | def reset(self): | |
e439018a | 56 | self.ss_cmd, self.es_cmd = 0, 0 |
1f953c5d | 57 | self.reset_data() |
e439018a KP |
58 | |
59 | def start(self): | |
60 | self.out_ann = self.register(srd.OUTPUT_ANN) | |
61 | ||
62 | def putx(self, data): | |
63 | self.put(self.ss_cmd, self.es_cmd, self.out_ann, data) | |
64 | ||
65 | def put_warn(self, pos, msg): | |
66 | self.put(pos[0], pos[1], self.out_ann, [2, [msg]]) | |
67 | ||
68 | def decode(self, ss, es, data): | |
69 | ptype = data[0] | |
70 | if ptype == 'CS-CHANGE': | |
71 | # Bear in mind, that CS is optional according to the datasheet. | |
72 | # If we transition high mid-stream, toss out our data and restart. | |
73 | cs_old, cs_new = data[1:] | |
74 | if cs_old is not None and cs_old == 0 and cs_new == 1: | |
75 | if len(self.mosi_bytes) > 0 and len(self.mosi_bytes[1:]) < self.expected: | |
76 | # Mark short read/write for reg at least! | |
77 | self.es_cmd = es | |
abf9deff | 78 | write, reg = self.cmd & 0x80, self.cmd & 0x7f |
e439018a | 79 | rblob = regs.get(reg) |
abf9deff UH |
80 | idx = 1 if write else 0 |
81 | self.putx([idx, ['%s: %s' % (rblob[0], "SHORT")]]) | |
e439018a | 82 | self.put_warn([self.ss_cmd, es], "Short transfer!") |
1f953c5d | 83 | self.reset_data() |
e439018a KP |
84 | return |
85 | ||
86 | # Don't care about anything else. | |
87 | if ptype != 'DATA': | |
88 | return | |
89 | mosi, miso = data[1:] | |
90 | ||
91 | if len(self.mosi_bytes) == 0: | |
92 | self.ss_cmd = ss | |
93 | self.mosi_bytes.append(mosi) | |
94 | self.miso_bytes.append(miso) | |
95 | ||
96 | # A transfer is 2-4 bytes, (command + 1..3 byte reg). | |
97 | if len(self.mosi_bytes) < 2: | |
98 | return | |
99 | ||
100 | self.cmd = self.mosi_bytes[0] | |
abf9deff | 101 | write, reg = self.cmd & 0x80, self.cmd & 0x7f |
e439018a KP |
102 | rblob = regs.get(reg) |
103 | if not rblob: | |
104 | # If you don't have CS, this will _destroy_ comms! | |
105 | self.put_warn([self.ss_cmd, es], 'Unknown register!') | |
106 | return | |
107 | ||
108 | self.expected = math.ceil(rblob[3] / 8) | |
109 | if len(self.mosi_bytes[1:]) != self.expected: | |
110 | return | |
abf9deff | 111 | valo, vali = None, None |
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112 | self.es_cmd = es |
113 | if self.expected == 3: | |
114 | valo = self.mosi_bytes[1] << 16 | self.mosi_bytes[2] << 8 | \ | |
115 | self.mosi_bytes[3] | |
116 | vali = self.miso_bytes[1] << 16 | self.miso_bytes[2] << 8 | \ | |
117 | self.miso_bytes[3] | |
118 | elif self.expected == 2: | |
119 | valo = self.mosi_bytes[1] << 8 | self.mosi_bytes[2] | |
120 | vali = self.miso_bytes[1] << 8 | self.miso_bytes[2] | |
121 | elif self.expected == 1: | |
122 | valo = self.mosi_bytes[1] | |
123 | vali = self.miso_bytes[1] | |
124 | ||
125 | if write: | |
126 | self.putx([1, ['%s: %#x' % (rblob[0], valo)]]) | |
127 | else: | |
128 | self.putx([0, ['%s: %#x' % (rblob[0], vali)]]) | |
abf9deff | 129 | |
1f953c5d | 130 | self.reset_data() |