]>
Commit | Line | Data |
---|---|---|
c39dd54f UH |
1 | ------------------------------------------------------------------------------- |
2 | DCF77 | |
3 | ------------------------------------------------------------------------------- | |
4 | ||
0dcc79e2 | 5 | This is a set of example captures of a DCF77 signal. The hardware used for |
ad9c1894 UH |
6 | receiving the signal is a Pollin DCF1 module (3.3V supply). The Pollin |
7 | order number for the module is 810 054. | |
0dcc79e2 UH |
8 | |
9 | The dumps were made January 9, 2012 in the evening/night. | |
ad9c1894 UH |
10 | Only the dcf77_480s_pon_interrupted.sr dump was made January 10, 2012 in |
11 | the evening. | |
c39dd54f UH |
12 | |
13 | Details: | |
14 | http://en.wikipedia.org/wiki/DCF77 | |
0dcc79e2 | 15 | http://www.pollin.de/shop/dt/NTQ5OTgxOTk-/Bausaetze_Module/Module/DCF_Empfangsmodul_DCF1.html |
ad9c1894 | 16 | http://www.pollin.de/shop/downloads/D810054D.PDF |
c39dd54f UH |
17 | |
18 | ||
19 | Logic analyzer setup | |
20 | -------------------- | |
21 | ||
47cd3c8f | 22 | The logic analyzer used was a Saleae Logic (at 1MHz): |
c39dd54f UH |
23 | |
24 | Probe DCF77 module | |
25 | ------------------------ | |
26 | 1 (black) PON | |
27 | 2 (brown) DATA | |
c39dd54f UH |
28 | |
29 | ||
30 | Data | |
31 | ---- | |
32 | ||
33 | The sigrok command line used was: | |
34 | ||
35 | sigrok-cli -d 0:samplerate=1mhz --time 1800s \ | |
36 | -p '1=PON,2=DATA' -o dcf77_1800s.sr | |
37 | ||
38 | The time and samplerate varies, depending on the file. | |
39 | ||
ad9c1894 UH |
40 | The dcf77_480s_interrupted.sr file contains a dump where the power was removed |
41 | from the module one or more times during the capture. | |
42 | ||
43 | The dcf77_480s_pon_interrupted.sr file contains a dump where the PON pin was | |
44 | set from low to high (PON = high means that the device is disabled) for a | |
45 | few seconds, then back to low. | |
46 |