Difference between revisions of "Sysclk LWLA1016"
(Add more detail) |
(Device is now supported) |
||
| Line 2: | Line 2: | ||
| image = [[File:Sysclk lwla1016.png|180px]] | | image = [[File:Sysclk lwla1016.png|180px]] | ||
| name = Sysclk LWLA1016 | | name = Sysclk LWLA1016 | ||
| status = | | status = supported | ||
| source_code_dir = | | source_code_dir = sysclk-lwla | ||
| channels = 16/8 | | channels = 16/8 | ||
| samplerate = 100/200/250 MHz | | samplerate = 100/200/250 MHz | ||
| Line 10: | Line 10: | ||
| voltages = ? | | voltages = ? | ||
| threshold = ? | | threshold = ? | ||
| memory = 256Kbit/channel | | memory = 512Kbit/channel, or 256Kbit/channel with RLE | ||
| compression = optional | | compression = optional RLE | ||
| website = [http://item.taobao.com/item.htm?id=12821371102 taobao.com] | | website = [http://item.taobao.com/item.htm?id=12821371102 taobao.com] | ||
}} | }} | ||
The '''Sysclk LWLA1016''' is a USB-based, 16-channel logic analyzer with up to 100MHz sampling rate, or up to 250MHz with 8 channels. | The '''Sysclk LWLA1016''' is a USB-based, 16-channel logic analyzer with up to 100MHz sampling rate, or up to 250MHz with 8 channels. | ||
Note that sigrok supports only the 100 MHz mode with 16 channels. Supporting the 200/250 MHz 8 channel modes is not worth the effort, since the device does not support triggers in these modes. A non-streaming device without triggers is pretty much useless for any real world application. | |||
See [[Sysclk LWLA1016/Info]] for more details (such as '''lsusb -v''' output) about the device. | See [[Sysclk LWLA1016/Info]] for more details (such as '''lsusb -v''' output) about the device. | ||
| Line 43: | Line 45: | ||
== Protocol == | == Protocol == | ||
Reverse engineering of the vendor's custom protocol | Reverse engineering of the vendor's custom protocol is complete. See [[Sysclk LWLA1016/Protocol]] for the findings gathered. | ||
== Resources == | == Resources == | ||
| Line 51: | Line 53: | ||
[[Category:Device]] | [[Category:Device]] | ||
[[Category:Logic analyzer]] | [[Category:Logic analyzer]] | ||
[[Category: | [[Category:Supported]] | ||
Revision as of 16:40, 28 November 2015
 | |
| Status | supported |
|---|---|
| Source code | sysclk-lwla |
| Channels | 16/8 |
| Samplerate | 100/200/250 MHz |
| Samplerate (state) | ? |
| Triggers | only in 100MHz mode |
| Min/max voltage | ? |
| Threshold voltage | ? |
| Memory | 512Kbit/channel, or 256Kbit/channel with RLE |
| Compression | optional RLE |
| Website | taobao.com |
The Sysclk LWLA1016 is a USB-based, 16-channel logic analyzer with up to 100MHz sampling rate, or up to 250MHz with 8 channels.
Note that sigrok supports only the 100 MHz mode with 16 channels. Supporting the 200/250 MHz 8 channel modes is not worth the effort, since the device does not support triggers in these modes. A non-streaming device without triggers is pretty much useless for any real world application.
See Sysclk LWLA1016/Info for more details (such as lsusb -v output) about the device.
Hardware
TODO.
Photos
Device, front
Device, back
Device, open
PCB, top
PCB, bottom
Cypress FX2
ISSI 1
ISSI 2
ATMLH105
STC
LDOs
Input stage
Crystal
Protocol
Reverse engineering of the vendor's custom protocol is complete. See Sysclk LWLA1016/Protocol for the findings gathered.
Resources
TODO.