2 * This file is part of the sigrok-firmware-fx2lafw project.
4 * Copyright (C) 2009 Ubixum, Inc.
5 * Copyright (C) 2015 Jochen Hoenicke
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2.1 of the License, or (at your option) any later version.
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
21 #include <fx2macros.h>
23 #include <autovector.h>
27 #define SET_ANALOG_MODE()
29 #define SET_COUPLING(x)
31 #define SET_CALIBRATION_PULSE(x)
33 /* Toggle the 1kHz calibration pin, only accurate up to ca. 8MHz. */
34 #define TOGGLE_CALIBRATION_PIN() PA7 = !PA7
36 #define LED_CLEAR() PC0 = 1; PC1 = 1;
37 #define LED_GREEN() PC0 = 1; PC1 = 0;
38 #define LED_RED() PC0 = 0; PC1 = 1;
40 /* CTLx pin index (IFCLK, ADC clock input). */
43 #define OUT0 ((1 << CTL_BIT) << 4) /* OEx = 1, CTLx = 0 */
44 #define OE_CTL (((1 << CTL_BIT) << 4) | (1 << CTL_BIT)) /* OEx = CTLx = 1 */
46 /* Change to support as many interfaces as you need. */
47 static BYTE altiface = 0;
49 static volatile WORD ledcounter = 0;
51 static volatile __bit dosud = FALSE;
52 static volatile __bit dosuspend = FALSE;
54 extern __code BYTE highspd_dscr;
55 extern __code BYTE fullspd_dscr;
57 void resume_isr(void) __interrupt RESUME_ISR
62 void sudav_isr(void) __interrupt SUDAV_ISR
68 void usbreset_isr(void) __interrupt USBRESET_ISR
70 handle_hispeed(FALSE);
74 void hispeed_isr(void) __interrupt HISPEED_ISR
80 void suspend_isr(void) __interrupt SUSPEND_ISR
86 void timer2_isr(void) __interrupt TF2_ISR
88 TOGGLE_CALIBRATION_PIN();
90 if (ledcounter && (--ledcounter == 0))
97 * This sets three bits for each channel, one channel at a time.
98 * For channel 0 we want to set bits 5, 6 & 7
99 * For channel 1 we want to set bits 2, 3 & 4
101 * We convert the input values that are strange due to original
102 * firmware code into the value of the three bits as follows:
110 * The third bit is always zero since there are only four outputs connected
111 * in the serial selector chip.
113 * The multiplication of the converted value by 0x24 sets the relevant bits in
114 * both channels and then we mask it out to only affect the channel currently
117 static BOOL set_voltage(BYTE channel, BYTE val)
138 mask = (channel) ? 0xe0 : 0x1c;
139 IOC = (IOC & ~mask) | (bits & mask);
145 * Each LSB in the nibble of the byte controls the coupling per channel.
147 * Setting PE3 disables AC coupling capacitor on CH0.
148 * Setting PE0 disables AC coupling capacitor on CH1.
150 static void set_coupling(BYTE coupling_cfg)
152 if (coupling_cfg & 0x01)
157 if (coupling_cfg & 0x10)
163 static BOOL set_numchannels(BYTE numchannels)
165 if (numchannels == 1 || numchannels == 2) {
166 BYTE fifocfg = 7 + numchannels;
167 EP2FIFOCFG = fifocfg;
168 EP6FIFOCFG = fifocfg;
175 static void clear_fifo(void)
188 static void stop_sampling(void)
192 INPKTEND = (altiface == 0) ? 6 : 2;
195 static void start_sampling(void)
203 for (i = 0; i < 1000; i++);
205 while (!(GPIFTRIG & 0x80))
212 GPIFTRIG = (altiface == 0) ? 6 : 4;
214 /* Set green LED, don't clear LED afterwards (ledcounter = 0). */
219 static void select_interface(BYTE alt)
221 const BYTE *pPacketSize = \
222 ((USBCS & bmHSM) ? &highspd_dscr : &fullspd_dscr)
223 + (9 + (16 * alt) + 9 + 4);
232 EP6AUTOINLENL = pPacketSize[0];
233 EP6AUTOINLENH = pPacketSize[1];
239 EP2AUTOINLENL = pPacketSize[0];
240 EP2AUTOINLENH = pPacketSize[1] & 0x7;
241 EP2ISOINPKTS = (pPacketSize[1] >> 3) + 1;
245 static const struct samplerate_info {
254 { 48, 0x80, 0, 3, 0, 0x00, 0xea },
255 { 30, 0x80, 0, 3, 0, 0x00, 0xaa },
256 { 24, 1, 0, 2, 1, OUT0, 0xca },
257 { 16, 1, 1, 2, 0, OUT0, 0xca },
258 { 12, 2, 1, 2, 0, OUT0, 0xca },
259 { 8, 3, 2, 2, 0, OUT0, 0xca },
260 { 4, 6, 5, 2, 0, OUT0, 0xca },
261 { 2, 12, 11, 2, 0, OUT0, 0xca },
262 { 1, 24, 23, 2, 0, OUT0, 0xca },
263 { 50, 48, 47, 2, 0, OUT0, 0xca },
264 { 20, 120, 119, 2, 0, OUT0, 0xca },
265 { 10, 240, 239, 2, 0, OUT0, 0xca },
268 static BOOL set_samplerate(BYTE rate)
272 while (samplerates[i].rate != rate) {
274 if (i == sizeof(samplerates) / sizeof(samplerates[0]))
278 IFCONFIG = samplerates[i].ifcfg;
281 AUTOPTRH2 = 0xE4; /* 0xE400: GPIF waveform descriptor 0. */
285 * The program for low-speed, e.g. 1 MHz, is:
286 * wait 24, CTLx=0, FIFO
290 * The program for 24 MHz is:
291 * wait 1, CTLx=0, FIFO
294 * The program for 30/48 MHz is:
295 * jump 0, CTLx=Z, FIFO, LOOP
297 * (CTLx is device-dependent, could be e.g. CTL0 or CTL2.)
300 /* LENGTH / BRANCH 0-7 */
301 EXTAUTODAT2 = samplerates[i].wait0;
302 EXTAUTODAT2 = samplerates[i].wait1;
311 EXTAUTODAT2 = samplerates[i].opc0;
312 EXTAUTODAT2 = samplerates[i].opc1;
313 EXTAUTODAT2 = 1; /* DATA=0 DP=1 */
321 EXTAUTODAT2 = samplerates[i].out0;
322 EXTAUTODAT2 = OE_CTL;
323 EXTAUTODAT2 = OE_CTL;
330 /* LOGIC FUNCTION 0-7 */
340 for (i = 0; i < 96; i++)
346 static BOOL set_calibration_pulse(BYTE fs)
350 RCAP2L = -10000 & 0xff;
351 RCAP2H = (-10000 & 0xff00) >> 8;
354 RCAP2L = -1000 & 0xff;
355 RCAP2H = (-1000 & 0xff00) >> 8;
358 RCAP2L = (BYTE)(-100 & 0xff);
362 RCAP2L = (BYTE)(-20 & 0xff);
370 /* Set *alt_ifc to the current alt interface for ifc. */
371 BOOL handle_get_interface(BYTE ifc, BYTE *alt_ifc)
381 * Return TRUE if you set the interface requested.
383 * Note: This function should reconfigure and reset the endpoints
384 * according to the interface descriptors you provided.
386 BOOL handle_set_interface(BYTE ifc,BYTE alt_ifc)
389 select_interface(alt_ifc);
394 BYTE handle_get_configuration(void)
396 /* We only support configuration 0. */
400 BOOL handle_set_configuration(BYTE cfg)
402 /* We only support configuration 0. */
408 BOOL handle_vendorcommand(BYTE cmd)
412 /* Set red LED, clear after timeout. */
416 /* Clear EP0BCH/L for each valid command. */
417 if (cmd >= 0xe0 && cmd <= 0xe6) {
420 while (EP0CS & bmEPBUSY);
426 set_voltage(cmd - 0xe0, EP0BUF[0]);
429 set_samplerate(EP0BUF[0]);
436 set_numchannels(EP0BUF[0]);
439 SET_COUPLING(EP0BUF[0]);
442 SET_CALIBRATION_PULSE(EP0BUF[0]);
446 return FALSE; /* Not handled by handlers. */
449 static void init(void)
456 /* In idle mode tristate all outputs. */
457 GPIFIDLECTL = 0x00; /* Don't enable CTL0-5 outputs. */
458 GPIFCTLCFG = 0x80; /* TRICTL=1. CTL0-2: CMOS outputs, tri-statable. */
460 GPIFREADYSTAT = 0x00;
471 static void main(void)
478 /* Set up interrupts. */
487 /* Global (8051) interrupt enable. */
491 RCAP2L = -500 & 0xff;
492 RCAP2H = (-500 & 0xff00) >> 8;
515 /* Make sure ext wakeups are cleared. */
516 WAKEUPCS |= bmWU | bmWU2;
528 } while (!remote_wakeup_allowed && REMOTE_WAKEUP());
530 /* Resume (TRM 6.4). */
531 if (REMOTE_WAKEUP()) {
533 USBCS |= bmSIGRESUME;
535 USBCS &= ~bmSIGRESUME;