2 * This file is part of the fx2lafw project.
4 * Copyright (C) 2011-2012 Uwe Hermann <uwe@hermann-uwe.de>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 * fx2lafw is an open-source firmware for Cypress FX2 based logic analyzers.
24 * It is written in C, using fx2lib as helper library, and sdcc as compiler.
25 * The code is licensed under the terms of the GNU GPL, version 2 or later.
29 * - We use the FX2 in GPIF mode to sample the data (asynchronously).
30 * - We use the internal 48MHz clock for GPIF.
31 * - The 8 channels/pins we sample (the GPIF data bus) are PB0-PB7.
32 * Support for 16 channels is not yet included, but might be added later.
33 * - Endpoint 2 is used for data transfers from FX2 to host.
34 * - The endpoint is quad-buffered.
38 * - See http://sigrok.org/wiki/Fx2lafw
42 #include <fx2macros.h>
50 #include <gpif-acquisition.h>
56 static void setup_endpoints(void)
59 EP2CFG = (1 << 7) | /* EP is valid/activated */
60 (1 << 6) | /* EP direction: IN */
61 (1 << 5) | (0 << 4) | /* EP Type: bulk */
62 (1 << 3) | /* EP buffer size: 1024 */
63 (0 << 2) | /* Reserved. */
64 (0 << 1) | (0 << 0); /* EP buffering: quad buffering */
67 /* Disable all other EPs (EP1, EP4, EP6, and EP8). */
70 EP1OUTCFG &= ~bmVALID;
79 /* EP2: Reset the FIFOs. */
80 /* Note: RESETFIFO() gets the EP number WITHOUT bit 7 set/cleared. */
83 /* EP2: Enable AUTOIN mode. Set FIFO width to 8bits. */
84 EP2FIFOCFG = bmAUTOIN;
87 /* EP2: Auto-commit 512 (0x200) byte packets (due to AUTOIN = 1). */
93 /* EP2: Set the GPIF flag to 'full'. */
94 EP2GPIFFLGSEL = (1 << 1) | (0 << 1);
98 static void send_fw_version(void)
100 /* Populate the buffer. */
101 struct version_info *const vi = (struct version_info *)EP0BUF;
102 vi->major = FX2LAFW_VERSION_MAJOR;
103 vi->minor = FX2LAFW_VERSION_MINOR;
105 /* Send the message. */
107 EP0BCL = sizeof(struct version_info);
110 static void send_revid_version(void)
114 /* Populate the buffer. */
115 p = (uint8_t *)EP0BUF;
118 /* Send the message. */
123 BOOL handle_vendorcommand(BYTE cmd)
125 /* Protocol implementation */
128 vendor_command = cmd;
132 case CMD_GET_FW_VERSION:
136 case CMD_GET_REVID_VERSION:
137 send_revid_version();
145 BOOL handle_get_interface(BYTE ifc, BYTE *alt_ifc)
147 /* We only support interface 0, alternate interface 0. */
155 BOOL handle_set_interface(BYTE ifc, BYTE alt_ifc)
157 /* We only support interface 0, alternate interface 0. */
158 if (ifc != 0 || alt_ifc != 0)
161 /* Perform procedure from TRM, section 2.3.7: */
165 /* (2) Reset data toggles of the EPs in the interface. */
166 /* Note: RESETTOGGLE() gets the EP number WITH bit 7 set/cleared. */
172 /* (3) Restore EPs to their default conditions. */
173 /* Note: RESETFIFO() gets the EP number WITHOUT bit 7 set/cleared. */
180 /* (4) Clear the HSNAK bit. Not needed, fx2lib does this. */
185 BYTE handle_get_configuration(void)
187 /* We only support configuration 1. */
191 BOOL handle_set_configuration(BYTE cfg)
193 /* We only support configuration 1. */
194 return (cfg == 1) ? TRUE : FALSE;
197 void sudav_isr(void) interrupt SUDAV_ISR
203 void sof_isr(void) interrupt SOF_ISR using 1
208 void usbreset_isr(void) interrupt USBRESET_ISR
210 handle_hispeed(FALSE);
214 void hispeed_isr(void) interrupt HISPEED_ISR
216 handle_hispeed(TRUE);
220 void fx2lafw_init(void)
222 /* Set DYN_OUT and ENH_PKT bits, as recommended by the TRM. */
223 REVCTL = bmNOAUTOARM | bmSKIPCOMMIT;
235 /* TODO: Does the order of the following lines matter? */
241 /* Global (8051) interrupt enable. */
244 /* Setup the endpoints. */
247 /* Put the FX2 into GPIF master mode and setup the GPIF. */
251 void fx2lafw_poll(void)
258 if (vendor_command) {
259 switch (vendor_command) {
261 if ((EP0CS & bmEPBUSY) != 0)
265 gpif_acquisition_start(
266 (const struct cmd_start_acquisition *)EP0BUF);
269 /* Acknowledge the vendor command. */
273 /* Unimplemented command. */