[sigrok-firmware-fx2lafw.git] / hw / yixingdianzi-mdso / fw.c

/*
 * This file is part of the sigrok-firmware-fx2lafw project.
 *
 * Copyright (C) 2009 Ubixum, Inc.
 * Copyright (C) 2015 Jochen Hoenicke
 * Copyright (C) 2018 Marek Wodzinski
 *
 * This library is free software; you can redistribute it and/or
 * modify it under the terms of the GNU Lesser General Public
 * License as published by the Free Software Foundation; either
 * version 2.1 of the License, or (at your option) any later version.
 *
 * This library is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * Lesser General Public License for more details.
 *
 * You should have received a copy of the GNU Lesser General Public
 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
 */

#include <fx2macros.h>
#include <fx2ints.h>
#include <autovector.h>
#include <delay.h>
#include <setupdat.h>

#define SET_ANALOG_MODE()

#define SET_COUPLING(x)

#define SET_CALIBRATION_PULSE(x)

#define TOGGLE_CALIBRATION_PIN()

#define LED_CLEAR() NOP
#define LED_GREEN() NOP
#define LED_RED()   NOP

#define TIMER2_VAL 500

/* CTLx pin index (IFCLK, ADC clock input). */
#define CTL_BIT 0

#define OUT0 ((1 << CTL_BIT) << 4) /* OEx = 1, CTLx = 0 */

static const struct samplerate_info samplerates[] = {
	{ 48, 0x80,   0, 3, 0, 0x00, 0xea },
	{ 30, 0x80,   0, 3, 0, 0x00, 0xaa },
	{ 24,    1,   0, 2, 1, OUT0, 0xca },
	{ 16,    1,   1, 2, 0, OUT0, 0xca },
	{ 12,    2,   1, 2, 0, OUT0, 0xca },
	{  8,    3,   2, 2, 0, OUT0, 0xca },
	{  4,    6,   5, 2, 0, OUT0, 0xca },
	{  2,   12,  11, 2, 0, OUT0, 0xca },
	{  1,   24,  23, 2, 0, OUT0, 0xca },
	{ 50,   48,  47, 2, 0, OUT0, 0xca },
	{ 20,  120, 119, 2, 0, OUT0, 0xca },
	{ 10,  240, 239, 2, 0, OUT0, 0xca },
};

/*
 * This sets three bits for each channel, one channel at a time.
 * For channel 0 we want to set bits 1, 2 & 3
 * For channel 1 we want to set bits 4, 5 & 6
 *
 * We convert the input values that are strange due to original
 * firmware code into the value of the three bits as follows:
 *
 * val    -> bits
 * 1      -> 010b
 * 2      -> 001b
 * 5      -> 000b
 * 10(16) -> 011b
 *
 * The third bit is always zero since there are only four outputs connected
 * from the 74HC4051 chip.
 */
static BOOL set_voltage(BYTE channel, BYTE val)
{
	BYTE bits, mask;

	switch (val) {
	case 1:
		bits = 0x24;
		break;
	case 2:
		bits = 0x12;
		break;
	case 5:
		bits = 0x00;
		break;
	case 10: /* For backward compatibility. */
	case 16:
		bits = 0x36;
		break;
	default:
		return FALSE;
	}

	mask = (channel) ? 0x70 : 0x0e;
	IOA = (IOA & ~mask) | (bits & mask);

	return TRUE;
}

#include <scope.inc>
Commit	Line	Data
7a4d2e55	1	/*
	2	* This file is part of the sigrok-firmware-fx2lafw project.
	3	*
	4	* Copyright (C) 2009 Ubixum, Inc.
	5	* Copyright (C) 2015 Jochen Hoenicke
	6	* Copyright (C) 2018 Marek Wodzinski
	7	*
	8	* This library is free software; you can redistribute it and/or
	9	* modify it under the terms of the GNU Lesser General Public
	10	* License as published by the Free Software Foundation; either
	11	* version 2.1 of the License, or (at your option) any later version.
	12	*
	13	* This library is distributed in the hope that it will be useful,
	14	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	16	* Lesser General Public License for more details.
	17	*
	18	* You should have received a copy of the GNU Lesser General Public
	19	* License along with this library; if not, see <http://www.gnu.org/licenses/>.
	20	*/
	21
	22	#include <fx2macros.h>
	23	#include <fx2ints.h>
	24	#include <autovector.h>
	25	#include <delay.h>
	26	#include <setupdat.h>
	27
	28	#define SET_ANALOG_MODE()
	29
	30	#define SET_COUPLING(x)
	31
	32	#define SET_CALIBRATION_PULSE(x)
	33
	34	#define TOGGLE_CALIBRATION_PIN()
	35
	36	#define LED_CLEAR() NOP
	37	#define LED_GREEN() NOP
	38	#define LED_RED() NOP
	39
	40	#define TIMER2_VAL 500
	41
	42	/* CTLx pin index (IFCLK, ADC clock input). */
	43	#define CTL_BIT 0
	44
	45	#define OUT0 ((1 << CTL_BIT) << 4) /* OEx = 1, CTLx = 0 */
	46
	47	static const struct samplerate_info samplerates[] = {
	48	{ 48, 0x80, 0, 3, 0, 0x00, 0xea },
	49	{ 30, 0x80, 0, 3, 0, 0x00, 0xaa },
	50	{ 24, 1, 0, 2, 1, OUT0, 0xca },
	51	{ 16, 1, 1, 2, 0, OUT0, 0xca },
	52	{ 12, 2, 1, 2, 0, OUT0, 0xca },
	53	{ 8, 3, 2, 2, 0, OUT0, 0xca },
	54	{ 4, 6, 5, 2, 0, OUT0, 0xca },
	55	{ 2, 12, 11, 2, 0, OUT0, 0xca },
	56	{ 1, 24, 23, 2, 0, OUT0, 0xca },
	57	{ 50, 48, 47, 2, 0, OUT0, 0xca },
	58	{ 20, 120, 119, 2, 0, OUT0, 0xca },
	59	{ 10, 240, 239, 2, 0, OUT0, 0xca },
	60	};
	61
	62	/*
	63	* This sets three bits for each channel, one channel at a time.
	64	* For channel 0 we want to set bits 1, 2 & 3
65	* For channel 1 we want to set bits 4, 5 & 6
66	*
67	* We convert the input values that are strange due to original
68	* firmware code into the value of the three bits as follows:
69	*
70	* val -> bits
71	* 1 -> 010b
72	* 2 -> 001b
73	* 5 -> 000b
74	* 10(16) -> 011b
75	*
76	* The third bit is always zero since there are only four outputs connected
77	* from the 74HC4051 chip.
78	*/
79	static BOOL set_voltage(BYTE channel, BYTE val)
80	{
81	BYTE bits, mask;
82
83	switch (val) {
84	case 1:
85	bits = 0x24;
86	break;
87	case 2:
88	bits = 0x12;
89	break;
90	case 5:
91	bits = 0x00;
92	break;
93	case 10: /* For backward compatibility. */
94	case 16:
95	bits = 0x36;
96	break;
97	default:
98	return FALSE;
99	}
100
101	mask = (channel) ? 0x70 : 0x0e;
102	IOA = (IOA & ~mask) \| (bits & mask);
103
104	return TRUE;
105	}
106
107	#include <scope.inc>