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hantek_6022be.c: Make a few variables and functions static.
[sigrok-firmware-fx2lafw.git] / hantek_6022be.c
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484b3aa0
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1/*
2 * This file is part of the sigrok-firmware-fx2lafw project.
3 *
4 * Copyright (C) 2009 Ubixum, Inc.
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5 * Copyright (C) 2015 Jochen Hoenicke
6 *
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2.1 of the License, or (at your option) any later version.
11 *
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
16 *
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
484b3aa0 20 */
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21
22#include <fx2macros.h>
23#include <fx2ints.h>
24#include <autovector.h>
25#include <delay.h>
26#include <setupdat.h>
27
cc789c14 28/* Change to support as many interfaces as you need. */
0ab4ea5d 29static BYTE altiface = 0;
189db3d4 30
0ab4ea5d 31static volatile WORD ledcounter = 0;
189db3d4 32
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33static volatile __bit dosud = FALSE;
34static volatile __bit dosuspend = FALSE;
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35
36extern __code BYTE highspd_dscr;
37extern __code BYTE fullspd_dscr;
189db3d4 38
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39void resume_isr(void) __interrupt RESUME_ISR
40{
41 CLEAR_RESUME();
189db3d4 42}
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43
44void sudav_isr(void) __interrupt SUDAV_ISR
45{
46 dosud = TRUE;
47 CLEAR_SUDAV();
189db3d4 48}
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49
50void usbreset_isr(void) __interrupt USBRESET_ISR
51{
52 handle_hispeed(FALSE);
53 CLEAR_USBRESET();
189db3d4 54}
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55
56void hispeed_isr(void) __interrupt HISPEED_ISR
57{
58 handle_hispeed(TRUE);
59 CLEAR_HISPEED();
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60}
61
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62void suspend_isr(void) __interrupt SUSPEND_ISR
63{
64 dosuspend = TRUE;
65 CLEAR_SUSPEND();
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66}
67
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68void timer2_isr(void) __interrupt TF2_ISR
69{
70 PA7 = !PA7;
71 if (ledcounter) {
72 if (--ledcounter == 0) {
73 /* Clear LED. */
74 PC0 = 1;
75 PC1 = 1;
76 }
77 }
78 TF2 = 0;
189db3d4 79}
189db3d4 80
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81/*
82 * This sets three bits for each channel, one channel at a time.
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83 * For channel 0 we want to set bits 5, 6 & 7
84 * For channel 1 we want to set bits 2, 3 & 4
85 *
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86 * We convert the input values that are strange due to original
87 * firmware code into the value of the three bits as follows:
88 *
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89 * val -> bits
90 * 1 -> 010b
91 * 2 -> 001b
92 * 5 -> 000b
93 * 10 -> 011b
94 *
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95 * The third bit is always zero since there are only four outputs connected
96 * in the serial selector chip.
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97 *
98 * The multiplication of the converted value by 0x24 sets the relevant bits in
99 * both channels and then we mask it out to only affect the channel currently
100 * requested.
101 */
0ab4ea5d 102static BOOL set_voltage(BYTE channel, BYTE val)
189db3d4 103{
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104 BYTE bits, mask;
105
106 switch (val) {
107 case 1:
108 bits = 0x24 * 2;
109 break;
110 case 2:
111 bits = 0x24 * 1;
112 break;
113 case 5:
114 bits = 0x24 * 0;
115 break;
116 case 10:
117 bits = 0x24 * 3;
118 break;
119 default:
120 return FALSE;
121 }
122
123 mask = (channel) ? 0xe0 : 0x1c;
124 IOC = (IOC & ~mask) | (bits & mask);
189db3d4 125
cc789c14 126 return TRUE;
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127}
128
0ab4ea5d 129static BOOL set_numchannels(BYTE numchannels)
189db3d4 130{
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131 if (numchannels == 1 || numchannels == 2) {
132 BYTE fifocfg = 7 + numchannels;
133 EP2FIFOCFG = fifocfg;
134 EP6FIFOCFG = fifocfg;
135 return TRUE;
136 }
137
138 return FALSE;
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139}
140
0ab4ea5d 141static void clear_fifo(void)
189db3d4 142{
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143 GPIFABORT = 0xff;
144 SYNCDELAY3;
145 FIFORESET = 0x80;
146 SYNCDELAY3;
147 FIFORESET = 0x82;
148 SYNCDELAY3;
149 FIFORESET = 0x86;
150 SYNCDELAY3;
151 FIFORESET = 0;
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152}
153
0ab4ea5d 154static void stop_sampling(void)
189db3d4 155{
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156 GPIFABORT = 0xff;
157 SYNCDELAY3;
158 INPKTEND = (altiface == 0) ? 6 : 2;
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159}
160
0ab4ea5d 161static void start_sampling(void)
189db3d4 162{
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163 int i;
164
165 clear_fifo();
166
167 for (i = 0; i < 1000; i++);
168
169 while (!(GPIFTRIG & 0x80))
170 ;
171
172 SYNCDELAY3;
173 GPIFTCB1 = 0x28;
174 SYNCDELAY3;
175 GPIFTCB0 = 0;
176 GPIFTRIG = (altiface == 0) ? 6 : 4;
177
178 /* Set green LED, don't clear LED. */
179 ledcounter = 0;
180 PC0 = 1;
181 PC1 = 0;
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182}
183
0ab4ea5d 184static void select_interface(BYTE alt)
189db3d4 185{
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186 const BYTE *pPacketSize = \
187 (USBCS & bmHSM ? &highspd_dscr : &fullspd_dscr)
188 + (9 + (16 * alt) + 9 + 4);
189
190 altiface = alt;
191
192 if (alt == 0) {
193 /* Bulk on EP6. */
194 EP2CFG = 0x00;
195 EP6CFG = 0xe0;
196 EP6GPIFFLGSEL = 1;
197 EP6AUTOINLENL = pPacketSize[0];
198 EP6AUTOINLENH = pPacketSize[1];
199 } else {
200 /* Iso on EP2. */
201 EP2CFG = 0xd8;
202 EP6CFG = 0x00;
203 EP2GPIFFLGSEL = 1;
204 EP2AUTOINLENL = pPacketSize[0];
205 EP2AUTOINLENH = pPacketSize[1] & 0x7;
206 EP2ISOINPKTS = (pPacketSize[1] >> 3) + 1;
207 }
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208}
209
0ab4ea5d 210static const struct samplerate_info {
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211 BYTE rate;
212 BYTE wait0;
213 BYTE wait1;
214 BYTE opc0;
215 BYTE opc1;
216 BYTE out0;
217 BYTE ifcfg;
189db3d4 218} samplerates[] = {
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219 { 48,0x80, 0, 3, 0, 0x00, 0xea },
220 { 30,0x80, 0, 3, 0, 0x00, 0xaa },
221 { 24, 1, 0, 2, 1, 0x40, 0xca },
222 { 16, 1, 1, 2, 0, 0x40, 0xca },
223 { 12, 2, 1, 2, 0, 0x40, 0xca },
224 { 8, 3, 2, 2, 0, 0x40, 0xca },
225 { 4, 6, 5, 2, 0, 0x40, 0xca },
226 { 2, 12, 11, 2, 0, 0x40, 0xca },
227 { 1, 24, 23, 2, 0, 0x40, 0xca },
228 { 50, 48, 47, 2, 0, 0x40, 0xca },
229 { 20, 120, 119, 2, 0, 0x40, 0xca },
230 { 10, 240, 239, 2, 0, 0x40, 0xca },
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231};
232
0ab4ea5d 233static BOOL set_samplerate(BYTE rate)
189db3d4 234{
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235 BYTE i = 0;
236
237 while (samplerates[i].rate != rate) {
238 i++;
239 if (i == sizeof(samplerates) / sizeof(samplerates[0]))
240 return FALSE;
241 }
242
243 IFCONFIG = samplerates[i].ifcfg;
244
245 AUTOPTRSETUP = 7;
246 AUTOPTRH2 = 0xE4;
247 AUTOPTRL2 = 0x00;
248
249 /*
250 * The program for low-speed, e.g. 1 MHz, is:
251 * wait 24, CTL2=0, FIFO
252 * wait 23, CTL2=1
253 * jump 0, CTL2=1
254 *
255 * The program for 24 MHz is:
256 * wait 1, CTL2=0, FIFO
257 * jump 0, CTL2=1
258 *
259 * The program for 30/48 MHz is:
260 * jump 0, CTL2=Z, FIFO, LOOP
261 */
262
263 EXTAUTODAT2 = samplerates[i].wait0;
264 EXTAUTODAT2 = samplerates[i].wait1;
265 EXTAUTODAT2 = 1;
266 EXTAUTODAT2 = 0;
267 EXTAUTODAT2 = 0;
268 EXTAUTODAT2 = 0;
269 EXTAUTODAT2 = 0;
189db3d4 270 EXTAUTODAT2 = 0;
189db3d4 271
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272 EXTAUTODAT2 = samplerates[i].opc0;
273 EXTAUTODAT2 = samplerates[i].opc1;
274 EXTAUTODAT2 = 1;
275 EXTAUTODAT2 = 0;
276 EXTAUTODAT2 = 0;
277 EXTAUTODAT2 = 0;
278 EXTAUTODAT2 = 0;
279 EXTAUTODAT2 = 0;
280
281 EXTAUTODAT2 = samplerates[i].out0;
282 EXTAUTODAT2 = 0x44;
283 EXTAUTODAT2 = 0x44;
284 EXTAUTODAT2 = 0x00;
285 EXTAUTODAT2 = 0x00;
286 EXTAUTODAT2 = 0x00;
287 EXTAUTODAT2 = 0x00;
288 EXTAUTODAT2 = 0x00;
289
290 EXTAUTODAT2 = 0;
291 EXTAUTODAT2 = 0;
292 EXTAUTODAT2 = 0;
293 EXTAUTODAT2 = 0;
294 EXTAUTODAT2 = 0;
295 EXTAUTODAT2 = 0;
296 EXTAUTODAT2 = 0;
297 EXTAUTODAT2 = 0;
298
299 for (i = 0; i < 96; i++)
300 EXTAUTODAT2 = 0;
301
302 return TRUE;
189db3d4 303}
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304
305/* Set *alt_ifc to the current alt interface for ifc. */
306BOOL handle_get_interface(BYTE ifc, BYTE *alt_ifc)
307{
308 (void)ifc;
309
310 *alt_ifc = altiface;
311
312 return TRUE;
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313}
314
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315/*
316 * Return TRUE if you set the interface requested.
317 *
318 * Note: This function should reconfigure and reset the endpoints
319 * according to the interface descriptors you provided.
320 */
321BOOL handle_set_interface(BYTE ifc,BYTE alt_ifc)
322{
323 if (ifc == 0)
324 select_interface(alt_ifc);
325
326 return TRUE;
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327}
328
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329BYTE handle_get_configuration(void)
330{
331 /* We only support configuration 0. */
332 return 0;
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333}
334
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335BOOL handle_set_configuration(BYTE cfg)
336{
337 /* We only support configuration 0. */
338 (void)cfg;
339
189db3d4 340 return TRUE;
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341}
342
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343BOOL handle_vendorcommand(BYTE cmd)
344{
345 stop_sampling();
346
347 /* Set red LED. */
348 PC0 = 0;
349 PC1 = 1;
350 ledcounter = 1000;
351
352 switch (cmd) {
353 case 0xe0:
354 case 0xe1:
355 EP0BCH = 0;
356 EP0BCL = 0;
357 while (EP0CS & bmEPBUSY);
358 set_voltage(cmd - 0xe0, EP0BUF[0]);
359 return TRUE;
360 case 0xe2:
361 EP0BCH = 0;
362 EP0BCL = 0;
363 while (EP0CS & bmEPBUSY);
364 set_samplerate(EP0BUF[0]);
365 return TRUE;
366 case 0xe3:
367 EP0BCH = 0;
368 EP0BCL = 0;
369 while (EP0CS & bmEPBUSY);
370 if (EP0BUF[0] == 1)
371 start_sampling();
372 return TRUE;
373 case 0xe4:
374 EP0BCH = 0;
375 EP0BCL = 0;
376 while (EP0CS & bmEPBUSY);
377 set_numchannels(EP0BUF[0]);
378 return TRUE;
379 }
380
381 return FALSE; /* Not handled by handlers. */
382}
383
0ab4ea5d 384static void init(void)
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385{
386 EP4CFG = 0;
387 EP8CFG = 0;
388
389 /* In idle mode tristate all outputs. */
390 GPIFIDLECTL = 0x00;
391 GPIFCTLCFG = 0x80;
392 GPIFWFSELECT = 0x00;
393 GPIFREADYSTAT = 0x00;
394
395 stop_sampling();
396
397 set_voltage(0, 1);
398 set_voltage(1, 1);
399 set_samplerate(1);
400 set_numchannels(2);
401 select_interface(0);
189db3d4 402}
fb4075d5 403
0ab4ea5d 404static void main(void)
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405{
406 /* Save energy. */
407 SETCPUFREQ(CLK_12M);
408
409 init();
410
411 /* Set up interrupts. */
412 USE_USB_INTS();
413
414 ENABLE_SUDAV();
415 ENABLE_USBRESET();
416 ENABLE_HISPEED();
417 ENABLE_SUSPEND();
418 ENABLE_RESUME();
419
420 /* Global (8051) interrupt enable. */
421 EA = 1;
422
423 /* Init timer2. */
424 RCAP2L = -500 & 0xff;
425 RCAP2H = (-500 >> 8) & 0xff;
426 T2CON = 0;
427 ET2 = 1;
428 TR2 = 1;
429
430 RENUMERATE();
431
432 PORTCCFG = 0;
433 PORTACFG = 0;
434 OEC = 0xff;
435 OEA = 0x80;
436
437 while (TRUE) {
438 if (dosud) {
439 dosud = FALSE;
440 handle_setupdata();
441 }
442
443 if (dosuspend) {
444 dosuspend = FALSE;
445 do {
446 /* Make sure ext wakeups are cleared. */
447 WAKEUPCS |= bmWU|bmWU2;
448 SUSPEND = 1;
449 PCON |= 1;
450 __asm
451 nop
452 nop
453 nop
454 nop
455 nop
456 nop
457 nop
458 __endasm;
459 } while (!remote_wakeup_allowed && REMOTE_WAKEUP());
460
461 /* Resume (TRM 6.4). */
462 if (REMOTE_WAKEUP()) {
463 delay(5);
464 USBCS |= bmSIGRESUME;
465 delay(15);
466 USBCS &= ~bmSIGRESUME;
467 }
468 }
469 }
470}