]> sigrok.org Git - sigrok-dumps.git/commitdiff
Fixed up a few rogue tabs in README
authorMatt Ranostay <redacted>
Wed, 6 Mar 2013 15:40:35 +0000 (07:40 -0800)
committerUwe Hermann <redacted>
Sat, 9 Mar 2013 10:44:46 +0000 (11:44 +0100)
Signed-off-by: Matt Ranostay <redacted>
vfd/max6921/beagleboard_nixie_cape/README

index a71a3fa3bcc8617db0c42ac860020c6fabcf8d80..f6cd92dca55582d84cfbf0c466a73848a95c7ff1 100644 (file)
@@ -13,12 +13,12 @@ Logic analyzer setup
 
 The logic analyzer used was Open Bench Logic Sniffer (at 10Mhz):
 
- Probe         MAX6921 Pin
+ Probe          MAX6921 Pin
  --------------------------
- 0              LOAD   
- 1             DATA
- 2             CLK
- 3             BLANK (PWM Brightness Control)
+ 0              LOAD    
+ 1              DATA
+ 2              CLK
+ 3              BLANK (PWM Brightness Control)
 
 Data
 ----