[sigrok-dumps.git] / microwire / microchip_93lc46b / README

-------------------------------------------------------------------------------
Microchip 93LC46B Microwire EEPROM
-------------------------------------------------------------------------------

This is a set of example captures of the Microwire traffic from a
Microchip 93LC46B Microwire EEPROM to an FTDI FT232* chip on a random
unknown eval board.

Details:
https://www.microchip.com/wwwproducts/en/93LC46B
http://ww1.microchip.com/downloads/en/DeviceDoc/20001749K.pdf


Logic analyzer setup
--------------------

The logic analyzer used was a CWAV USBee SX (at 8MHz):

  Probe       93LC46B pin
  -----------------------
  0           CS
  1           CLK
  2           DI
  3           DO
  4           ORG

The ORG pin is tied high to use the x16 memory organisation (16-bit words).
Commit	Line	Data
f601acc1 UH	1	-------------------------------------------------------------------------------
	2	Microchip 93LC46B Microwire EEPROM
	3	-------------------------------------------------------------------------------
	4
	5	This is a set of example captures of the Microwire traffic from a
	6	Microchip 93LC46B Microwire EEPROM to an FTDI FT232* chip on a random
	7	unknown eval board.
	8
	9	Details:
	10	https://www.microchip.com/wwwproducts/en/93LC46B
	11	http://ww1.microchip.com/downloads/en/DeviceDoc/20001749K.pdf
	12
	13
	14	Logic analyzer setup
	15	--------------------
	16
	17	The logic analyzer used was a CWAV USBee SX (at 8MHz):
	18
	19	Probe 93LC46B pin
	20	-----------------------
	21	0 CS
	22	1 CLK
	23	2 DI
	24	3 DO
	25	4 ORG
	26
	27	The ORG pin is tied high to use the x16 memory organisation (16-bit words).