Rename 'probe' to 'channel' everywhere.

[libsigrokdecode.git] / decoders / spi / pd.py

diff --git a/decoders/spi/pd.py b/decoders/spi/pd.py
index d0e3409a6c8241eafe32001f496720f3180bdfba..b1a87043c074005cb4d8cedf50dea7be0d870813 100644 (file)
--- a/decoders/spi/pd.py
+++ b/decoders/spi/pd.py
@@ -31,7 +31,7 @@ Commands:
  - 'DATA': <data1> contains the MISO data, <data2> contains the MOSI data.
    The data is _usually_ 8 bits (but can also be fewer or more bits).
    Both data items are Python numbers (not strings), or None if the respective
-   probe was not supplied.
+   channel was not supplied.
  - 'BITS': <data1>/<data2> contain a list of bit values in this MISO/MOSI data
    item, and for each of those also their respective start-/endsample numbers.
  - 'CS CHANGE': <data1> is the old CS# pin value, <data2> is the new value.
@@ -69,10 +69,10 @@ class Decoder(srd.Decoder):
     license = 'gplv2+'
     inputs = ['logic']
     outputs = ['spi']
-    probes = (
+    channels = (
         {'id': 'clk', 'name': 'CLK', 'desc': 'Clock'},
     )
-    optional_probes = (
+    optional_channels = (
         {'id': 'miso', 'name': 'MISO', 'desc': 'Master in, slave out'},
         {'id': 'mosi', 'name': 'MOSI', 'desc': 'Master out, slave in'},
         {'id': 'cs', 'name': 'CS#', 'desc': 'Chip-select'},
@@ -84,9 +84,9 @@ class Decoder(srd.Decoder):
             'values': (0, 1)},
         {'id': 'cpha', 'desc': 'Clock phase', 'default': 0,
             'values': (0, 1)},
-        {'id': 'bitorder', 'desc': 'Bit order within the SPI data',
+        {'id': 'bitorder', 'desc': 'Bit order',
             'default': 'msb-first', 'values': ('msb-first', 'lsb-first')},
-        {'id': 'wordsize', 'desc': 'Word size of SPI data', 'default': 8},
+        {'id': 'wordsize', 'desc': 'Word size', 'default': 8},
     )
     annotations = (
         ('miso-data', 'MISO data'),