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onewire_network: add a missing 'Resume ROM' command
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1##
2## This file is part of the libsigrokdecode project.
3##
4## Copyright (C) 2012 Iztok Jeras <iztok.jeras@gmail.com>
5##
6## This program is free software; you can redistribute it and/or modify
7## it under the terms of the GNU General Public License as published by
8## the Free Software Foundation; either version 2 of the License, or
9## (at your option) any later version.
10##
11## This program is distributed in the hope that it will be useful,
12## but WITHOUT ANY WARRANTY; without even the implied warranty of
13## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14## GNU General Public License for more details.
15##
16## You should have received a copy of the GNU General Public License
17## along with this program; if not, see <http://www.gnu.org/licenses/>.
18##
19
20import sigrokdecode as srd
21
22# Dictionary of ROM commands and their names, next state.
23command = {
24 0x33: ['Read ROM' , 'GET ROM' ],
25 0x0f: ['Conditional read ROM' , 'GET ROM' ],
26 0xcc: ['Skip ROM' , 'TRANSPORT' ],
27 0x55: ['Match ROM' , 'GET ROM' ],
28 0xf0: ['Search ROM' , 'SEARCH ROM'],
29 0xec: ['Conditional search ROM', 'SEARCH ROM'],
30 0x3c: ['Overdrive skip ROM' , 'TRANSPORT' ],
31 0x69: ['Overdrive match ROM' , 'GET ROM' ],
32 0xa5: ['Resume' , 'TRANSPORT' ],
33}
34
35class Decoder(srd.Decoder):
36 api_version = 3
37 id = 'onewire_network'
38 name = '1-Wire network layer'
39 longname = '1-Wire serial communication bus (network layer)'
40 desc = 'Bidirectional, half-duplex, asynchronous serial bus.'
41 license = 'gplv2+'
42 inputs = ['onewire_link']
43 outputs = ['onewire_network']
44 tags = ['Embedded/industrial']
45 annotations = (
46 ('text', 'Human-readable text'),
47 )
48
49 def __init__(self):
50 self.reset()
51
52 def reset(self):
53 self.ss_block = 0
54 self.es_block = 0
55 self.state = 'COMMAND'
56 self.bit_cnt = 0
57 self.search = 'P'
58 self.data_p = 0x0
59 self.data_n = 0x0
60 self.data = 0x0
61 self.rom = 0x0000000000000000
62
63 def start(self):
64 self.out_python = self.register(srd.OUTPUT_PYTHON)
65 self.out_ann = self.register(srd.OUTPUT_ANN)
66
67 def putx(self, data):
68 # Helper function for most annotations.
69 self.put(self.ss_block, self.es_block, self.out_ann, data)
70
71 def puty(self, data):
72 # Helper function for most protocol packets.
73 self.put(self.ss_block, self.es_block, self.out_python, data)
74
75 def decode(self, ss, es, data):
76 code, val = data
77
78 # State machine.
79 if code == 'RESET/PRESENCE':
80 self.search = 'P'
81 self.bit_cnt = 0
82 self.put(ss, es, self.out_ann,
83 [0, ['Reset/presence: %s' % ('true' if val else 'false')]])
84 self.put(ss, es, self.out_python, ['RESET/PRESENCE', val])
85 self.state = 'COMMAND'
86 return
87
88 # For now we're only interested in 'RESET/PRESENCE' and 'BIT' packets.
89 if code != 'BIT':
90 return
91
92 if self.state == 'COMMAND':
93 # Receiving and decoding a ROM command.
94 if self.onewire_collect(8, val, ss, es) == 0:
95 return
96 if self.data in command:
97 self.putx([0, ['ROM command: 0x%02x \'%s\''
98 % (self.data, command[self.data][0])]])
99 self.state = command[self.data][1]
100 else:
101 self.putx([0, ['ROM command: 0x%02x \'%s\''
102 % (self.data, 'unrecognized')]])
103 self.state = 'COMMAND ERROR'
104 elif self.state == 'GET ROM':
105 # A 64 bit device address is selected.
106 # Family code (1 byte) + serial number (6 bytes) + CRC (1 byte)
107 if self.onewire_collect(64, val, ss, es) == 0:
108 return
109 self.rom = self.data & 0xffffffffffffffff
110 self.putx([0, ['ROM: 0x%016x' % self.rom]])
111 self.puty(['ROM', self.rom])
112 self.state = 'TRANSPORT'
113 elif self.state == 'SEARCH ROM':
114 # A 64 bit device address is searched for.
115 # Family code (1 byte) + serial number (6 bytes) + CRC (1 byte)
116 if self.onewire_search(64, val, ss, es) == 0:
117 return
118 self.rom = self.data & 0xffffffffffffffff
119 self.putx([0, ['ROM: 0x%016x' % self.rom]])
120 self.puty(['ROM', self.rom])
121 self.state = 'TRANSPORT'
122 elif self.state == 'TRANSPORT':
123 # The transport layer is handled in byte sized units.
124 if self.onewire_collect(8, val, ss, es) == 0:
125 return
126 self.putx([0, ['Data: 0x%02x' % self.data]])
127 self.puty(['DATA', self.data])
128 elif self.state == 'COMMAND ERROR':
129 # Since the command is not recognized, print raw data.
130 if self.onewire_collect(8, val, ss, es) == 0:
131 return
132 self.putx([0, ['ROM error data: 0x%02x' % self.data]])
133
134 # Data collector.
135 def onewire_collect(self, length, val, ss, es):
136 # Storing the sample this sequence begins with.
137 if self.bit_cnt == 0:
138 self.ss_block = ss
139 self.data = self.data & ~(1 << self.bit_cnt) | (val << self.bit_cnt)
140 self.bit_cnt += 1
141 # Storing the sample this sequence ends with.
142 # In case the full length of the sequence is received, return 1.
143 if self.bit_cnt == length:
144 self.es_block = es
145 self.data = self.data & ((1 << length) - 1)
146 self.bit_cnt = 0
147 return 1
148 else:
149 return 0
150
151 # Search collector.
152 def onewire_search(self, length, val, ss, es):
153 # Storing the sample this sequence begins with.
154 if (self.bit_cnt == 0) and (self.search == 'P'):
155 self.ss_block = ss
156
157 if self.search == 'P':
158 # Master receives an original address bit.
159 self.data_p = self.data_p & ~(1 << self.bit_cnt) | \
160 (val << self.bit_cnt)
161 self.search = 'N'
162 elif self.search == 'N':
163 # Master receives a complemented address bit.
164 self.data_n = self.data_n & ~(1 << self.bit_cnt) | \
165 (val << self.bit_cnt)
166 self.search = 'D'
167 elif self.search == 'D':
168 # Master transmits an address bit.
169 self.data = self.data & ~(1 << self.bit_cnt) | (val << self.bit_cnt)
170 self.search = 'P'
171 self.bit_cnt += 1
172
173 # Storing the sample this sequence ends with.
174 # In case the full length of the sequence is received, return 1.
175 if self.bit_cnt == length:
176 self.es_block = es
177 self.data_p = self.data_p & ((1 << length) - 1)
178 self.data_n = self.data_n & ((1 << length) - 1)
179 self.data = self.data & ((1 << length) - 1)
180 self.search = 'P'
181 self.bit_cnt = 0
182 return 1
183 else:
184 return 0