sysclk-lwla: Clarify use of SRAM control registers

Assign more meaningful names to things and introduce new constants.

diff --git a/src/hardware/sysclk-lwla/lwla.h b/src/hardware/sysclk-lwla/lwla.h
index 3e14525576de0b8a883834eeb88ed021a0827bf1..9483ae85f20294d322505aa5e61460cde50d5e78 100644 (file)
--- a/src/hardware/sysclk-lwla/lwla.h
+++ b/src/hardware/sysclk-lwla/lwla.h
@@ -74,12 +74,12 @@ enum {
        STATUS_FLAG_MASK = 0x3F
 };
 
-/** LWLA register addresses.
+/** LWLA1034 register addresses.
  */
 enum {
-       REG_MEM_CTRL2   = 0x1074, /* capture buffer control ??? */
+       REG_MEM_CTRL    = 0x1074, /* capture buffer control */
        REG_MEM_FILL    = 0x1078, /* capture buffer fill level */
-       REG_MEM_CTRL4   = 0x107C, /* capture buffer control ??? */
+       REG_MEM_START   = 0x107C, /* capture buffer start address */
 
        REG_DIV_BYPASS  = 0x1094, /* bypass clock divider flag */
 
@@ -94,6 +94,13 @@ enum {
        REG_FREQ_CH4    = 0x10CC, /* channel 4 live frequency */
 };
 
+/** Flag bits for REG_MEM_CTRL.
+ */
+enum {
+       MEM_CTRL_WRITE   = 1 << 0, /* "wr1rd0" bit */
+       MEM_CTRL_CLR_IDX = 1 << 1, /* "clr_idx" bit */
+};
+
 /** Register/value pair.
  */
 struct regval_pair {

diff --git a/src/hardware/sysclk-lwla/protocol.c b/src/hardware/sysclk-lwla/protocol.c
index ff61a8b3574d786dd8d61c2d6b48c8ae26a45a4a..5a64840fb4a53878f89b38f6775ea72b7cc165d9 100644 (file)
--- a/src/hardware/sysclk-lwla/protocol.c
+++ b/src/hardware/sysclk-lwla/protocol.c
@@ -257,10 +257,10 @@ static void issue_read_start(const struct sr_dev_inst *sdi)
        regvals[0].reg = REG_DIV_BYPASS;
        regvals[0].val = 1;
 
-       regvals[1].reg = REG_MEM_CTRL2;
-       regvals[1].val = 2;
+       regvals[1].reg = REG_MEM_CTRL;
+       regvals[1].val = MEM_CTRL_CLR_IDX;
 
-       regvals[2].reg = REG_MEM_CTRL4;
+       regvals[2].reg = REG_MEM_START;
        regvals[2].val = 4;
 
        devc->reg_write_pos = 0;
@@ -723,7 +723,7 @@ SR_PRIV int lwla_init_device(const struct sr_dev_inst *sdi)
                return ret;
 
        if (value != UINT64_C(0x1234567887654321)) {
-               sr_err("Received invalid test word 0x%16" PRIX64 ".", value);
+               sr_err("Received invalid test word 0x%016" PRIX64 ".", value);
                return SR_ERR;
        }
        return SR_OK;
@@ -814,11 +814,11 @@ SR_PRIV int lwla_setup_acquisition(const struct sr_dev_inst *sdi)
                        sr_info("External clock, rising edge.");
        }
 
-       regvals[0].reg = REG_MEM_CTRL2;
-       regvals[0].val = 2;
+       regvals[0].reg = REG_MEM_CTRL;
+       regvals[0].val = MEM_CTRL_CLR_IDX;
 
-       regvals[1].reg = REG_MEM_CTRL2;
-       regvals[1].val = 1;
+       regvals[1].reg = REG_MEM_CTRL;
+       regvals[1].val = MEM_CTRL_WRITE;
 
        regvals[2].reg = REG_LONG_ADDR;
        regvals[2].val = 10;