2 * This file is part of the libsigrok project.
4 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
5 * Copyright (C) 2012 Joel Holdsworth <joel@airwebreathe.org.uk>
7 * This program is free software: you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation, either version 3 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program. If not, see <http://www.gnu.org/licenses/>.
25 #include <glib/gstdio.h>
28 #define DS_CMD_GET_FW_VERSION 0xb0
29 #define DS_CMD_GET_REVID_VERSION 0xb1
30 #define DS_CMD_START 0xb2
31 #define DS_CMD_CONFIG 0xb3
32 #define DS_CMD_SETTING 0xb4
33 #define DS_CMD_CONTROL 0xb5
34 #define DS_CMD_STATUS 0xb6
35 #define DS_CMD_STATUS_INFO 0xb7
36 #define DS_CMD_WR_REG 0xb8
37 #define DS_CMD_WR_NVM 0xb9
38 #define DS_CMD_RD_NVM 0xba
39 #define DS_CMD_RD_NVM_PRE 0xbb
40 #define DS_CMD_GET_HW_INFO 0xbc
42 #define DS_START_FLAGS_STOP (1 << 7)
43 #define DS_START_FLAGS_CLK_48MHZ (1 << 6)
44 #define DS_START_FLAGS_SAMPLE_WIDE (1 << 5)
45 #define DS_START_FLAGS_MODE_LA (1 << 4)
47 #define DS_ADDR_COMB 0x68
48 #define DS_ADDR_EEWP 0x70
49 #define DS_ADDR_VTH 0x78
51 #define DS_MAX_LOGIC_DEPTH SR_MHZ(16)
52 #define DS_MAX_LOGIC_SAMPLERATE SR_MHZ(100)
53 #define DS_MAX_TRIG_PERCENT 90
55 #define DS_MODE_TRIG_EN (1 << 0)
56 #define DS_MODE_CLK_TYPE (1 << 1)
57 #define DS_MODE_CLK_EDGE (1 << 2)
58 #define DS_MODE_RLE_MODE (1 << 3)
59 #define DS_MODE_DSO_MODE (1 << 4)
60 #define DS_MODE_HALF_MODE (1 << 5)
61 #define DS_MODE_QUAR_MODE (1 << 6)
62 #define DS_MODE_ANALOG_MODE (1 << 7)
63 #define DS_MODE_FILTER (1 << 8)
64 #define DS_MODE_INSTANT (1 << 9)
65 #define DS_MODE_STRIG_MODE (1 << 11)
66 #define DS_MODE_STREAM_MODE (1 << 12)
67 #define DS_MODE_LPB_TEST (1 << 13)
68 #define DS_MODE_EXT_TEST (1 << 14)
69 #define DS_MODE_INT_TEST (1 << 15)
71 #define DSLOGIC_ATOMIC_SAMPLES (sizeof(uint64_t) * 8)
72 #define DSLOGIC_ATOMIC_BYTES sizeof(uint64_t)
75 * The FPGA is configured with TLV tuples. Length is specified as the
76 * number of 16-bit words.
78 #define _DS_CFG(variable, wordcnt) ((variable << 8) | wordcnt)
79 #define DS_CFG_START 0xf5a5f5a5
80 #define DS_CFG_MODE _DS_CFG(0, 1)
81 #define DS_CFG_DIVIDER _DS_CFG(1, 2)
82 #define DS_CFG_COUNT _DS_CFG(3, 2)
83 #define DS_CFG_TRIG_POS _DS_CFG(5, 2)
84 #define DS_CFG_TRIG_GLB _DS_CFG(7, 1)
85 #define DS_CFG_CH_EN _DS_CFG(8, 1)
86 #define DS_CFG_TRIG _DS_CFG(64, 160)
87 #define DS_CFG_END 0xfa5afa5a
96 struct cmd_start_acquisition {
98 uint8_t sample_delay_h;
99 uint8_t sample_delay_l;
102 struct dslogic_fpga_config {
105 uint16_t mode_header;
107 uint16_t divider_header;
109 uint16_t count_header;
111 uint16_t trig_pos_header;
113 uint16_t trig_glb_header;
115 uint16_t ch_en_header;
118 uint16_t trig_header;
119 uint16_t trig_mask0[NUM_TRIGGER_STAGES];
120 uint16_t trig_mask1[NUM_TRIGGER_STAGES];
121 uint16_t trig_value0[NUM_TRIGGER_STAGES];
122 uint16_t trig_value1[NUM_TRIGGER_STAGES];
123 uint16_t trig_edge0[NUM_TRIGGER_STAGES];
124 uint16_t trig_edge1[NUM_TRIGGER_STAGES];
125 uint16_t trig_logic0[NUM_TRIGGER_STAGES];
126 uint16_t trig_logic1[NUM_TRIGGER_STAGES];
127 uint32_t trig_count[NUM_TRIGGER_STAGES];
135 * This should be larger than the FPGA bitstream image so that it'll get
136 * uploaded in one big operation. There seem to be issues when uploading
139 #define FW_BUFSIZE (1024 * 1024)
141 #define FPGA_UPLOAD_DELAY (10 * 1000)
143 #define USB_TIMEOUT (3 * 1000)
145 static int command_get_fw_version(libusb_device_handle *devhdl,
146 struct version_info *vi)
150 ret = libusb_control_transfer(devhdl, LIBUSB_REQUEST_TYPE_VENDOR |
151 LIBUSB_ENDPOINT_IN, DS_CMD_GET_FW_VERSION, 0x0000, 0x0000,
152 (unsigned char *)vi, sizeof(struct version_info), USB_TIMEOUT);
155 sr_err("Unable to get version info: %s.",
156 libusb_error_name(ret));
163 static int command_get_revid_version(struct sr_dev_inst *sdi, uint8_t *revid)
165 struct sr_usb_dev_inst *usb = sdi->conn;
166 libusb_device_handle *devhdl = usb->devhdl;
169 ret = libusb_control_transfer(devhdl, LIBUSB_REQUEST_TYPE_VENDOR |
170 LIBUSB_ENDPOINT_IN, DS_CMD_GET_REVID_VERSION, 0x0000, 0x0000,
171 revid, 1, USB_TIMEOUT);
174 sr_err("Unable to get REVID: %s.", libusb_error_name(ret));
181 static int command_start_acquisition(const struct sr_dev_inst *sdi)
183 struct sr_usb_dev_inst *usb;
184 struct dslogic_mode mode;
187 mode.flags = DS_START_FLAGS_MODE_LA | DS_START_FLAGS_SAMPLE_WIDE;
188 mode.sample_delay_h = mode.sample_delay_l = 0;
191 ret = libusb_control_transfer(usb->devhdl, LIBUSB_REQUEST_TYPE_VENDOR |
192 LIBUSB_ENDPOINT_OUT, DS_CMD_START, 0x0000, 0x0000,
193 (unsigned char *)&mode, sizeof(mode), USB_TIMEOUT);
195 sr_err("Failed to send start command: %s.", libusb_error_name(ret));
202 static int command_stop_acquisition(const struct sr_dev_inst *sdi)
204 struct sr_usb_dev_inst *usb;
205 struct dslogic_mode mode;
208 mode.flags = DS_START_FLAGS_STOP;
209 mode.sample_delay_h = mode.sample_delay_l = 0;
212 ret = libusb_control_transfer(usb->devhdl, LIBUSB_REQUEST_TYPE_VENDOR |
213 LIBUSB_ENDPOINT_OUT, DS_CMD_START, 0x0000, 0x0000,
214 (unsigned char *)&mode, sizeof(struct dslogic_mode), USB_TIMEOUT);
216 sr_err("Failed to send stop command: %s.", libusb_error_name(ret));
223 SR_PRIV int dslogic_fpga_firmware_upload(const struct sr_dev_inst *sdi)
225 const char *name = NULL;
227 struct sr_resource bitstream;
228 struct drv_context *drvc;
229 struct dev_context *devc;
230 struct sr_usb_dev_inst *usb;
235 const uint8_t cmd[3] = {0, 0, 0};
237 drvc = sdi->driver->context;
241 if (!strcmp(devc->profile->model, "DSLogic")) {
242 if (devc->cur_threshold < 1.40)
243 name = DSLOGIC_FPGA_FIRMWARE_3V3;
245 name = DSLOGIC_FPGA_FIRMWARE_5V;
246 } else if (!strcmp(devc->profile->model, "DSLogic Pro")){
247 name = DSLOGIC_PRO_FPGA_FIRMWARE;
248 } else if (!strcmp(devc->profile->model, "DSLogic Plus")){
249 name = DSLOGIC_PLUS_FPGA_FIRMWARE;
250 } else if (!strcmp(devc->profile->model, "DSLogic Basic")){
251 name = DSLOGIC_BASIC_FPGA_FIRMWARE;
252 } else if (!strcmp(devc->profile->model, "DSCope")) {
253 name = DSCOPE_FPGA_FIRMWARE;
255 sr_err("Failed to select FPGA firmware.");
259 sr_dbg("Uploading FPGA firmware '%s'.", name);
261 result = sr_resource_open(drvc->sr_ctx, &bitstream,
262 SR_RESOURCE_FIRMWARE, name);
266 /* Tell the device firmware is coming. */
267 if ((ret = libusb_control_transfer(usb->devhdl, LIBUSB_REQUEST_TYPE_VENDOR |
268 LIBUSB_ENDPOINT_OUT, DS_CMD_CONFIG, 0x0000, 0x0000,
269 (unsigned char *)&cmd, sizeof(cmd), USB_TIMEOUT)) < 0) {
270 sr_err("Failed to upload FPGA firmware: %s.", libusb_error_name(ret));
271 sr_resource_close(drvc->sr_ctx, &bitstream);
275 /* Give the FX2 time to get ready for FPGA firmware upload. */
276 g_usleep(FPGA_UPLOAD_DELAY);
278 buf = g_malloc(FW_BUFSIZE);
282 chunksize = sr_resource_read(drvc->sr_ctx, &bitstream,
289 if ((ret = libusb_bulk_transfer(usb->devhdl, 2 | LIBUSB_ENDPOINT_OUT,
290 buf, chunksize, &transferred, USB_TIMEOUT)) < 0) {
291 sr_err("Unable to configure FPGA firmware: %s.",
292 libusb_error_name(ret));
297 sr_spew("Uploaded %" PRIu64 "/%" PRIu64 " bytes.",
298 sum, bitstream.size);
300 if (transferred != chunksize) {
301 sr_err("Short transfer while uploading FPGA firmware.");
307 sr_resource_close(drvc->sr_ctx, &bitstream);
310 sr_dbg("FPGA firmware upload done.");
315 static unsigned int enabled_channel_count(const struct sr_dev_inst *sdi)
317 unsigned int count = 0;
318 for (const GSList *l = sdi->channels; l; l = l->next) {
319 const struct sr_channel *const probe = (struct sr_channel *)l->data;
326 static uint16_t enabled_channel_mask(const struct sr_dev_inst *sdi)
328 unsigned int mask = 0;
329 for (const GSList *l = sdi->channels; l; l = l->next) {
330 const struct sr_channel *const probe = (struct sr_channel *)l->data;
332 mask |= 1 << probe->index;
338 * Get the session trigger and configure the FPGA structure
341 static void set_trigger(const struct sr_dev_inst *sdi,
342 struct dslogic_fpga_config *cfg)
344 struct sr_trigger *trigger;
345 struct sr_trigger_stage *stage;
346 struct sr_trigger_match *match;
347 struct dev_context *devc;
349 const unsigned int num_enabled_channels = enabled_channel_count(sdi);
350 int num_trigger_stages = 0;
352 int channelbit, i = 0;
353 uint32_t trigger_point;
357 cfg->ch_en = enabled_channel_mask(sdi);
359 cfg->trig_mask0[0] = 0xffff;
360 cfg->trig_mask1[0] = 0xffff;
362 cfg->trig_value0[0] = 0;
363 cfg->trig_value1[0] = 0;
365 cfg->trig_edge0[0] = 0;
366 cfg->trig_edge1[0] = 0;
368 cfg->trig_logic0[0] = 2;
369 cfg->trig_logic1[0] = 2;
371 cfg->trig_count[0] = 0;
373 cfg->trig_glb = num_enabled_channels << 4;
375 for (i = 1; i < NUM_TRIGGER_STAGES; i++) {
376 cfg->trig_mask0[i] = 0xffff;
377 cfg->trig_mask1[i] = 0xffff;
378 cfg->trig_value0[i] = 0;
379 cfg->trig_value1[i] = 0;
380 cfg->trig_edge0[i] = 0;
381 cfg->trig_edge1[i] = 0;
382 cfg->trig_logic0[i] = 2;
383 cfg->trig_logic1[i] = 2;
384 cfg->trig_count[i] = 0;
387 trigger_point = (devc->capture_ratio * devc->limit_samples) / 100;
388 if (trigger_point < DSLOGIC_ATOMIC_SAMPLES)
389 trigger_point = DSLOGIC_ATOMIC_SAMPLES;
390 const uint32_t mem_depth = devc->profile->mem_depth;
391 const uint32_t max_trigger_point = devc->continuous_mode ? ((mem_depth * 10) / 100) :
392 ((mem_depth * DS_MAX_TRIG_PERCENT) / 100);
393 if (trigger_point > max_trigger_point)
394 trigger_point = max_trigger_point;
395 cfg->trig_pos = trigger_point & ~(DSLOGIC_ATOMIC_SAMPLES - 1);
397 if (!(trigger = sr_session_trigger_get(sdi->session))) {
398 sr_dbg("No session trigger found");
402 for (l = trigger->stages; l; l = l->next) {
404 num_trigger_stages++;
405 for (m = stage->matches; m; m = m->next) {
407 if (!match->channel->enabled)
408 /* Ignore disabled channels with a trigger. */
410 channelbit = 1 << (match->channel->index);
411 /* Simple trigger support (event). */
412 if (match->match == SR_TRIGGER_ONE) {
413 cfg->trig_mask0[0] &= ~channelbit;
414 cfg->trig_mask1[0] &= ~channelbit;
415 cfg->trig_value0[0] |= channelbit;
416 cfg->trig_value1[0] |= channelbit;
417 } else if (match->match == SR_TRIGGER_ZERO) {
418 cfg->trig_mask0[0] &= ~channelbit;
419 cfg->trig_mask1[0] &= ~channelbit;
420 } else if (match->match == SR_TRIGGER_FALLING) {
421 cfg->trig_mask0[0] &= ~channelbit;
422 cfg->trig_mask1[0] &= ~channelbit;
423 cfg->trig_edge0[0] |= channelbit;
424 cfg->trig_edge1[0] |= channelbit;
425 } else if (match->match == SR_TRIGGER_RISING) {
426 cfg->trig_mask0[0] &= ~channelbit;
427 cfg->trig_mask1[0] &= ~channelbit;
428 cfg->trig_value0[0] |= channelbit;
429 cfg->trig_value1[0] |= channelbit;
430 cfg->trig_edge0[0] |= channelbit;
431 cfg->trig_edge1[0] |= channelbit;
432 } else if (match->match == SR_TRIGGER_EDGE) {
433 cfg->trig_edge0[0] |= channelbit;
434 cfg->trig_edge1[0] |= channelbit;
439 cfg->trig_glb |= num_trigger_stages;
444 static int fpga_configure(const struct sr_dev_inst *sdi)
446 struct dev_context *devc;
447 struct sr_usb_dev_inst *usb;
449 struct dslogic_fpga_config cfg;
452 int transferred, len, ret;
454 sr_dbg("Configuring FPGA.");
459 WL32(&cfg.sync, DS_CFG_START);
460 WL16(&cfg.mode_header, DS_CFG_MODE);
461 WL16(&cfg.divider_header, DS_CFG_DIVIDER);
462 WL16(&cfg.count_header, DS_CFG_COUNT);
463 WL16(&cfg.trig_pos_header, DS_CFG_TRIG_POS);
464 WL16(&cfg.trig_glb_header, DS_CFG_TRIG_GLB);
465 WL16(&cfg.ch_en_header, DS_CFG_CH_EN);
466 WL16(&cfg.trig_header, DS_CFG_TRIG);
467 WL32(&cfg.end_sync, DS_CFG_END);
469 /* Pass in the length of a fixed-size struct. Really. */
470 len = sizeof(struct dslogic_fpga_config) / 2;
472 c[1] = (len >> 8) & 0xff;
473 c[2] = (len >> 16) & 0xff;
475 ret = libusb_control_transfer(usb->devhdl, LIBUSB_REQUEST_TYPE_VENDOR |
476 LIBUSB_ENDPOINT_OUT, DS_CMD_SETTING, 0x0000, 0x0000,
477 c, sizeof(c), USB_TIMEOUT);
479 sr_err("Failed to send FPGA configure command: %s.",
480 libusb_error_name(ret));
486 if (devc->mode == DS_OP_INTERNAL_TEST)
487 v16 = DS_MODE_INT_TEST;
488 else if (devc->mode == DS_OP_EXTERNAL_TEST)
489 v16 = DS_MODE_EXT_TEST;
490 else if (devc->mode == DS_OP_LOOPBACK_TEST)
491 v16 = DS_MODE_LPB_TEST;
493 if (devc->cur_samplerate == DS_MAX_LOGIC_SAMPLERATE * 2)
494 v16 |= DS_MODE_HALF_MODE;
495 else if (devc->cur_samplerate == DS_MAX_LOGIC_SAMPLERATE * 4)
496 v16 |= DS_MODE_QUAR_MODE;
498 if (devc->continuous_mode)
499 v16 |= DS_MODE_STREAM_MODE;
500 if (devc->external_clock) {
501 v16 |= DS_MODE_CLK_TYPE;
502 if (devc->clock_edge == DS_EDGE_FALLING)
503 v16 |= DS_MODE_CLK_EDGE;
505 if (devc->limit_samples > DS_MAX_LOGIC_DEPTH *
506 ceil(devc->cur_samplerate * 1.0 / DS_MAX_LOGIC_SAMPLERATE)
507 && !devc->continuous_mode) {
508 /* Enable RLE for long captures.
509 * Without this, captured data present errors.
511 v16 |= DS_MODE_RLE_MODE;
514 WL16(&cfg.mode, v16);
515 v32 = ceil(DS_MAX_LOGIC_SAMPLERATE * 1.0 / devc->cur_samplerate);
516 WL32(&cfg.divider, v32);
518 /* Number of 16-sample units. */
519 WL32(&cfg.count, devc->limit_samples / 16);
521 set_trigger(sdi, &cfg);
523 len = sizeof(struct dslogic_fpga_config);
524 ret = libusb_bulk_transfer(usb->devhdl, 2 | LIBUSB_ENDPOINT_OUT,
525 (unsigned char *)&cfg, len, &transferred, USB_TIMEOUT);
526 if (ret < 0 || transferred != len) {
527 sr_err("Failed to send FPGA configuration: %s.", libusb_error_name(ret));
534 SR_PRIV int dslogic_set_voltage_threshold(const struct sr_dev_inst *sdi, double threshold)
537 struct dev_context *const devc = sdi->priv;
538 const struct sr_usb_dev_inst *const usb = sdi->conn;
539 const uint8_t value = (threshold / 5.0) * 255;
540 const uint16_t cmd = value | (DS_ADDR_VTH << 8);
542 /* Send the control command. */
543 ret = libusb_control_transfer(usb->devhdl,
544 LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_ENDPOINT_OUT,
545 DS_CMD_WR_REG, 0x0000, 0x0000,
546 (unsigned char *)&cmd, sizeof(cmd), 3000);
548 sr_err("Unable to set voltage-threshold register: %s.",
549 libusb_error_name(ret));
553 devc->cur_threshold = threshold;
558 SR_PRIV int dslogic_dev_open(struct sr_dev_inst *sdi, struct sr_dev_driver *di)
560 libusb_device **devlist;
561 struct sr_usb_dev_inst *usb;
562 struct libusb_device_descriptor des;
563 struct dev_context *devc;
564 struct drv_context *drvc;
565 struct version_info vi;
566 int ret, i, device_count;
568 char connection_id[64];
574 if (sdi->status == SR_ST_ACTIVE)
575 /* Device is already in use. */
578 device_count = libusb_get_device_list(drvc->sr_ctx->libusb_ctx, &devlist);
579 if (device_count < 0) {
580 sr_err("Failed to get device list: %s.",
581 libusb_error_name(device_count));
585 for (i = 0; i < device_count; i++) {
586 libusb_get_device_descriptor(devlist[i], &des);
588 if (des.idVendor != devc->profile->vid
589 || des.idProduct != devc->profile->pid)
592 if ((sdi->status == SR_ST_INITIALIZING) ||
593 (sdi->status == SR_ST_INACTIVE)) {
595 * Check device by its physical USB bus/port address.
597 usb_get_port_path(devlist[i], connection_id, sizeof(connection_id));
598 if (strcmp(sdi->connection_id, connection_id))
599 /* This is not the one. */
603 if (!(ret = libusb_open(devlist[i], &usb->devhdl))) {
604 if (usb->address == 0xff)
606 * First time we touch this device after FW
607 * upload, so we don't know the address yet.
609 usb->address = libusb_get_device_address(devlist[i]);
611 sr_err("Failed to open device: %s.",
612 libusb_error_name(ret));
616 if (libusb_has_capability(LIBUSB_CAP_SUPPORTS_DETACH_KERNEL_DRIVER)) {
617 if (libusb_kernel_driver_active(usb->devhdl, USB_INTERFACE) == 1) {
618 if ((ret = libusb_detach_kernel_driver(usb->devhdl, USB_INTERFACE)) < 0) {
619 sr_err("Failed to detach kernel driver: %s.",
620 libusb_error_name(ret));
626 ret = command_get_fw_version(usb->devhdl, &vi);
628 sr_err("Failed to get firmware version.");
632 ret = command_get_revid_version(sdi, &revid);
634 sr_err("Failed to get REVID.");
639 * Changes in major version mean incompatible/API changes, so
640 * bail out if we encounter an incompatible version.
641 * Different minor versions are OK, they should be compatible.
643 if (vi.major != DSLOGIC_REQUIRED_VERSION_MAJOR) {
644 sr_err("Expected firmware version %d.x, "
645 "got %d.%d.", DSLOGIC_REQUIRED_VERSION_MAJOR,
650 sdi->status = SR_ST_ACTIVE;
651 sr_info("Opened device on %d.%d (logical) / %s (physical), "
652 "interface %d, firmware %d.%d.",
653 usb->bus, usb->address, connection_id,
654 USB_INTERFACE, vi.major, vi.minor);
656 sr_info("Detected REVID=%d, it's a Cypress CY7C68013%s.",
657 revid, (revid != 1) ? " (FX2)" : "A (FX2LP)");
661 libusb_free_device_list(devlist, 1);
663 if (sdi->status != SR_ST_ACTIVE)
669 SR_PRIV struct dev_context *dslogic_dev_new(void)
671 struct dev_context *devc;
673 devc = g_malloc0(sizeof(struct dev_context));
674 devc->profile = NULL;
675 devc->fw_updated = 0;
676 devc->cur_samplerate = 0;
677 devc->limit_samples = 0;
678 devc->capture_ratio = 0;
679 devc->continuous_mode = FALSE;
680 devc->clock_edge = DS_EDGE_RISING;
685 static void abort_acquisition(struct dev_context *devc)
689 devc->acq_aborted = TRUE;
691 for (i = devc->num_transfers - 1; i >= 0; i--) {
692 if (devc->transfers[i])
693 libusb_cancel_transfer(devc->transfers[i]);
697 static void finish_acquisition(struct sr_dev_inst *sdi)
699 struct dev_context *devc;
703 std_session_send_df_end(sdi);
705 usb_source_remove(sdi->session, devc->ctx);
707 devc->num_transfers = 0;
708 g_free(devc->transfers);
709 g_free(devc->deinterleave_buffer);
712 static void free_transfer(struct libusb_transfer *transfer)
714 struct sr_dev_inst *sdi;
715 struct dev_context *devc;
718 sdi = transfer->user_data;
721 g_free(transfer->buffer);
722 transfer->buffer = NULL;
723 libusb_free_transfer(transfer);
725 for (i = 0; i < devc->num_transfers; i++) {
726 if (devc->transfers[i] == transfer) {
727 devc->transfers[i] = NULL;
732 devc->submitted_transfers--;
733 if (devc->submitted_transfers == 0)
734 finish_acquisition(sdi);
737 static void resubmit_transfer(struct libusb_transfer *transfer)
741 if ((ret = libusb_submit_transfer(transfer)) == LIBUSB_SUCCESS)
744 sr_err("%s: %s", __func__, libusb_error_name(ret));
745 free_transfer(transfer);
749 static void deinterleave_buffer(const uint8_t *src, size_t length,
750 uint16_t *dst_ptr, size_t channel_count, uint16_t channel_mask)
754 for (const uint64_t *src_ptr = (uint64_t*)src;
755 src_ptr < (uint64_t*)(src + length);
756 src_ptr += channel_count) {
757 for (int bit = 0; bit != 64; bit++) {
758 const uint64_t *word_ptr = src_ptr;
760 for (size_t channel = 0; channel != channel_count;
762 if ((channel_mask & (1 << channel)) &&
763 (*word_ptr++ & (1ULL << bit)))
764 sample |= 1 << channel;
771 static void send_data(struct sr_dev_inst *sdi,
772 uint16_t *data, size_t sample_count)
774 const struct sr_datafeed_logic logic = {
775 .length = sample_count * sizeof(uint16_t),
776 .unitsize = sizeof(uint16_t),
780 const struct sr_datafeed_packet packet = {
785 sr_session_send(sdi, &packet);
788 static void LIBUSB_CALL receive_transfer(struct libusb_transfer *transfer)
790 struct sr_dev_inst *const sdi = transfer->user_data;
791 struct dev_context *const devc = sdi->priv;
792 const size_t channel_count = enabled_channel_count(sdi);
793 const uint16_t channel_mask = enabled_channel_mask(sdi);
794 const unsigned int cur_sample_count = DSLOGIC_ATOMIC_SAMPLES *
795 transfer->actual_length /
796 (DSLOGIC_ATOMIC_BYTES * channel_count);
798 gboolean packet_has_error = FALSE;
799 struct sr_datafeed_packet packet;
800 unsigned int num_samples;
804 * If acquisition has already ended, just free any queued up
805 * transfer that come in.
807 if (devc->acq_aborted) {
808 free_transfer(transfer);
812 sr_dbg("receive_transfer(): status %s received %d bytes.",
813 libusb_error_name(transfer->status), transfer->actual_length);
815 /* Save incoming transfer before reusing the transfer struct. */
817 switch (transfer->status) {
818 case LIBUSB_TRANSFER_NO_DEVICE:
819 abort_acquisition(devc);
820 free_transfer(transfer);
822 case LIBUSB_TRANSFER_COMPLETED:
823 case LIBUSB_TRANSFER_TIMED_OUT: /* We may have received some data though. */
826 packet_has_error = TRUE;
830 if (transfer->actual_length == 0 || packet_has_error) {
831 devc->empty_transfer_count++;
832 if (devc->empty_transfer_count > MAX_EMPTY_TRANSFERS) {
834 * The FX2 gave up. End the acquisition, the frontend
835 * will work out that the samplecount is short.
837 abort_acquisition(devc);
838 free_transfer(transfer);
840 resubmit_transfer(transfer);
844 devc->empty_transfer_count = 0;
847 if (!devc->limit_samples || devc->sent_samples < devc->limit_samples) {
848 if (devc->limit_samples && devc->sent_samples + cur_sample_count > devc->limit_samples)
849 num_samples = devc->limit_samples - devc->sent_samples;
851 num_samples = cur_sample_count;
854 * The DSLogic emits sample data as sequences of 64-bit sample words
855 * in a round-robin i.e. 64-bits from channel 0, 64-bits from channel 1
856 * etc. for each of the enabled channels, then looping back to the
859 * Because sigrok's internal representation is bit-interleaved channels
860 * we must recast the data.
862 * Hopefully in future it will be possible to pass the data on as-is.
864 assert(transfer->actual_length % (DSLOGIC_ATOMIC_BYTES * channel_count) == 0);
865 deinterleave_buffer(transfer->buffer, transfer->actual_length,
866 devc->deinterleave_buffer, channel_count, channel_mask);
868 /* Send the incoming transfer to the session bus. */
869 if (devc->trigger_pos > devc->sent_samples
870 && devc->trigger_pos <= devc->sent_samples + num_samples) {
871 /* DSLogic trigger in this block. Send trigger position. */
872 trigger_offset = devc->trigger_pos - devc->sent_samples;
873 /* Pre-trigger samples. */
874 send_data(sdi, devc->deinterleave_buffer, trigger_offset);
875 devc->sent_samples += trigger_offset;
876 /* Trigger position. */
877 devc->trigger_pos = 0;
878 packet.type = SR_DF_TRIGGER;
879 packet.payload = NULL;
880 sr_session_send(sdi, &packet);
881 /* Post trigger samples. */
882 num_samples -= trigger_offset;
883 send_data(sdi, devc->deinterleave_buffer
884 + trigger_offset, num_samples);
885 devc->sent_samples += num_samples;
887 send_data(sdi, devc->deinterleave_buffer, num_samples);
888 devc->sent_samples += num_samples;
892 if (devc->limit_samples && devc->sent_samples >= devc->limit_samples) {
893 abort_acquisition(devc);
894 free_transfer(transfer);
896 resubmit_transfer(transfer);
899 static int receive_data(int fd, int revents, void *cb_data)
902 struct drv_context *drvc;
907 drvc = (struct drv_context *)cb_data;
909 tv.tv_sec = tv.tv_usec = 0;
910 libusb_handle_events_timeout(drvc->sr_ctx->libusb_ctx, &tv);
915 static size_t to_bytes_per_ms(const struct sr_dev_inst *sdi)
917 const struct dev_context *const devc = sdi->priv;
918 const size_t ch_count = enabled_channel_count(sdi);
920 if (devc->continuous_mode)
921 return (devc->cur_samplerate * ch_count) / (1000 * 8);
924 /* If we're in buffered mode, the transfer rate is not so important,
925 * but we expect to get at least 10% of the high-speed USB bandwidth.
927 return 35000000 / (1000 * 10);
930 static size_t get_buffer_size(const struct sr_dev_inst *sdi)
933 * The buffer should be large enough to hold 10ms of data and
934 * a multiple of the size of a data atom.
936 const size_t block_size = enabled_channel_count(sdi) * 512;
937 const size_t s = 10 * to_bytes_per_ms(sdi);
938 return ((s + block_size - 1) / block_size) * block_size;
941 static unsigned int get_number_of_transfers(const struct sr_dev_inst *sdi)
943 /* Total buffer size should be able to hold about 100ms of data. */
944 const unsigned int s = get_buffer_size(sdi);
945 const unsigned int n = (100 * to_bytes_per_ms(sdi) + s - 1) / s;
946 return (n > NUM_SIMUL_TRANSFERS) ? NUM_SIMUL_TRANSFERS : n;
949 static unsigned int get_timeout(const struct sr_dev_inst *sdi)
951 const size_t total_size = get_buffer_size(sdi) *
952 get_number_of_transfers(sdi);
953 const unsigned int timeout = total_size / to_bytes_per_ms(sdi);
954 return timeout + timeout / 4; /* Leave a headroom of 25% percent. */
957 static int start_transfers(const struct sr_dev_inst *sdi)
959 const size_t channel_count = enabled_channel_count(sdi);
960 const size_t size = get_buffer_size(sdi);
961 const unsigned int num_transfers = get_number_of_transfers(sdi);
962 const unsigned int timeout = get_timeout(sdi);
964 struct dev_context *devc;
965 struct sr_usb_dev_inst *usb;
966 struct libusb_transfer *transfer;
974 devc->sent_samples = 0;
975 devc->acq_aborted = FALSE;
976 devc->empty_transfer_count = 0;
977 devc->submitted_transfers = 0;
979 g_free(devc->transfers);
980 devc->transfers = g_try_malloc0(sizeof(*devc->transfers) * num_transfers);
981 if (!devc->transfers) {
982 sr_err("USB transfers malloc failed.");
983 return SR_ERR_MALLOC;
986 devc->deinterleave_buffer = g_try_malloc(DSLOGIC_ATOMIC_SAMPLES *
987 (size / (channel_count * DSLOGIC_ATOMIC_BYTES)) * sizeof(uint16_t));
988 if (!devc->deinterleave_buffer) {
989 sr_err("Deinterleave buffer malloc failed.");
990 g_free(devc->deinterleave_buffer);
991 return SR_ERR_MALLOC;
994 devc->num_transfers = num_transfers;
995 for (i = 0; i < num_transfers; i++) {
996 if (!(buf = g_try_malloc(size))) {
997 sr_err("USB transfer buffer malloc failed.");
998 return SR_ERR_MALLOC;
1000 transfer = libusb_alloc_transfer(0);
1001 libusb_fill_bulk_transfer(transfer, usb->devhdl,
1002 6 | LIBUSB_ENDPOINT_IN, buf, size,
1003 receive_transfer, (void *)sdi, timeout);
1004 sr_info("submitting transfer: %d", i);
1005 if ((ret = libusb_submit_transfer(transfer)) != 0) {
1006 sr_err("Failed to submit transfer: %s.",
1007 libusb_error_name(ret));
1008 libusb_free_transfer(transfer);
1010 abort_acquisition(devc);
1013 devc->transfers[i] = transfer;
1014 devc->submitted_transfers++;
1017 std_session_send_df_header(sdi);
1022 static void LIBUSB_CALL trigger_receive(struct libusb_transfer *transfer)
1024 const struct sr_dev_inst *sdi;
1025 struct dslogic_trigger_pos *tpos;
1026 struct dev_context *devc;
1028 sdi = transfer->user_data;
1030 if (transfer->status == LIBUSB_TRANSFER_CANCELLED) {
1031 sr_dbg("Trigger transfer canceled.");
1032 /* Terminate session. */
1033 std_session_send_df_end(sdi);
1034 usb_source_remove(sdi->session, devc->ctx);
1035 devc->num_transfers = 0;
1036 g_free(devc->transfers);
1037 } else if (transfer->status == LIBUSB_TRANSFER_COMPLETED
1038 && transfer->actual_length == sizeof(struct dslogic_trigger_pos)) {
1039 tpos = (struct dslogic_trigger_pos *)transfer->buffer;
1040 sr_info("tpos real_pos %d ram_saddr %d cnt %d", tpos->real_pos,
1041 tpos->ram_saddr, tpos->remain_cnt);
1042 devc->trigger_pos = tpos->real_pos;
1044 start_transfers(sdi);
1046 libusb_free_transfer(transfer);
1049 SR_PRIV int dslogic_acquisition_start(const struct sr_dev_inst *sdi)
1051 const unsigned int timeout = get_timeout(sdi);
1053 struct sr_dev_driver *di;
1054 struct drv_context *drvc;
1055 struct dev_context *devc;
1056 struct sr_usb_dev_inst *usb;
1057 struct dslogic_trigger_pos *tpos;
1058 struct libusb_transfer *transfer;
1061 if (sdi->status != SR_ST_ACTIVE)
1062 return SR_ERR_DEV_CLOSED;
1069 devc->ctx = drvc->sr_ctx;
1070 devc->sent_samples = 0;
1071 devc->empty_transfer_count = 0;
1072 devc->acq_aborted = FALSE;
1074 usb_source_add(sdi->session, devc->ctx, timeout, receive_data, drvc);
1076 if ((ret = command_stop_acquisition(sdi)) != SR_OK)
1079 if ((ret = fpga_configure(sdi)) != SR_OK)
1082 if ((ret = command_start_acquisition(sdi)) != SR_OK)
1085 sr_dbg("Getting trigger.");
1086 tpos = g_malloc(sizeof(struct dslogic_trigger_pos));
1087 transfer = libusb_alloc_transfer(0);
1088 libusb_fill_bulk_transfer(transfer, usb->devhdl, 6 | LIBUSB_ENDPOINT_IN,
1089 (unsigned char *)tpos, sizeof(struct dslogic_trigger_pos),
1090 trigger_receive, (void *)sdi, 0);
1091 if ((ret = libusb_submit_transfer(transfer)) < 0) {
1092 sr_err("Failed to request trigger: %s.", libusb_error_name(ret));
1093 libusb_free_transfer(transfer);
1098 devc->transfers = g_try_malloc0(sizeof(*devc->transfers));
1099 if (!devc->transfers) {
1100 sr_err("USB trigger_pos transfer malloc failed.");
1101 return SR_ERR_MALLOC;
1103 devc->num_transfers = 1;
1104 devc->submitted_transfers++;
1105 devc->transfers[0] = transfer;
1110 SR_PRIV int dslogic_acquisition_stop(struct sr_dev_inst *sdi)
1112 command_stop_acquisition(sdi);
1113 abort_acquisition(sdi->priv);