]> sigrok.org Git - libsigrok.git/blob - src/hardware/dreamsourcelab-dslogic/protocol.c
dreamsourcelab-dslogic: avoid division by zero
[libsigrok.git] / src / hardware / dreamsourcelab-dslogic / protocol.c
1 /*
2  * This file is part of the libsigrok project.
3  *
4  * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
5  * Copyright (C) 2012 Joel Holdsworth <joel@airwebreathe.org.uk>
6  *
7  * This program is free software: you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License as published by
9  * the Free Software Foundation, either version 3 of the License, or
10  * (at your option) any later version.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  * GNU General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License
18  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
19  */
20
21 #include <config.h>
22 #include <math.h>
23 #include <stdbool.h>
24 #include <glib.h>
25 #include <glib/gstdio.h>
26 #include "protocol.h"
27
28 #define DS_CMD_GET_FW_VERSION           0xb0
29 #define DS_CMD_GET_REVID_VERSION        0xb1
30 #define DS_CMD_START                    0xb2
31 #define DS_CMD_CONFIG                   0xb3
32 #define DS_CMD_SETTING                  0xb4
33 #define DS_CMD_CONTROL                  0xb5
34 #define DS_CMD_STATUS                   0xb6
35 #define DS_CMD_STATUS_INFO              0xb7
36 #define DS_CMD_WR_REG                   0xb8
37 #define DS_CMD_WR_NVM                   0xb9
38 #define DS_CMD_RD_NVM                   0xba
39 #define DS_CMD_RD_NVM_PRE               0xbb
40 #define DS_CMD_GET_HW_INFO              0xbc
41
42 #define DS_START_FLAGS_STOP             (1 << 7)
43 #define DS_START_FLAGS_CLK_48MHZ        (1 << 6)
44 #define DS_START_FLAGS_SAMPLE_WIDE      (1 << 5)
45 #define DS_START_FLAGS_MODE_LA          (1 << 4)
46
47 #define DS_ADDR_COMB                    0x68
48 #define DS_ADDR_EEWP                    0x70
49 #define DS_ADDR_VTH                     0x78
50
51 #define DS_MAX_LOGIC_DEPTH              SR_MHZ(16)
52 #define DS_MAX_LOGIC_SAMPLERATE         SR_MHZ(100)
53 #define DS_MAX_TRIG_PERCENT             90
54
55 #define DS_MODE_TRIG_EN                 (1 << 0)
56 #define DS_MODE_CLK_TYPE                (1 << 1)
57 #define DS_MODE_CLK_EDGE                (1 << 2)
58 #define DS_MODE_RLE_MODE                (1 << 3)
59 #define DS_MODE_DSO_MODE                (1 << 4)
60 #define DS_MODE_HALF_MODE               (1 << 5)
61 #define DS_MODE_QUAR_MODE               (1 << 6)
62 #define DS_MODE_ANALOG_MODE             (1 << 7)
63 #define DS_MODE_FILTER                  (1 << 8)
64 #define DS_MODE_INSTANT                 (1 << 9)
65 #define DS_MODE_STRIG_MODE              (1 << 11)
66 #define DS_MODE_STREAM_MODE             (1 << 12)
67 #define DS_MODE_LPB_TEST                (1 << 13)
68 #define DS_MODE_EXT_TEST                (1 << 14)
69 #define DS_MODE_INT_TEST                (1 << 15)
70
71 #define DSLOGIC_ATOMIC_SAMPLES          (sizeof(uint64_t) * 8)
72 #define DSLOGIC_ATOMIC_BYTES            sizeof(uint64_t)
73
74 /*
75  * The FPGA is configured with TLV tuples. Length is specified as the
76  * number of 16-bit words.
77  */
78 #define _DS_CFG(variable, wordcnt) ((variable << 8) | wordcnt)
79 #define DS_CFG_START                    0xf5a5f5a5
80 #define DS_CFG_MODE                     _DS_CFG(0, 1)
81 #define DS_CFG_DIVIDER                  _DS_CFG(1, 2)
82 #define DS_CFG_COUNT                    _DS_CFG(3, 2)
83 #define DS_CFG_TRIG_POS                 _DS_CFG(5, 2)
84 #define DS_CFG_TRIG_GLB                 _DS_CFG(7, 1)
85 #define DS_CFG_CH_EN                    _DS_CFG(8, 1)
86 #define DS_CFG_TRIG                     _DS_CFG(64, 160)
87 #define DS_CFG_END                      0xfa5afa5a
88
89 #pragma pack(push, 1)
90
91 struct version_info {
92         uint8_t major;
93         uint8_t minor;
94 };
95
96 struct cmd_start_acquisition {
97         uint8_t flags;
98         uint8_t sample_delay_h;
99         uint8_t sample_delay_l;
100 };
101
102 struct fpga_config {
103         uint32_t sync;
104
105         uint16_t mode_header;
106         uint16_t mode;
107         uint16_t divider_header;
108         uint32_t divider;
109         uint16_t count_header;
110         uint32_t count;
111         uint16_t trig_pos_header;
112         uint32_t trig_pos;
113         uint16_t trig_glb_header;
114         uint16_t trig_glb;
115         uint16_t ch_en_header;
116         uint16_t ch_en;
117
118         uint16_t trig_header;
119         uint16_t trig_mask0[NUM_TRIGGER_STAGES];
120         uint16_t trig_mask1[NUM_TRIGGER_STAGES];
121         uint16_t trig_value0[NUM_TRIGGER_STAGES];
122         uint16_t trig_value1[NUM_TRIGGER_STAGES];
123         uint16_t trig_edge0[NUM_TRIGGER_STAGES];
124         uint16_t trig_edge1[NUM_TRIGGER_STAGES];
125         uint16_t trig_logic0[NUM_TRIGGER_STAGES];
126         uint16_t trig_logic1[NUM_TRIGGER_STAGES];
127         uint32_t trig_count[NUM_TRIGGER_STAGES];
128
129         uint32_t end_sync;
130 };
131
132 #pragma pack(pop)
133
134 /*
135  * This should be larger than the FPGA bitstream image so that it'll get
136  * uploaded in one big operation. There seem to be issues when uploading
137  * it in chunks.
138  */
139 #define FW_BUFSIZE (1024 * 1024)
140
141 #define FPGA_UPLOAD_DELAY (10 * 1000)
142
143 #define USB_TIMEOUT (3 * 1000)
144
145 static int command_get_fw_version(libusb_device_handle *devhdl,
146                                   struct version_info *vi)
147 {
148         int ret;
149
150         ret = libusb_control_transfer(devhdl, LIBUSB_REQUEST_TYPE_VENDOR |
151                 LIBUSB_ENDPOINT_IN, DS_CMD_GET_FW_VERSION, 0x0000, 0x0000,
152                 (unsigned char *)vi, sizeof(struct version_info), USB_TIMEOUT);
153
154         if (ret < 0) {
155                 sr_err("Unable to get version info: %s.",
156                        libusb_error_name(ret));
157                 return SR_ERR;
158         }
159
160         return SR_OK;
161 }
162
163 static int command_get_revid_version(struct sr_dev_inst *sdi, uint8_t *revid)
164 {
165         struct sr_usb_dev_inst *usb = sdi->conn;
166         libusb_device_handle *devhdl = usb->devhdl;
167         int ret;
168
169         ret = libusb_control_transfer(devhdl, LIBUSB_REQUEST_TYPE_VENDOR |
170                 LIBUSB_ENDPOINT_IN, DS_CMD_GET_REVID_VERSION, 0x0000, 0x0000,
171                 revid, 1, USB_TIMEOUT);
172
173         if (ret < 0) {
174                 sr_err("Unable to get REVID: %s.", libusb_error_name(ret));
175                 return SR_ERR;
176         }
177
178         return SR_OK;
179 }
180
181 static int command_start_acquisition(const struct sr_dev_inst *sdi)
182 {
183         struct sr_usb_dev_inst *usb;
184         struct dslogic_mode mode;
185         int ret;
186
187         mode.flags = DS_START_FLAGS_MODE_LA | DS_START_FLAGS_SAMPLE_WIDE;
188         mode.sample_delay_h = mode.sample_delay_l = 0;
189
190         usb = sdi->conn;
191         ret = libusb_control_transfer(usb->devhdl, LIBUSB_REQUEST_TYPE_VENDOR |
192                         LIBUSB_ENDPOINT_OUT, DS_CMD_START, 0x0000, 0x0000,
193                         (unsigned char *)&mode, sizeof(mode), USB_TIMEOUT);
194         if (ret < 0) {
195                 sr_err("Failed to send start command: %s.", libusb_error_name(ret));
196                 return SR_ERR;
197         }
198
199         return SR_OK;
200 }
201
202 static int command_stop_acquisition(const struct sr_dev_inst *sdi)
203 {
204         struct sr_usb_dev_inst *usb;
205         struct dslogic_mode mode;
206         int ret;
207
208         mode.flags = DS_START_FLAGS_STOP;
209         mode.sample_delay_h = mode.sample_delay_l = 0;
210
211         usb = sdi->conn;
212         ret = libusb_control_transfer(usb->devhdl, LIBUSB_REQUEST_TYPE_VENDOR |
213                         LIBUSB_ENDPOINT_OUT, DS_CMD_START, 0x0000, 0x0000,
214                         (unsigned char *)&mode, sizeof(struct dslogic_mode), USB_TIMEOUT);
215         if (ret < 0) {
216                 sr_err("Failed to send stop command: %s.", libusb_error_name(ret));
217                 return SR_ERR;
218         }
219
220         return SR_OK;
221 }
222
223 SR_PRIV int dslogic_fpga_firmware_upload(const struct sr_dev_inst *sdi)
224 {
225         const char *name = NULL;
226         uint64_t sum;
227         struct sr_resource bitstream;
228         struct drv_context *drvc;
229         struct dev_context *devc;
230         struct sr_usb_dev_inst *usb;
231         unsigned char *buf;
232         ssize_t chunksize;
233         int transferred;
234         int result, ret;
235         const uint8_t cmd[3] = {0, 0, 0};
236
237         drvc = sdi->driver->context;
238         devc = sdi->priv;
239         usb = sdi->conn;
240
241         if (!strcmp(devc->profile->model, "DSLogic")) {
242                 if (devc->cur_threshold < 1.40)
243                         name = DSLOGIC_FPGA_FIRMWARE_3V3;
244                 else
245                         name = DSLOGIC_FPGA_FIRMWARE_5V;
246         } else if (!strcmp(devc->profile->model, "DSLogic Pro")){
247                 name = DSLOGIC_PRO_FPGA_FIRMWARE;
248         } else if (!strcmp(devc->profile->model, "DSLogic Plus")){
249                 name = DSLOGIC_PLUS_FPGA_FIRMWARE;
250         } else if (!strcmp(devc->profile->model, "DSLogic Basic")){
251                 name = DSLOGIC_BASIC_FPGA_FIRMWARE;
252         } else if (!strcmp(devc->profile->model, "DSCope")) {
253                 name = DSCOPE_FPGA_FIRMWARE;
254         } else {
255                 sr_err("Failed to select FPGA firmware.");
256                 return SR_ERR;
257         }
258
259         sr_dbg("Uploading FPGA firmware '%s'.", name);
260
261         result = sr_resource_open(drvc->sr_ctx, &bitstream,
262                         SR_RESOURCE_FIRMWARE, name);
263         if (result != SR_OK)
264                 return result;
265
266         /* Tell the device firmware is coming. */
267         if ((ret = libusb_control_transfer(usb->devhdl, LIBUSB_REQUEST_TYPE_VENDOR |
268                         LIBUSB_ENDPOINT_OUT, DS_CMD_CONFIG, 0x0000, 0x0000,
269                         (unsigned char *)&cmd, sizeof(cmd), USB_TIMEOUT)) < 0) {
270                 sr_err("Failed to upload FPGA firmware: %s.", libusb_error_name(ret));
271                 sr_resource_close(drvc->sr_ctx, &bitstream);
272                 return SR_ERR;
273         }
274
275         /* Give the FX2 time to get ready for FPGA firmware upload. */
276         g_usleep(FPGA_UPLOAD_DELAY);
277
278         buf = g_malloc(FW_BUFSIZE);
279         sum = 0;
280         result = SR_OK;
281         while (1) {
282                 chunksize = sr_resource_read(drvc->sr_ctx, &bitstream,
283                                 buf, FW_BUFSIZE);
284                 if (chunksize < 0)
285                         result = SR_ERR;
286                 if (chunksize <= 0)
287                         break;
288
289                 if ((ret = libusb_bulk_transfer(usb->devhdl, 2 | LIBUSB_ENDPOINT_OUT,
290                                 buf, chunksize, &transferred, USB_TIMEOUT)) < 0) {
291                         sr_err("Unable to configure FPGA firmware: %s.",
292                                         libusb_error_name(ret));
293                         result = SR_ERR;
294                         break;
295                 }
296                 sum += transferred;
297                 sr_spew("Uploaded %" PRIu64 "/%" PRIu64 " bytes.",
298                         sum, bitstream.size);
299
300                 if (transferred != chunksize) {
301                         sr_err("Short transfer while uploading FPGA firmware.");
302                         result = SR_ERR;
303                         break;
304                 }
305         }
306         g_free(buf);
307         sr_resource_close(drvc->sr_ctx, &bitstream);
308
309         if (result == SR_OK)
310                 sr_dbg("FPGA firmware upload done.");
311
312         return result;
313 }
314
315 static unsigned int enabled_channel_count(const struct sr_dev_inst *sdi)
316 {
317         unsigned int count = 0;
318         for (const GSList *l = sdi->channels; l; l = l->next) {
319                 const struct sr_channel *const probe = (struct sr_channel *)l->data;
320                 if (probe->enabled)
321                         count++;
322         }
323         return count;
324 }
325
326 static uint16_t enabled_channel_mask(const struct sr_dev_inst *sdi)
327 {
328         unsigned int mask = 0;
329         for (const GSList *l = sdi->channels; l; l = l->next) {
330                 const struct sr_channel *const probe = (struct sr_channel *)l->data;
331                 if (probe->enabled)
332                         mask |= 1 << probe->index;
333         }
334         return mask;
335 }
336
337 /*
338  * Get the session trigger and configure the FPGA structure
339  * accordingly.
340  * @return @c true if any triggers are enabled, @c false otherwise.
341  */
342 static bool set_trigger(const struct sr_dev_inst *sdi, struct fpga_config *cfg)
343 {
344         struct sr_trigger *trigger;
345         struct sr_trigger_stage *stage;
346         struct sr_trigger_match *match;
347         struct dev_context *devc;
348         const GSList *l, *m;
349         const unsigned int num_enabled_channels = enabled_channel_count(sdi);
350         int num_trigger_stages = 0;
351
352         int channelbit, i = 0;
353         uint32_t trigger_point;
354
355         devc = sdi->priv;
356
357         cfg->ch_en = enabled_channel_mask(sdi);
358
359         for (i = 0; i < NUM_TRIGGER_STAGES; i++) {
360                 cfg->trig_mask0[i] = 0xffff;
361                 cfg->trig_mask1[i] = 0xffff;
362                 cfg->trig_value0[i] = 0;
363                 cfg->trig_value1[i] = 0;
364                 cfg->trig_edge0[i] = 0;
365                 cfg->trig_edge1[i] = 0;
366                 cfg->trig_logic0[i] = 2;
367                 cfg->trig_logic1[i] = 2;
368                 cfg->trig_count[i] = 0;
369         }
370
371         trigger_point = (devc->capture_ratio * devc->limit_samples) / 100;
372         if (trigger_point < DSLOGIC_ATOMIC_SAMPLES)
373                 trigger_point = DSLOGIC_ATOMIC_SAMPLES;
374         const uint32_t mem_depth = devc->profile->mem_depth;
375         const uint32_t max_trigger_point = devc->continuous_mode ? ((mem_depth * 10) / 100) :
376                 ((mem_depth * DS_MAX_TRIG_PERCENT) / 100);
377         if (trigger_point > max_trigger_point)
378                 trigger_point = max_trigger_point;
379         cfg->trig_pos = trigger_point & ~(DSLOGIC_ATOMIC_SAMPLES - 1);
380
381         if (!(trigger = sr_session_trigger_get(sdi->session))) {
382                 sr_dbg("No session trigger found");
383                 return false;
384         }
385
386         for (l = trigger->stages; l; l = l->next) {
387                 stage = l->data;
388                 num_trigger_stages++;
389                 for (m = stage->matches; m; m = m->next) {
390                         match = m->data;
391                         if (!match->channel->enabled)
392                                 /* Ignore disabled channels with a trigger. */
393                                 continue;
394                         channelbit = 1 << (match->channel->index);
395                         /* Simple trigger support (event). */
396                         if (match->match == SR_TRIGGER_ONE) {
397                                 cfg->trig_mask0[0] &= ~channelbit;
398                                 cfg->trig_mask1[0] &= ~channelbit;
399                                 cfg->trig_value0[0] |= channelbit;
400                                 cfg->trig_value1[0] |= channelbit;
401                         } else if (match->match == SR_TRIGGER_ZERO) {
402                                 cfg->trig_mask0[0] &= ~channelbit;
403                                 cfg->trig_mask1[0] &= ~channelbit;
404                         } else if (match->match == SR_TRIGGER_FALLING) {
405                                 cfg->trig_mask0[0] &= ~channelbit;
406                                 cfg->trig_mask1[0] &= ~channelbit;
407                                 cfg->trig_edge0[0] |= channelbit;
408                                 cfg->trig_edge1[0] |= channelbit;
409                         } else if (match->match == SR_TRIGGER_RISING) {
410                                 cfg->trig_mask0[0] &= ~channelbit;
411                                 cfg->trig_mask1[0] &= ~channelbit;
412                                 cfg->trig_value0[0] |= channelbit;
413                                 cfg->trig_value1[0] |= channelbit;
414                                 cfg->trig_edge0[0] |= channelbit;
415                                 cfg->trig_edge1[0] |= channelbit;
416                         } else if (match->match == SR_TRIGGER_EDGE) {
417                                 cfg->trig_edge0[0] |= channelbit;
418                                 cfg->trig_edge1[0] |= channelbit;
419                         }
420                 }
421         }
422
423         cfg->trig_glb = (num_enabled_channels << 4) | (num_trigger_stages - 1);
424
425         return num_trigger_stages != 0;
426 }
427
428 static int fpga_configure(const struct sr_dev_inst *sdi)
429 {
430         const struct dev_context *const devc = sdi->priv;
431         const struct sr_usb_dev_inst *const usb = sdi->conn;
432         uint8_t c[3];
433         struct fpga_config cfg;
434         uint16_t mode = 0;
435         uint32_t divider;
436         int transferred, len, ret;
437
438         sr_dbg("Configuring FPGA.");
439
440         WL32(&cfg.sync, DS_CFG_START);
441         WL16(&cfg.mode_header, DS_CFG_MODE);
442         WL16(&cfg.divider_header, DS_CFG_DIVIDER);
443         WL16(&cfg.count_header, DS_CFG_COUNT);
444         WL16(&cfg.trig_pos_header, DS_CFG_TRIG_POS);
445         WL16(&cfg.trig_glb_header, DS_CFG_TRIG_GLB);
446         WL16(&cfg.ch_en_header, DS_CFG_CH_EN);
447         WL16(&cfg.trig_header, DS_CFG_TRIG);
448         WL32(&cfg.end_sync, DS_CFG_END);
449
450         /* Pass in the length of a fixed-size struct. Really. */
451         len = sizeof(struct fpga_config) / 2;
452         c[0] = len & 0xff;
453         c[1] = (len >> 8) & 0xff;
454         c[2] = (len >> 16) & 0xff;
455
456         ret = libusb_control_transfer(usb->devhdl, LIBUSB_REQUEST_TYPE_VENDOR |
457                         LIBUSB_ENDPOINT_OUT, DS_CMD_SETTING, 0x0000, 0x0000,
458                         c, sizeof(c), USB_TIMEOUT);
459         if (ret < 0) {
460                 sr_err("Failed to send FPGA configure command: %s.",
461                         libusb_error_name(ret));
462                 return SR_ERR;
463         }
464
465         if (set_trigger(sdi, &cfg))
466                 mode |= DS_MODE_TRIG_EN;
467
468         if (devc->mode == DS_OP_INTERNAL_TEST)
469                 mode |= DS_MODE_INT_TEST;
470         else if (devc->mode == DS_OP_EXTERNAL_TEST)
471                 mode |= DS_MODE_EXT_TEST;
472         else if (devc->mode == DS_OP_LOOPBACK_TEST)
473                 mode |= DS_MODE_LPB_TEST;
474
475         if (devc->cur_samplerate == DS_MAX_LOGIC_SAMPLERATE * 2)
476                 mode |= DS_MODE_HALF_MODE;
477         else if (devc->cur_samplerate == DS_MAX_LOGIC_SAMPLERATE * 4)
478                 mode |= DS_MODE_QUAR_MODE;
479
480         if (devc->continuous_mode)
481                 mode |= DS_MODE_STREAM_MODE;
482         if (devc->external_clock) {
483                 mode |= DS_MODE_CLK_TYPE;
484                 if (devc->clock_edge == DS_EDGE_FALLING)
485                         mode |= DS_MODE_CLK_EDGE;
486         }
487         if (devc->limit_samples > DS_MAX_LOGIC_DEPTH *
488                 ceil(devc->cur_samplerate * 1.0 / DS_MAX_LOGIC_SAMPLERATE)
489                 && !devc->continuous_mode) {
490                 /* Enable RLE for long captures.
491                  * Without this, captured data present errors.
492                  */
493                 mode |= DS_MODE_RLE_MODE;
494         }
495
496         WL16(&cfg.mode, mode);
497         divider = ceil(DS_MAX_LOGIC_SAMPLERATE * 1.0 / devc->cur_samplerate);
498         WL32(&cfg.divider, divider);
499
500         /* Number of 16-sample units. */
501         WL32(&cfg.count, devc->limit_samples / 16);
502
503         len = sizeof(struct fpga_config);
504         ret = libusb_bulk_transfer(usb->devhdl, 2 | LIBUSB_ENDPOINT_OUT,
505                         (unsigned char *)&cfg, len, &transferred, USB_TIMEOUT);
506         if (ret < 0 || transferred != len) {
507                 sr_err("Failed to send FPGA configuration: %s.", libusb_error_name(ret));
508                 return SR_ERR;
509         }
510
511         return SR_OK;
512 }
513
514 SR_PRIV int dslogic_set_voltage_threshold(const struct sr_dev_inst *sdi, double threshold)
515 {
516         int ret;
517         struct dev_context *const devc = sdi->priv;
518         const struct sr_usb_dev_inst *const usb = sdi->conn;
519         const uint8_t value = (threshold / 5.0) * 255;
520         const uint16_t cmd = value | (DS_ADDR_VTH << 8);
521
522         /* Send the control command. */
523         ret = libusb_control_transfer(usb->devhdl,
524                         LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_ENDPOINT_OUT,
525                         DS_CMD_WR_REG, 0x0000, 0x0000,
526                         (unsigned char *)&cmd, sizeof(cmd), 3000);
527         if (ret < 0) {
528                 sr_err("Unable to set voltage-threshold register: %s.",
529                 libusb_error_name(ret));
530                 return SR_ERR;
531         }
532
533         devc->cur_threshold = threshold;
534
535         return SR_OK;
536 }
537
538 SR_PRIV int dslogic_dev_open(struct sr_dev_inst *sdi, struct sr_dev_driver *di)
539 {
540         libusb_device **devlist;
541         struct sr_usb_dev_inst *usb;
542         struct libusb_device_descriptor des;
543         struct dev_context *devc;
544         struct drv_context *drvc;
545         struct version_info vi;
546         int ret = SR_ERR, i, device_count;
547         uint8_t revid;
548         char connection_id[64];
549
550         drvc = di->context;
551         devc = sdi->priv;
552         usb = sdi->conn;
553
554         device_count = libusb_get_device_list(drvc->sr_ctx->libusb_ctx, &devlist);
555         if (device_count < 0) {
556                 sr_err("Failed to get device list: %s.",
557                        libusb_error_name(device_count));
558                 return SR_ERR;
559         }
560
561         for (i = 0; i < device_count; i++) {
562                 libusb_get_device_descriptor(devlist[i], &des);
563
564                 if (des.idVendor != devc->profile->vid
565                     || des.idProduct != devc->profile->pid)
566                         continue;
567
568                 if ((sdi->status == SR_ST_INITIALIZING) ||
569                                 (sdi->status == SR_ST_INACTIVE)) {
570                         /* Check device by its physical USB bus/port address. */
571                         usb_get_port_path(devlist[i], connection_id, sizeof(connection_id));
572                         if (strcmp(sdi->connection_id, connection_id))
573                                 /* This is not the one. */
574                                 continue;
575                 }
576
577                 if (!(ret = libusb_open(devlist[i], &usb->devhdl))) {
578                         if (usb->address == 0xff)
579                                 /*
580                                  * First time we touch this device after FW
581                                  * upload, so we don't know the address yet.
582                                  */
583                                 usb->address = libusb_get_device_address(devlist[i]);
584                 } else {
585                         sr_err("Failed to open device: %s.",
586                                libusb_error_name(ret));
587                         ret = SR_ERR;
588                         break;
589                 }
590
591                 if (libusb_has_capability(LIBUSB_CAP_SUPPORTS_DETACH_KERNEL_DRIVER)) {
592                         if (libusb_kernel_driver_active(usb->devhdl, USB_INTERFACE) == 1) {
593                                 if ((ret = libusb_detach_kernel_driver(usb->devhdl, USB_INTERFACE)) < 0) {
594                                         sr_err("Failed to detach kernel driver: %s.",
595                                                 libusb_error_name(ret));
596                                         ret = SR_ERR;
597                                         break;
598                                 }
599                         }
600                 }
601
602                 ret = command_get_fw_version(usb->devhdl, &vi);
603                 if (ret != SR_OK) {
604                         sr_err("Failed to get firmware version.");
605                         break;
606                 }
607
608                 ret = command_get_revid_version(sdi, &revid);
609                 if (ret != SR_OK) {
610                         sr_err("Failed to get REVID.");
611                         break;
612                 }
613
614                 /*
615                  * Changes in major version mean incompatible/API changes, so
616                  * bail out if we encounter an incompatible version.
617                  * Different minor versions are OK, they should be compatible.
618                  */
619                 if (vi.major != DSLOGIC_REQUIRED_VERSION_MAJOR) {
620                         sr_err("Expected firmware version %d.x, "
621                                "got %d.%d.", DSLOGIC_REQUIRED_VERSION_MAJOR,
622                                vi.major, vi.minor);
623                         ret = SR_ERR;
624                         break;
625                 }
626
627                 sr_info("Opened device on %d.%d (logical) / %s (physical), "
628                         "interface %d, firmware %d.%d.",
629                         usb->bus, usb->address, connection_id,
630                         USB_INTERFACE, vi.major, vi.minor);
631
632                 sr_info("Detected REVID=%d, it's a Cypress CY7C68013%s.",
633                         revid, (revid != 1) ? " (FX2)" : "A (FX2LP)");
634
635                 ret = SR_OK;
636
637                 break;
638         }
639
640         libusb_free_device_list(devlist, 1);
641
642         return ret;
643 }
644
645 SR_PRIV struct dev_context *dslogic_dev_new(void)
646 {
647         struct dev_context *devc;
648
649         devc = g_malloc0(sizeof(struct dev_context));
650         devc->profile = NULL;
651         devc->fw_updated = 0;
652         devc->cur_samplerate = 0;
653         devc->limit_samples = 0;
654         devc->capture_ratio = 0;
655         devc->continuous_mode = FALSE;
656         devc->clock_edge = DS_EDGE_RISING;
657
658         return devc;
659 }
660
661 static void abort_acquisition(struct dev_context *devc)
662 {
663         int i;
664
665         devc->acq_aborted = TRUE;
666
667         for (i = devc->num_transfers - 1; i >= 0; i--) {
668                 if (devc->transfers[i])
669                         libusb_cancel_transfer(devc->transfers[i]);
670         }
671 }
672
673 static void finish_acquisition(struct sr_dev_inst *sdi)
674 {
675         struct dev_context *devc;
676
677         devc = sdi->priv;
678
679         std_session_send_df_end(sdi);
680
681         usb_source_remove(sdi->session, devc->ctx);
682
683         devc->num_transfers = 0;
684         g_free(devc->transfers);
685         g_free(devc->deinterleave_buffer);
686 }
687
688 static void free_transfer(struct libusb_transfer *transfer)
689 {
690         struct sr_dev_inst *sdi;
691         struct dev_context *devc;
692         unsigned int i;
693
694         sdi = transfer->user_data;
695         devc = sdi->priv;
696
697         g_free(transfer->buffer);
698         transfer->buffer = NULL;
699         libusb_free_transfer(transfer);
700
701         for (i = 0; i < devc->num_transfers; i++) {
702                 if (devc->transfers[i] == transfer) {
703                         devc->transfers[i] = NULL;
704                         break;
705                 }
706         }
707
708         devc->submitted_transfers--;
709         if (devc->submitted_transfers == 0)
710                 finish_acquisition(sdi);
711 }
712
713 static void resubmit_transfer(struct libusb_transfer *transfer)
714 {
715         int ret;
716
717         if ((ret = libusb_submit_transfer(transfer)) == LIBUSB_SUCCESS)
718                 return;
719
720         sr_err("%s: %s", __func__, libusb_error_name(ret));
721         free_transfer(transfer);
722
723 }
724
725 static void deinterleave_buffer(const uint8_t *src, size_t length,
726         uint16_t *dst_ptr, size_t channel_count, uint16_t channel_mask)
727 {
728         uint16_t sample;
729
730         for (const uint64_t *src_ptr = (uint64_t*)src;
731                 src_ptr < (uint64_t*)(src + length);
732                 src_ptr += channel_count) {
733                 for (int bit = 0; bit != 64; bit++) {
734                         const uint64_t *word_ptr = src_ptr;
735                         sample = 0;
736                         for (unsigned int channel = 0; channel != 16;
737                                 channel++) {
738                                 const uint16_t m = channel_mask >> channel;
739                                 if (!m)
740                                         break;
741                                 if ((m & 1) && ((*word_ptr++ >> bit) & 1ULL))
742                                         sample |= 1 << channel;
743                         }
744                         *dst_ptr++ = sample;
745                 }
746         }
747 }
748
749 static void send_data(struct sr_dev_inst *sdi,
750         uint16_t *data, size_t sample_count)
751 {
752         const struct sr_datafeed_logic logic = {
753                 .length = sample_count * sizeof(uint16_t),
754                 .unitsize = sizeof(uint16_t),
755                 .data = data
756         };
757
758         const struct sr_datafeed_packet packet = {
759                 .type = SR_DF_LOGIC,
760                 .payload = &logic
761         };
762
763         sr_session_send(sdi, &packet);
764 }
765
766 static void LIBUSB_CALL receive_transfer(struct libusb_transfer *transfer)
767 {
768         struct sr_dev_inst *const sdi = transfer->user_data;
769         struct dev_context *const devc = sdi->priv;
770         const size_t channel_count = enabled_channel_count(sdi);
771         const uint16_t channel_mask = enabled_channel_mask(sdi);
772         const unsigned int cur_sample_count = DSLOGIC_ATOMIC_SAMPLES *
773                 transfer->actual_length /
774                 (DSLOGIC_ATOMIC_BYTES * channel_count);
775
776         gboolean packet_has_error = FALSE;
777         struct sr_datafeed_packet packet;
778         unsigned int num_samples;
779         int trigger_offset;
780
781         /*
782          * If acquisition has already ended, just free any queued up
783          * transfer that come in.
784          */
785         if (devc->acq_aborted) {
786                 free_transfer(transfer);
787                 return;
788         }
789
790         sr_dbg("receive_transfer(): status %s received %d bytes.",
791                 libusb_error_name(transfer->status), transfer->actual_length);
792
793         /* Save incoming transfer before reusing the transfer struct. */
794
795         switch (transfer->status) {
796         case LIBUSB_TRANSFER_NO_DEVICE:
797                 abort_acquisition(devc);
798                 free_transfer(transfer);
799                 return;
800         case LIBUSB_TRANSFER_COMPLETED:
801         case LIBUSB_TRANSFER_TIMED_OUT: /* We may have received some data though. */
802                 break;
803         default:
804                 packet_has_error = TRUE;
805                 break;
806         }
807
808         if (transfer->actual_length == 0 || packet_has_error) {
809                 devc->empty_transfer_count++;
810                 if (devc->empty_transfer_count > MAX_EMPTY_TRANSFERS) {
811                         /*
812                          * The FX2 gave up. End the acquisition, the frontend
813                          * will work out that the samplecount is short.
814                          */
815                         abort_acquisition(devc);
816                         free_transfer(transfer);
817                 } else {
818                         resubmit_transfer(transfer);
819                 }
820                 return;
821         } else {
822                 devc->empty_transfer_count = 0;
823         }
824
825         if (!devc->limit_samples || devc->sent_samples < devc->limit_samples) {
826                 if (devc->limit_samples && devc->sent_samples + cur_sample_count > devc->limit_samples)
827                         num_samples = devc->limit_samples - devc->sent_samples;
828                 else
829                         num_samples = cur_sample_count;
830
831                 /**
832                  * The DSLogic emits sample data as sequences of 64-bit sample words
833                  * in a round-robin i.e. 64-bits from channel 0, 64-bits from channel 1
834                  * etc. for each of the enabled channels, then looping back to the
835                  * channel.
836                  *
837                  * Because sigrok's internal representation is bit-interleaved channels
838                  * we must recast the data.
839                  *
840                  * Hopefully in future it will be possible to pass the data on as-is.
841                  */
842                 if (transfer->actual_length % (DSLOGIC_ATOMIC_BYTES * channel_count) != 0)
843                         sr_err("Invalid transfer length!");
844                 deinterleave_buffer(transfer->buffer, transfer->actual_length,
845                         devc->deinterleave_buffer, channel_count, channel_mask);
846
847                 /* Send the incoming transfer to the session bus. */
848                 if (devc->trigger_pos > devc->sent_samples
849                         && devc->trigger_pos <= devc->sent_samples + num_samples) {
850                         /* DSLogic trigger in this block. Send trigger position. */
851                         trigger_offset = devc->trigger_pos - devc->sent_samples;
852                         /* Pre-trigger samples. */
853                         send_data(sdi, devc->deinterleave_buffer, trigger_offset);
854                         devc->sent_samples += trigger_offset;
855                         /* Trigger position. */
856                         devc->trigger_pos = 0;
857                         packet.type = SR_DF_TRIGGER;
858                         packet.payload = NULL;
859                         sr_session_send(sdi, &packet);
860                         /* Post trigger samples. */
861                         num_samples -= trigger_offset;
862                         send_data(sdi, devc->deinterleave_buffer
863                                 + trigger_offset, num_samples);
864                         devc->sent_samples += num_samples;
865                 } else {
866                         send_data(sdi, devc->deinterleave_buffer, num_samples);
867                         devc->sent_samples += num_samples;
868                 }
869         }
870
871         if (devc->limit_samples && devc->sent_samples >= devc->limit_samples) {
872                 abort_acquisition(devc);
873                 free_transfer(transfer);
874         } else
875                 resubmit_transfer(transfer);
876 }
877
878 static int receive_data(int fd, int revents, void *cb_data)
879 {
880         struct timeval tv;
881         struct drv_context *drvc;
882
883         (void)fd;
884         (void)revents;
885
886         drvc = (struct drv_context *)cb_data;
887
888         tv.tv_sec = tv.tv_usec = 0;
889         libusb_handle_events_timeout(drvc->sr_ctx->libusb_ctx, &tv);
890
891         return TRUE;
892 }
893
894 static size_t to_bytes_per_ms(const struct sr_dev_inst *sdi)
895 {
896         const struct dev_context *const devc = sdi->priv;
897         const size_t ch_count = enabled_channel_count(sdi);
898
899         if (devc->continuous_mode)
900                 return (devc->cur_samplerate * ch_count) / (1000 * 8);
901
902
903         /* If we're in buffered mode, the transfer rate is not so important,
904          * but we expect to get at least 10% of the high-speed USB bandwidth.
905          */
906         return 35000000 / (1000 * 10);
907 }
908
909 static size_t get_buffer_size(const struct sr_dev_inst *sdi)
910 {
911         /*
912          * The buffer should be large enough to hold 10ms of data and
913          * a multiple of the size of a data atom.
914          */
915         const size_t block_size = enabled_channel_count(sdi) * 512;
916         const size_t s = 10 * to_bytes_per_ms(sdi);
917         if (!block_size)
918                 return s;
919         return ((s + block_size - 1) / block_size) * block_size;
920 }
921
922 static unsigned int get_number_of_transfers(const struct sr_dev_inst *sdi)
923 {
924         /* Total buffer size should be able to hold about 100ms of data. */
925         const unsigned int s = get_buffer_size(sdi);
926         const unsigned int n = (100 * to_bytes_per_ms(sdi) + s - 1) / s;
927         return (n > NUM_SIMUL_TRANSFERS) ? NUM_SIMUL_TRANSFERS : n;
928 }
929
930 static unsigned int get_timeout(const struct sr_dev_inst *sdi)
931 {
932         const size_t total_size = get_buffer_size(sdi) *
933                 get_number_of_transfers(sdi);
934         const unsigned int timeout = total_size / to_bytes_per_ms(sdi);
935         return timeout + timeout / 4; /* Leave a headroom of 25% percent. */
936 }
937
938 static int start_transfers(const struct sr_dev_inst *sdi)
939 {
940         const size_t channel_count = enabled_channel_count(sdi);
941         const size_t size = get_buffer_size(sdi);
942         const unsigned int num_transfers = get_number_of_transfers(sdi);
943         const unsigned int timeout = get_timeout(sdi);
944
945         struct dev_context *devc;
946         struct sr_usb_dev_inst *usb;
947         struct libusb_transfer *transfer;
948         unsigned int i;
949         int ret;
950         unsigned char *buf;
951
952         devc = sdi->priv;
953         usb = sdi->conn;
954
955         devc->sent_samples = 0;
956         devc->acq_aborted = FALSE;
957         devc->empty_transfer_count = 0;
958         devc->submitted_transfers = 0;
959
960         g_free(devc->transfers);
961         devc->transfers = g_try_malloc0(sizeof(*devc->transfers) * num_transfers);
962         if (!devc->transfers) {
963                 sr_err("USB transfers malloc failed.");
964                 return SR_ERR_MALLOC;
965         }
966
967         devc->deinterleave_buffer = g_try_malloc(DSLOGIC_ATOMIC_SAMPLES *
968                 (size / (channel_count * DSLOGIC_ATOMIC_BYTES)) * sizeof(uint16_t));
969         if (!devc->deinterleave_buffer) {
970                 sr_err("Deinterleave buffer malloc failed.");
971                 g_free(devc->deinterleave_buffer);
972                 return SR_ERR_MALLOC;
973         }
974
975         devc->num_transfers = num_transfers;
976         for (i = 0; i < num_transfers; i++) {
977                 if (!(buf = g_try_malloc(size))) {
978                         sr_err("USB transfer buffer malloc failed.");
979                         return SR_ERR_MALLOC;
980                 }
981                 transfer = libusb_alloc_transfer(0);
982                 libusb_fill_bulk_transfer(transfer, usb->devhdl,
983                                 6 | LIBUSB_ENDPOINT_IN, buf, size,
984                                 receive_transfer, (void *)sdi, timeout);
985                 sr_info("submitting transfer: %d", i);
986                 if ((ret = libusb_submit_transfer(transfer)) != 0) {
987                         sr_err("Failed to submit transfer: %s.",
988                                libusb_error_name(ret));
989                         libusb_free_transfer(transfer);
990                         g_free(buf);
991                         abort_acquisition(devc);
992                         return SR_ERR;
993                 }
994                 devc->transfers[i] = transfer;
995                 devc->submitted_transfers++;
996         }
997
998         std_session_send_df_header(sdi);
999
1000         return SR_OK;
1001 }
1002
1003 static void LIBUSB_CALL trigger_receive(struct libusb_transfer *transfer)
1004 {
1005         const struct sr_dev_inst *sdi;
1006         struct dslogic_trigger_pos *tpos;
1007         struct dev_context *devc;
1008
1009         sdi = transfer->user_data;
1010         devc = sdi->priv;
1011         if (transfer->status == LIBUSB_TRANSFER_CANCELLED) {
1012                 sr_dbg("Trigger transfer canceled.");
1013                 /* Terminate session. */
1014                 std_session_send_df_end(sdi);
1015                 usb_source_remove(sdi->session, devc->ctx);
1016                 devc->num_transfers = 0;
1017                 g_free(devc->transfers);
1018         } else if (transfer->status == LIBUSB_TRANSFER_COMPLETED
1019                         && transfer->actual_length == sizeof(struct dslogic_trigger_pos)) {
1020                 tpos = (struct dslogic_trigger_pos *)transfer->buffer;
1021                 sr_info("tpos real_pos %d ram_saddr %d cnt %d", tpos->real_pos,
1022                         tpos->ram_saddr, tpos->remain_cnt);
1023                 devc->trigger_pos = tpos->real_pos;
1024                 g_free(tpos);
1025                 start_transfers(sdi);
1026         }
1027         libusb_free_transfer(transfer);
1028 }
1029
1030 SR_PRIV int dslogic_acquisition_start(const struct sr_dev_inst *sdi)
1031 {
1032         const unsigned int timeout = get_timeout(sdi);
1033
1034         struct sr_dev_driver *di;
1035         struct drv_context *drvc;
1036         struct dev_context *devc;
1037         struct sr_usb_dev_inst *usb;
1038         struct dslogic_trigger_pos *tpos;
1039         struct libusb_transfer *transfer;
1040         int ret;
1041
1042         di = sdi->driver;
1043         drvc = di->context;
1044         devc = sdi->priv;
1045         usb = sdi->conn;
1046
1047         devc->ctx = drvc->sr_ctx;
1048         devc->sent_samples = 0;
1049         devc->empty_transfer_count = 0;
1050         devc->acq_aborted = FALSE;
1051
1052         usb_source_add(sdi->session, devc->ctx, timeout, receive_data, drvc);
1053
1054         if ((ret = command_stop_acquisition(sdi)) != SR_OK)
1055                 return ret;
1056
1057         if ((ret = fpga_configure(sdi)) != SR_OK)
1058                 return ret;
1059
1060         if ((ret = command_start_acquisition(sdi)) != SR_OK)
1061                 return ret;
1062
1063         sr_dbg("Getting trigger.");
1064         tpos = g_malloc(sizeof(struct dslogic_trigger_pos));
1065         transfer = libusb_alloc_transfer(0);
1066         libusb_fill_bulk_transfer(transfer, usb->devhdl, 6 | LIBUSB_ENDPOINT_IN,
1067                         (unsigned char *)tpos, sizeof(struct dslogic_trigger_pos),
1068                         trigger_receive, (void *)sdi, 0);
1069         if ((ret = libusb_submit_transfer(transfer)) < 0) {
1070                 sr_err("Failed to request trigger: %s.", libusb_error_name(ret));
1071                 libusb_free_transfer(transfer);
1072                 g_free(tpos);
1073                 return SR_ERR;
1074         }
1075
1076         devc->transfers = g_try_malloc0(sizeof(*devc->transfers));
1077         if (!devc->transfers) {
1078                 sr_err("USB trigger_pos transfer malloc failed.");
1079                 return SR_ERR_MALLOC;
1080         }
1081         devc->num_transfers = 1;
1082         devc->submitted_transfers++;
1083         devc->transfers[0] = transfer;
1084
1085         return ret;
1086 }
1087
1088 SR_PRIV int dslogic_acquisition_stop(struct sr_dev_inst *sdi)
1089 {
1090         command_stop_acquisition(sdi);
1091         abort_acquisition(sdi->priv);
1092         return SR_OK;
1093 }