2 * This file is part of the libsigrok project.
4 * Copyright (C) 2010-2012 Håvard Espeland <gus@ping.uio.no>,
5 * Copyright (C) 2010 Martin Stensgård <mastensg@ping.uio.no>
6 * Copyright (C) 2010 Carl Henrik Lunde <chlunde@ping.uio.no>
8 * This program is free software: you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation, either version 3 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
26 * Channel numbers seem to go from 1-16, according to this image:
27 * http://tools.asix.net/img/sigma_sigmacab_pins_720.jpg
28 * (the cable has two additional GND pins, and a TI and TO pin)
30 static const char *channel_names[] = {
31 "1", "2", "3", "4", "5", "6", "7", "8",
32 "9", "10", "11", "12", "13", "14", "15", "16",
35 static const uint32_t drvopts[] = {
36 SR_CONF_LOGIC_ANALYZER,
39 static const uint32_t devopts[] = {
40 SR_CONF_LIMIT_MSEC | SR_CONF_GET | SR_CONF_SET,
41 SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET,
42 SR_CONF_SAMPLERATE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
43 #if ASIX_SIGMA_WITH_TRIGGER
44 SR_CONF_TRIGGER_MATCH | SR_CONF_LIST,
45 SR_CONF_CAPTURE_RATIO | SR_CONF_GET | SR_CONF_SET,
49 #if ASIX_SIGMA_WITH_TRIGGER
50 static const int32_t trigger_matches[] = {
58 static void clear_helper(struct dev_context *devc)
60 ftdi_deinit(&devc->ftdic);
63 static int dev_clear(const struct sr_dev_driver *di)
65 return std_dev_clear_with_callback(di, (std_dev_clear_callback)clear_helper);
68 static GSList *scan(struct sr_dev_driver *di, GSList *options)
70 struct sr_dev_inst *sdi;
71 struct dev_context *devc;
72 struct ftdi_device_list *devlist;
80 devc = g_malloc0(sizeof(struct dev_context));
82 ftdi_init(&devc->ftdic);
84 if ((ret = ftdi_usb_find_all(&devc->ftdic, &devlist,
85 USB_VENDOR, USB_PRODUCT)) <= 0) {
87 sr_err("ftdi_usb_find_all(): %d", ret);
91 /* Make sure it's a version 1 or 2 SIGMA. */
92 ftdi_usb_get_strings(&devc->ftdic, devlist->dev, NULL, 0, NULL, 0,
93 serial_txt, sizeof(serial_txt));
94 sscanf(serial_txt, "%x", &serial);
96 if (serial < 0xa6010000 || serial > 0xa602ffff) {
97 sr_err("Only SIGMA and SIGMA2 are supported "
98 "in this version of libsigrok.");
102 sr_info("Found ASIX SIGMA - Serial: %s", serial_txt);
104 devc->cur_samplerate = samplerates[0];
105 devc->limit_msec = 0;
106 devc->limit_samples = 0;
107 devc->cur_firmware = -1;
108 devc->num_channels = 0;
109 devc->samples_per_event = 0;
110 devc->capture_ratio = 50;
111 devc->use_triggers = 0;
113 sdi = g_malloc0(sizeof(struct sr_dev_inst));
114 sdi->status = SR_ST_INITIALIZING;
115 sdi->vendor = g_strdup("ASIX");
116 sdi->model = g_strdup("SIGMA");
118 for (i = 0; i < ARRAY_SIZE(channel_names); i++)
119 sr_channel_new(sdi, i, SR_CHANNEL_LOGIC, TRUE, channel_names[i]);
123 ftdi_list_free(&devlist);
125 return std_scan_complete(di, g_slist_append(NULL, sdi));
128 ftdi_deinit(&devc->ftdic);
133 static int dev_open(struct sr_dev_inst *sdi)
135 struct dev_context *devc;
140 if ((ret = ftdi_usb_open_desc(&devc->ftdic,
141 USB_VENDOR, USB_PRODUCT, USB_DESCRIPTION, NULL)) < 0) {
142 sr_err("Failed to open device (%d): %s.",
143 ret, ftdi_get_error_string(&devc->ftdic));
150 static int dev_close(struct sr_dev_inst *sdi)
152 struct dev_context *devc;
156 return (ftdi_usb_close(&devc->ftdic) == 0) ? SR_OK : SR_ERR;
159 static int config_get(uint32_t key, GVariant **data,
160 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
162 struct dev_context *devc;
171 case SR_CONF_SAMPLERATE:
172 *data = g_variant_new_uint64(devc->cur_samplerate);
174 case SR_CONF_LIMIT_MSEC:
175 *data = g_variant_new_uint64(devc->limit_msec);
177 case SR_CONF_LIMIT_SAMPLES:
178 *data = g_variant_new_uint64(devc->limit_samples);
180 #if ASIX_SIGMA_WITH_TRIGGER
181 case SR_CONF_CAPTURE_RATIO:
182 *data = g_variant_new_uint64(devc->capture_ratio);
192 static int config_set(uint32_t key, GVariant *data,
193 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
195 struct dev_context *devc;
205 case SR_CONF_SAMPLERATE:
206 ret = sigma_set_samplerate(sdi, g_variant_get_uint64(data));
208 case SR_CONF_LIMIT_MSEC:
209 devc->limit_msec = g_variant_get_uint64(data);
211 case SR_CONF_LIMIT_SAMPLES:
212 tmp = g_variant_get_uint64(data);
213 devc->limit_samples = tmp;
214 devc->limit_msec = sigma_limit_samples_to_msec(devc, tmp);
216 #if ASIX_SIGMA_WITH_TRIGGER
217 case SR_CONF_CAPTURE_RATIO:
218 tmp = g_variant_get_uint64(data);
221 devc->capture_ratio = tmp;
231 static int config_list(uint32_t key, GVariant **data,
232 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
235 case SR_CONF_DEVICE_OPTIONS:
236 return STD_CONFIG_LIST(key, data, sdi, cg, NULL, drvopts, devopts);
237 case SR_CONF_SAMPLERATE:
238 *data = std_gvar_samplerates(samplerates, samplerates_count);
240 #if ASIX_SIGMA_WITH_TRIGGER
241 case SR_CONF_TRIGGER_MATCH:
242 *data = std_gvar_array_i32(ARRAY_AND_SIZE(trigger_matches));
252 static int dev_acquisition_start(const struct sr_dev_inst *sdi)
254 struct dev_context *devc;
255 struct clockselect_50 clockselect;
257 uint8_t triggerselect;
258 struct triggerinout triggerinout_conf;
259 struct triggerlut lut;
261 uint8_t clock_bytes[sizeof(clockselect)];
266 if (sigma_convert_trigger(sdi) != SR_OK) {
267 sr_err("Failed to configure triggers.");
271 /* If the samplerate has not been set, default to 200 kHz. */
272 if (devc->cur_firmware == -1) {
273 if ((ret = sigma_set_samplerate(sdi, SR_KHZ(200))) != SR_OK)
277 /* Enter trigger programming mode. */
278 sigma_set_register(WRITE_TRIGGER_SELECT1, 0x20, devc);
281 if (devc->cur_samplerate >= SR_MHZ(100)) {
282 /* 100 and 200 MHz mode. */
283 sigma_set_register(WRITE_TRIGGER_SELECT1, 0x81, devc);
285 /* Find which pin to trigger on from mask. */
286 for (triggerpin = 0; triggerpin < 8; triggerpin++)
287 if ((devc->trigger.risingmask | devc->trigger.fallingmask) &
291 /* Set trigger pin and light LED on trigger. */
292 triggerselect = (1 << LEDSEL1) | (triggerpin & 0x7);
294 /* Default rising edge. */
295 if (devc->trigger.fallingmask)
296 triggerselect |= 1 << 3;
298 } else if (devc->cur_samplerate <= SR_MHZ(50)) {
299 /* All other modes. */
300 sigma_build_basic_trigger(&lut, devc);
302 sigma_write_trigger_lut(&lut, devc);
304 triggerselect = (1 << LEDSEL1) | (1 << LEDSEL0);
307 /* Setup trigger in and out pins to default values. */
308 memset(&triggerinout_conf, 0, sizeof(struct triggerinout));
309 triggerinout_conf.trgout_bytrigger = 1;
310 triggerinout_conf.trgout_enable = 1;
312 sigma_write_register(WRITE_TRIGGER_OPTION,
313 (uint8_t *) &triggerinout_conf,
314 sizeof(struct triggerinout), devc);
316 /* Go back to normal mode. */
317 sigma_set_register(WRITE_TRIGGER_SELECT1, triggerselect, devc);
319 /* Set clock select register. */
320 clockselect.async = 0;
321 clockselect.fraction = 1 - 1; /* Divider 1. */
322 clockselect.disabled_channels = 0x0000; /* All channels enabled. */
323 if (devc->cur_samplerate == SR_MHZ(200)) {
324 /* Enable 4 channels. */
325 clockselect.disabled_channels = 0xf0ff;
326 } else if (devc->cur_samplerate == SR_MHZ(100)) {
327 /* Enable 8 channels. */
328 clockselect.disabled_channels = 0x00ff;
331 * 50 MHz mode, or fraction thereof. The 50MHz reference
332 * can get divided by any integer in the range 1 to 256.
333 * Divider minus 1 gets written to the hardware.
334 * (The driver lists a discrete set of sample rates, but
335 * all of them fit the above description.)
337 clockselect.fraction = SR_MHZ(50) / devc->cur_samplerate - 1;
340 clock_bytes[clock_idx++] = clockselect.async;
341 clock_bytes[clock_idx++] = clockselect.fraction;
342 clock_bytes[clock_idx++] = clockselect.disabled_channels & 0xff;
343 clock_bytes[clock_idx++] = clockselect.disabled_channels >> 8;
344 sigma_write_register(WRITE_CLOCK_SELECT, clock_bytes, clock_idx, devc);
346 /* Setup maximum post trigger time. */
347 sigma_set_register(WRITE_POST_TRIGGER,
348 (devc->capture_ratio * 255) / 100, devc);
350 /* Start acqusition. */
351 devc->start_time = g_get_monotonic_time();
352 regval = WMR_TRGRES | WMR_SDRAMWRITEEN;
353 #if ASIX_SIGMA_WITH_TRIGGER
356 sigma_set_register(WRITE_MODE, regval, devc);
358 std_session_send_df_header(sdi);
360 /* Add capture source. */
361 sr_session_source_add(sdi->session, -1, 0, 10, sigma_receive_data, (void *)sdi);
363 devc->state.state = SIGMA_CAPTURE;
368 static int dev_acquisition_stop(struct sr_dev_inst *sdi)
370 struct dev_context *devc;
373 devc->state.state = SIGMA_IDLE;
375 sr_session_source_remove(sdi->session, -1);
380 static struct sr_dev_driver asix_sigma_driver_info = {
381 .name = "asix-sigma",
382 .longname = "ASIX SIGMA/SIGMA2",
385 .cleanup = std_cleanup,
387 .dev_list = std_dev_list,
388 .dev_clear = dev_clear,
389 .config_get = config_get,
390 .config_set = config_set,
391 .config_list = config_list,
392 .dev_open = dev_open,
393 .dev_close = dev_close,
394 .dev_acquisition_start = dev_acquisition_start,
395 .dev_acquisition_stop = dev_acquisition_stop,
398 SR_REGISTER_DEV_DRIVER(asix_sigma_driver_info);