2 * This file is part of the sigrok project.
4 * Copyright (C) 2010-2012 Bert Vermeulen <bert@biot.com>
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
23 #include <sys/types.h>
38 #include <arpa/inet.h>
41 #include "libsigrok.h"
42 #include "libsigrok-internal.h"
46 #define O_NONBLOCK FIONBIO
49 static const int hwcaps[] = {
50 SR_HWCAP_LOGIC_ANALYZER,
52 SR_HWCAP_CAPTURE_RATIO,
53 SR_HWCAP_LIMIT_SAMPLES,
58 /* Probes are numbered 0-31 (on the PCB silkscreen). */
59 static const char *probe_names[NUM_PROBES + 1] = {
95 /* default supported samplerates, can be overridden by device metadata */
96 static const struct sr_samplerates samplerates = {
103 /* List of struct sr_dev_inst. */
104 static GSList *dev_insts = NULL;
106 static int send_shortcommand(int fd, uint8_t command)
110 sr_dbg("ols: sending cmd 0x%.2x", command);
112 if (serial_write(fd, buf, 1) != 1)
118 static int send_longcommand(int fd, uint8_t command, uint32_t data)
122 sr_dbg("ols: sending cmd 0x%.2x data 0x%.8x", command, data);
124 buf[1] = (data & 0xff000000) >> 24;
125 buf[2] = (data & 0xff0000) >> 16;
126 buf[3] = (data & 0xff00) >> 8;
127 buf[4] = data & 0xff;
128 if (serial_write(fd, buf, 5) != 5)
134 static int configure_probes(struct context *ctx, const GSList *probes)
136 const struct sr_probe *probe;
138 int probe_bit, stage, i;
142 for (i = 0; i < NUM_TRIGGER_STAGES; i++) {
143 ctx->trigger_mask[i] = 0;
144 ctx->trigger_value[i] = 0;
148 for (l = probes; l; l = l->next) {
149 probe = (const struct sr_probe *)l->data;
154 * Set up the probe mask for later configuration into the
157 probe_bit = 1 << (probe->index - 1);
158 ctx->probe_mask |= probe_bit;
163 /* Configure trigger mask and value. */
165 for (tc = probe->trigger; tc && *tc; tc++) {
166 ctx->trigger_mask[stage] |= probe_bit;
168 ctx->trigger_value[stage] |= probe_bit;
172 * TODO: Only supporting parallel mode, with
177 if (stage > ctx->num_stages)
178 ctx->num_stages = stage;
184 static uint32_t reverse16(uint32_t in)
188 out = (in & 0xff) << 8;
189 out |= (in & 0xff00) >> 8;
190 out |= (in & 0xff0000) << 8;
191 out |= (in & 0xff000000) >> 8;
196 static uint32_t reverse32(uint32_t in)
200 out = (in & 0xff) << 24;
201 out |= (in & 0xff00) << 8;
202 out |= (in & 0xff0000) >> 8;
203 out |= (in & 0xff000000) >> 24;
208 static struct context *ols_dev_new(void)
212 /* TODO: Is 'ctx' ever g_free()'d? */
213 if (!(ctx = g_try_malloc0(sizeof(struct context)))) {
214 sr_err("ols: %s: ctx malloc failed", __func__);
218 ctx->trigger_at = -1;
219 ctx->probe_mask = 0xffffffff;
220 ctx->cur_samplerate = SR_KHZ(200);
226 static struct sr_dev_inst *get_metadata(int fd)
228 struct sr_dev_inst *sdi;
231 uint8_t key, type, token;
232 GString *tmp_str, *devname, *version;
235 sdi = sr_dev_inst_new(0, SR_ST_INACTIVE, NULL, NULL, NULL);
239 devname = g_string_new("");
240 version = g_string_new("");
244 if (serial_read(fd, &key, 1) != 1 || key == 0x00)
250 /* NULL-terminated string */
251 tmp_str = g_string_new("");
252 while (serial_read(fd, &tmp_c, 1) == 1 && tmp_c != '\0')
253 g_string_append_c(tmp_str, tmp_c);
254 sr_dbg("ols: got metadata key 0x%.2x value '%s'",
259 devname = g_string_append(devname, tmp_str->str);
262 /* FPGA firmware version */
264 g_string_append(version, ", ");
265 g_string_append(version, "FPGA version ");
266 g_string_append(version, tmp_str->str);
269 /* Ancillary version */
271 g_string_append(version, ", ");
272 g_string_append(version, "Ancillary version ");
273 g_string_append(version, tmp_str->str);
276 sr_info("ols: unknown token 0x%.2x: '%s'",
277 token, tmp_str->str);
280 g_string_free(tmp_str, TRUE);
283 /* 32-bit unsigned integer */
284 if (serial_read(fd, &tmp_int, 4) != 4)
286 tmp_int = reverse32(tmp_int);
287 sr_dbg("ols: got metadata key 0x%.2x value 0x%.8x",
291 /* Number of usable probes */
292 ctx->num_probes = tmp_int;
295 /* Amount of sample memory available (bytes) */
296 ctx->max_samples = tmp_int;
299 /* Amount of dynamic memory available (bytes) */
300 /* what is this for? */
303 /* Maximum sample rate (hz) */
304 ctx->max_samplerate = tmp_int;
307 /* protocol version */
308 ctx->protocol_version = tmp_int;
311 sr_info("ols: unknown token 0x%.2x: 0x%.8x",
317 /* 8-bit unsigned integer */
318 if (serial_read(fd, &tmp_c, 1) != 1)
320 sr_dbg("ols: got metadata key 0x%.2x value 0x%.2x",
324 /* Number of usable probes */
325 ctx->num_probes = tmp_c;
328 /* protocol version */
329 ctx->protocol_version = tmp_c;
332 sr_info("ols: unknown token 0x%.2x: 0x%.2x",
343 sdi->model = devname->str;
344 sdi->version = version->str;
345 g_string_free(devname, FALSE);
346 g_string_free(version, FALSE);
351 static int hw_init(void)
353 struct sr_dev_inst *sdi;
356 GPollFD *fds, probefd;
357 int devcnt, final_devcnt, num_ports, fd, ret, i;
358 char buf[8], **dev_names, **serial_params;
362 /* Scan all serial ports. */
363 ports = list_serial_ports();
364 num_ports = g_slist_length(ports);
366 if (!(fds = g_try_malloc0(num_ports * sizeof(GPollFD)))) {
367 sr_err("ols: %s: fds malloc failed", __func__);
368 goto hw_init_free_ports; /* TODO: SR_ERR_MALLOC. */
371 if (!(dev_names = g_try_malloc(num_ports * sizeof(char *)))) {
372 sr_err("ols: %s: dev_names malloc failed", __func__);
373 goto hw_init_free_fds; /* TODO: SR_ERR_MALLOC. */
376 if (!(serial_params = g_try_malloc(num_ports * sizeof(char *)))) {
377 sr_err("ols: %s: serial_params malloc failed", __func__);
378 goto hw_init_free_dev_names; /* TODO: SR_ERR_MALLOC. */
382 for (l = ports; l; l = l->next) {
383 /* The discovery procedure is like this: first send the Reset
384 * command (0x00) 5 times, since the device could be anywhere
385 * in a 5-byte command. Then send the ID command (0x02).
386 * If the device responds with 4 bytes ("OLS1" or "SLA1"), we
389 * Since it may take the device a while to respond at 115Kb/s,
390 * we do all the sending first, then wait for all of them to
391 * respond with g_poll().
393 sr_info("ols: probing %s...", (char *)l->data);
394 fd = serial_open(l->data, O_RDWR | O_NONBLOCK);
396 serial_params[devcnt] = serial_backup_params(fd);
397 serial_set_params(fd, 115200, 8, SERIAL_PARITY_NONE, 1, 2);
399 for (i = 0; i < 5; i++) {
400 if ((ret = send_shortcommand(fd,
401 CMD_RESET)) != SR_OK) {
402 /* Serial port is not writable. */
407 serial_restore_params(fd,
408 serial_params[devcnt]);
412 send_shortcommand(fd, CMD_ID);
414 fds[devcnt].events = G_IO_IN;
415 dev_names[devcnt] = g_strdup(l->data);
421 /* 2ms isn't enough for reliable transfer with pl2303, let's try 10 */
424 g_poll(fds, devcnt, 1);
426 for (i = 0; i < devcnt; i++) {
427 if (fds[i].revents != G_IO_IN)
429 if (serial_read(fds[i].fd, buf, 4) != 4)
431 if (strncmp(buf, "1SLO", 4) && strncmp(buf, "1ALS", 4))
434 /* definitely using the OLS protocol, check if it supports
435 * the metadata command
437 send_shortcommand(fds[i].fd, CMD_METADATA);
438 probefd.fd = fds[i].fd;
439 probefd.events = G_IO_IN;
440 if (g_poll(&probefd, 1, 10) > 0) {
442 sdi = get_metadata(fds[i].fd);
443 sdi->index = final_devcnt;
446 /* not an OLS -- some other board that uses the sump protocol */
447 sdi = sr_dev_inst_new(final_devcnt, SR_ST_INACTIVE,
448 "Sump", "Logic Analyzer", "v1.0");
450 ctx->num_probes = 32;
453 ctx->serial = sr_serial_dev_inst_new(dev_names[i], -1);
454 dev_insts = g_slist_append(dev_insts, sdi);
456 serial_close(fds[i].fd);
460 /* clean up after all the probing */
461 for (i = 0; i < devcnt; i++) {
462 if (fds[i].fd != 0) {
463 serial_restore_params(fds[i].fd, serial_params[i]);
464 serial_close(fds[i].fd);
466 g_free(serial_params[i]);
467 g_free(dev_names[i]);
470 g_free(serial_params);
471 hw_init_free_dev_names:
481 static int hw_dev_open(int dev_index)
483 struct sr_dev_inst *sdi;
486 if (!(sdi = sr_dev_inst_get(dev_insts, dev_index)))
491 ctx->serial->fd = serial_open(ctx->serial->port, O_RDWR);
492 if (ctx->serial->fd == -1)
495 sdi->status = SR_ST_ACTIVE;
500 static int hw_dev_close(int dev_index)
502 struct sr_dev_inst *sdi;
505 if (!(sdi = sr_dev_inst_get(dev_insts, dev_index))) {
506 sr_err("ols: %s: sdi was NULL", __func__);
513 if (ctx->serial->fd != -1) {
514 serial_close(ctx->serial->fd);
515 ctx->serial->fd = -1;
516 sdi->status = SR_ST_INACTIVE;
522 static int hw_cleanup(void)
525 struct sr_dev_inst *sdi;
529 /* Properly close and free all devices. */
530 for (l = dev_insts; l; l = l->next) {
531 if (!(sdi = l->data)) {
532 /* Log error, but continue cleaning up the rest. */
533 sr_err("ols: %s: sdi was NULL, continuing", __func__);
537 if (!(ctx = sdi->priv)) {
538 /* Log error, but continue cleaning up the rest. */
539 sr_err("ols: %s: sdi->priv was NULL, continuing",
544 /* TODO: Check for serial != NULL. */
545 if (ctx->serial->fd != -1)
546 serial_close(ctx->serial->fd);
547 sr_serial_dev_inst_free(ctx->serial);
548 sr_dev_inst_free(sdi);
550 g_slist_free(dev_insts);
556 static const void *hw_dev_info_get(int dev_index, int dev_info_id)
558 struct sr_dev_inst *sdi;
562 if (!(sdi = sr_dev_inst_get(dev_insts, dev_index)))
567 switch (dev_info_id) {
571 case SR_DI_NUM_PROBES:
572 info = GINT_TO_POINTER(NUM_PROBES);
574 case SR_DI_PROBE_NAMES:
577 case SR_DI_SAMPLERATES:
580 case SR_DI_TRIGGER_TYPES:
581 info = (char *)TRIGGER_TYPES;
583 case SR_DI_CUR_SAMPLERATE:
584 info = &ctx->cur_samplerate;
591 static int hw_dev_status_get(int dev_index)
593 struct sr_dev_inst *sdi;
595 if (!(sdi = sr_dev_inst_get(dev_insts, dev_index)))
596 return SR_ST_NOT_FOUND;
601 static const int *hw_hwcap_get_all(void)
606 static int set_samplerate(struct sr_dev_inst *sdi, uint64_t samplerate)
611 if (ctx->max_samplerate) {
612 if (samplerate > ctx->max_samplerate)
613 return SR_ERR_SAMPLERATE;
614 } else if (samplerate < samplerates.low || samplerate > samplerates.high)
615 return SR_ERR_SAMPLERATE;
617 if (samplerate > CLOCK_RATE) {
618 ctx->flag_reg |= FLAG_DEMUX;
619 ctx->cur_samplerate_divider = (CLOCK_RATE * 2 / samplerate) - 1;
621 ctx->flag_reg &= ~FLAG_DEMUX;
622 ctx->cur_samplerate_divider = (CLOCK_RATE / samplerate) - 1;
625 /* Calculate actual samplerate used and complain if it is different
626 * from the requested.
628 ctx->cur_samplerate = CLOCK_RATE / (ctx->cur_samplerate_divider + 1);
629 if (ctx->flag_reg & FLAG_DEMUX)
630 ctx->cur_samplerate *= 2;
631 if (ctx->cur_samplerate != samplerate)
632 sr_err("ols: can't match samplerate %" PRIu64 ", using %"
633 PRIu64, samplerate, ctx->cur_samplerate);
638 static int hw_dev_config_set(int dev_index, int hwcap, const void *value)
640 struct sr_dev_inst *sdi;
643 const uint64_t *tmp_u64;
645 if (!(sdi = sr_dev_inst_get(dev_insts, dev_index)))
649 if (sdi->status != SR_ST_ACTIVE)
653 case SR_HWCAP_SAMPLERATE:
654 ret = set_samplerate(sdi, *(const uint64_t *)value);
656 case SR_HWCAP_PROBECONFIG:
657 ret = configure_probes(ctx, (const GSList *)value);
659 case SR_HWCAP_LIMIT_SAMPLES:
661 if (*tmp_u64 < MIN_NUM_SAMPLES)
663 if (*tmp_u64 > ctx->max_samples)
664 sr_err("ols: sample limit exceeds hw max");
665 ctx->limit_samples = *tmp_u64;
666 sr_info("ols: sample limit %" PRIu64, ctx->limit_samples);
669 case SR_HWCAP_CAPTURE_RATIO:
670 ctx->capture_ratio = *(const uint64_t *)value;
671 if (ctx->capture_ratio < 0 || ctx->capture_ratio > 100) {
672 ctx->capture_ratio = 0;
678 if (GPOINTER_TO_INT(value)) {
679 sr_info("ols: enabling RLE");
680 ctx->flag_reg |= FLAG_RLE;
691 static int receive_data(int fd, int revents, void *cb_data)
693 struct sr_datafeed_packet packet;
694 struct sr_datafeed_logic logic;
695 struct sr_dev_inst *sdi;
698 int num_channels, offset, i, j;
701 /* Find this device's ctx struct by its fd. */
703 for (l = dev_insts; l; l = l->next) {
706 if (ctx->serial->fd == fd) {
712 /* Shouldn't happen. */
715 if (ctx->num_transfers++ == 0) {
717 * First time round, means the device started sending data,
718 * and will not stop until done. If it stops sending for
719 * longer than it takes to send a byte, that means it's
720 * finished. We'll double that to 30ms to be sure...
722 sr_source_remove(fd);
723 sr_source_add(fd, G_IO_IN, 30, receive_data, cb_data);
724 ctx->raw_sample_buf = g_try_malloc(ctx->limit_samples * 4);
725 if (!ctx->raw_sample_buf) {
726 sr_err("ols: %s: ctx->raw_sample_buf malloc failed",
730 /* fill with 1010... for debugging */
731 memset(ctx->raw_sample_buf, 0x82, ctx->limit_samples * 4);
735 for (i = 0x20; i > 0x02; i /= 2) {
736 if ((ctx->flag_reg & i) == 0)
740 if (revents == G_IO_IN) {
741 if (serial_read(fd, &byte, 1) != 1)
744 /* Ignore it if we've read enough. */
745 if (ctx->num_samples >= ctx->limit_samples)
748 ctx->sample[ctx->num_bytes++] = byte;
749 sr_dbg("ols: received byte 0x%.2x", byte);
750 if (ctx->num_bytes == num_channels) {
751 /* Got a full sample. */
752 sr_dbg("ols: received sample 0x%.*x",
753 ctx->num_bytes * 2, *(int *)ctx->sample);
754 if (ctx->flag_reg & FLAG_RLE) {
756 * In RLE mode -1 should never come in as a
757 * sample, because bit 31 is the "count" flag.
759 if (ctx->sample[ctx->num_bytes - 1] & 0x80) {
760 ctx->sample[ctx->num_bytes - 1] &= 0x7f;
762 * FIXME: This will only work on
763 * little-endian systems.
765 ctx->rle_count = *(int *)(ctx->sample);
766 sr_dbg("ols: RLE count = %d", ctx->rle_count);
771 ctx->num_samples += ctx->rle_count + 1;
772 if (ctx->num_samples > ctx->limit_samples) {
773 /* Save us from overrunning the buffer. */
774 ctx->rle_count -= ctx->num_samples - ctx->limit_samples;
775 ctx->num_samples = ctx->limit_samples;
778 if (num_channels < 4) {
780 * Some channel groups may have been turned
781 * off, to speed up transfer between the
782 * hardware and the PC. Expand that here before
783 * submitting it over the session bus --
784 * whatever is listening on the bus will be
785 * expecting a full 32-bit sample, based on
786 * the number of probes.
789 memset(ctx->tmp_sample, 0, 4);
790 for (i = 0; i < 4; i++) {
791 if (((ctx->flag_reg >> 2) & (1 << i)) == 0) {
793 * This channel group was
794 * enabled, copy from received
797 ctx->tmp_sample[i] = ctx->sample[j++];
800 memcpy(ctx->sample, ctx->tmp_sample, 4);
801 sr_dbg("ols: full sample 0x%.8x", *(int *)ctx->sample);
804 /* the OLS sends its sample buffer backwards.
805 * store it in reverse order here, so we can dump
806 * this on the session bus later.
808 offset = (ctx->limit_samples - ctx->num_samples) * 4;
809 for (i = 0; i <= ctx->rle_count; i++) {
810 memcpy(ctx->raw_sample_buf + offset + (i * 4),
813 memset(ctx->sample, 0, 4);
819 * This is the main loop telling us a timeout was reached, or
820 * we've acquired all the samples we asked for -- we're done.
821 * Send the (properly-ordered) buffer to the frontend.
823 if (ctx->trigger_at != -1) {
824 /* a trigger was set up, so we need to tell the frontend
827 if (ctx->trigger_at > 0) {
828 /* there are pre-trigger samples, send those first */
829 packet.type = SR_DF_LOGIC;
830 packet.payload = &logic;
831 logic.length = ctx->trigger_at * 4;
833 logic.data = ctx->raw_sample_buf +
834 (ctx->limit_samples - ctx->num_samples) * 4;
835 sr_session_send(cb_data, &packet);
838 /* send the trigger */
839 packet.type = SR_DF_TRIGGER;
840 sr_session_send(cb_data, &packet);
842 /* send post-trigger samples */
843 packet.type = SR_DF_LOGIC;
844 packet.payload = &logic;
845 logic.length = (ctx->num_samples * 4) - (ctx->trigger_at * 4);
847 logic.data = ctx->raw_sample_buf + ctx->trigger_at * 4 +
848 (ctx->limit_samples - ctx->num_samples) * 4;
849 sr_session_send(cb_data, &packet);
851 /* no trigger was used */
852 packet.type = SR_DF_LOGIC;
853 packet.payload = &logic;
854 logic.length = ctx->num_samples * 4;
856 logic.data = ctx->raw_sample_buf +
857 (ctx->limit_samples - ctx->num_samples) * 4;
858 sr_session_send(cb_data, &packet);
860 g_free(ctx->raw_sample_buf);
864 packet.type = SR_DF_END;
865 sr_session_send(cb_data, &packet);
871 static int hw_dev_acquisition_start(int dev_index, void *cb_data)
873 struct sr_datafeed_packet *packet;
874 struct sr_datafeed_header *header;
875 struct sr_datafeed_meta_logic meta;
876 struct sr_dev_inst *sdi;
878 uint32_t trigger_config[4];
880 uint16_t readcount, delaycount;
881 uint8_t changrp_mask;
885 if (!(sdi = sr_dev_inst_get(dev_insts, dev_index)))
890 if (sdi->status != SR_ST_ACTIVE)
894 * Enable/disable channel groups in the flag register according to the
895 * probe mask. Calculate this here, because num_channels is needed
896 * to limit readcount.
900 for (i = 0; i < 4; i++) {
901 if (ctx->probe_mask & (0xff << (i * 8))) {
902 changrp_mask |= (1 << i);
908 * Limit readcount to prevent reading past the end of the hardware
911 readcount = MIN(ctx->max_samples / num_channels, ctx->limit_samples) / 4;
913 memset(trigger_config, 0, 16);
914 trigger_config[ctx->num_stages - 1] |= 0x08;
915 if (ctx->trigger_mask[0]) {
916 delaycount = readcount * (1 - ctx->capture_ratio / 100.0);
917 ctx->trigger_at = (readcount - delaycount) * 4 - ctx->num_stages;
919 if (send_longcommand(ctx->serial->fd, CMD_SET_TRIGGER_MASK_0,
920 reverse32(ctx->trigger_mask[0])) != SR_OK)
922 if (send_longcommand(ctx->serial->fd, CMD_SET_TRIGGER_VALUE_0,
923 reverse32(ctx->trigger_value[0])) != SR_OK)
925 if (send_longcommand(ctx->serial->fd, CMD_SET_TRIGGER_CONFIG_0,
926 trigger_config[0]) != SR_OK)
929 if (send_longcommand(ctx->serial->fd, CMD_SET_TRIGGER_MASK_1,
930 reverse32(ctx->trigger_mask[1])) != SR_OK)
932 if (send_longcommand(ctx->serial->fd, CMD_SET_TRIGGER_VALUE_1,
933 reverse32(ctx->trigger_value[1])) != SR_OK)
935 if (send_longcommand(ctx->serial->fd, CMD_SET_TRIGGER_CONFIG_1,
936 trigger_config[1]) != SR_OK)
939 if (send_longcommand(ctx->serial->fd, CMD_SET_TRIGGER_MASK_2,
940 reverse32(ctx->trigger_mask[2])) != SR_OK)
942 if (send_longcommand(ctx->serial->fd, CMD_SET_TRIGGER_VALUE_2,
943 reverse32(ctx->trigger_value[2])) != SR_OK)
945 if (send_longcommand(ctx->serial->fd, CMD_SET_TRIGGER_CONFIG_2,
946 trigger_config[2]) != SR_OK)
949 if (send_longcommand(ctx->serial->fd, CMD_SET_TRIGGER_MASK_3,
950 reverse32(ctx->trigger_mask[3])) != SR_OK)
952 if (send_longcommand(ctx->serial->fd, CMD_SET_TRIGGER_VALUE_3,
953 reverse32(ctx->trigger_value[3])) != SR_OK)
955 if (send_longcommand(ctx->serial->fd, CMD_SET_TRIGGER_CONFIG_3,
956 trigger_config[3]) != SR_OK)
959 if (send_longcommand(ctx->serial->fd, CMD_SET_TRIGGER_MASK_0,
960 ctx->trigger_mask[0]) != SR_OK)
962 if (send_longcommand(ctx->serial->fd, CMD_SET_TRIGGER_VALUE_0,
963 ctx->trigger_value[0]) != SR_OK)
965 if (send_longcommand(ctx->serial->fd, CMD_SET_TRIGGER_CONFIG_0,
966 0x00000008) != SR_OK)
968 delaycount = readcount;
971 sr_info("ols: setting samplerate to %" PRIu64 " Hz (divider %u, "
972 "demux %s)", ctx->cur_samplerate, ctx->cur_samplerate_divider,
973 ctx->flag_reg & FLAG_DEMUX ? "on" : "off");
974 if (send_longcommand(ctx->serial->fd, CMD_SET_DIVIDER,
975 reverse32(ctx->cur_samplerate_divider)) != SR_OK)
978 /* Send sample limit and pre/post-trigger capture ratio. */
979 data = ((readcount - 1) & 0xffff) << 16;
980 data |= (delaycount - 1) & 0xffff;
981 if (send_longcommand(ctx->serial->fd, CMD_CAPTURE_SIZE, reverse16(data)) != SR_OK)
984 /* The flag register wants them here, and 1 means "disable channel". */
985 ctx->flag_reg |= ~(changrp_mask << 2) & 0x3c;
986 ctx->flag_reg |= FLAG_FILTER;
988 data = (ctx->flag_reg << 24) | ((ctx->flag_reg << 8) & 0xff0000);
989 if (send_longcommand(ctx->serial->fd, CMD_SET_FLAGS, data) != SR_OK)
992 /* Start acquisition on the device. */
993 if (send_shortcommand(ctx->serial->fd, CMD_RUN) != SR_OK)
996 sr_source_add(ctx->serial->fd, G_IO_IN, -1, receive_data,
999 if (!(packet = g_try_malloc(sizeof(struct sr_datafeed_packet)))) {
1000 sr_err("ols: %s: packet malloc failed", __func__);
1001 return SR_ERR_MALLOC;
1004 if (!(header = g_try_malloc(sizeof(struct sr_datafeed_header)))) {
1005 sr_err("ols: %s: header malloc failed", __func__);
1007 return SR_ERR_MALLOC;
1010 /* Send header packet to the session bus. */
1011 packet->type = SR_DF_HEADER;
1012 packet->payload = (unsigned char *)header;
1013 header->feed_version = 1;
1014 gettimeofday(&header->starttime, NULL);
1015 sr_session_send(cb_data, packet);
1017 /* Send metadata about the SR_DF_LOGIC packets to come. */
1018 packet->type = SR_DF_META_LOGIC;
1019 packet->payload = &meta;
1020 meta.samplerate = ctx->cur_samplerate;
1021 meta.num_probes = NUM_PROBES;
1022 sr_session_send(cb_data, packet);
1030 /* TODO: This stops acquisition on ALL devices, ignoring dev_index. */
1031 static int hw_dev_acquisition_stop(int dev_index, void *cb_data)
1033 struct sr_datafeed_packet packet;
1035 /* Avoid compiler warnings. */
1038 packet.type = SR_DF_END;
1039 sr_session_send(cb_data, &packet);
1044 SR_PRIV struct sr_dev_driver ols_driver_info = {
1046 .longname = "Openbench Logic Sniffer",
1049 .cleanup = hw_cleanup,
1050 .dev_open = hw_dev_open,
1051 .dev_close = hw_dev_close,
1052 .dev_info_get = hw_dev_info_get,
1053 .dev_status_get = hw_dev_status_get,
1054 .hwcap_get_all = hw_hwcap_get_all,
1055 .dev_config_set = hw_dev_config_set,
1056 .dev_acquisition_start = hw_dev_acquisition_start,
1057 .dev_acquisition_stop = hw_dev_acquisition_stop,