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d4eabea8
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1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2014 Bert Vermeulen <bert@biot.com>
4ee1e2f3
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5 * Copyright (C) 2015 Google, Inc.
6 * (Written by Alexandru Gagniuc <mrnuke@google.com> for Google, Inc.)
d4eabea8
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7 *
8 * This program is free software: you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation, either version 3 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 */
21
6ec6c43b 22#include <config.h>
22c18b03 23#include <string.h>
ba464a12 24#include <strings.h>
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25#include "protocol.h"
26
27#define CH_IDX(x) (1 << x)
4264f1c0 28#define FREQ_DC_ONLY {0, 0, 0}
d4eabea8 29
584560f1 30static const uint32_t devopts_none[] = { };
bfc86799 31
5c9e56c9
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32/* Agilent/Keysight N5700A series */
33static const uint32_t agilent_n5700a_devopts[] = {
34 SR_CONF_CONTINUOUS | SR_CONF_SET,
35};
36
37static const uint32_t agilent_n5700a_devopts_cg[] = {
38 SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
39 SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
40 SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
da005885
UH
41 SR_CONF_VOLTAGE | SR_CONF_GET,
42 SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
43 SR_CONF_CURRENT | SR_CONF_GET,
44 SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
5c9e56c9
AG
45};
46
8cb5affe 47static const struct channel_spec agilent_n5767a_ch[] = {
c80cf3e0 48 { "1", { 0, 60, 0.0001 }, { 0, 25, 0.1 }, FREQ_DC_ONLY },
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AG
49};
50
8cb5affe 51static const struct channel_group_spec agilent_n5767a_cg[] = {
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52 { "1", CH_IDX(0), PPS_OVP | PPS_OCP },
53};
54
55/*
56 * TODO: OVER_CURRENT_PROTECTION_ACTIVE status can be determined by the OC bit
562a3490 57 * in STAT:QUES:EVEN?, but this is not implemented.
5c9e56c9 58 */
8cb5affe 59static const struct scpi_command agilent_n5700a_cmd[] = {
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60 { SCPI_CMD_REMOTE, "SYST:COMM:RLST REM" },
61 { SCPI_CMD_LOCAL, "SYST:COMM:RLST LOC" },
62 { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
63 { SCPI_CMD_GET_MEAS_CURRENT, "MEAS:CURR?" },
64 { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
65 { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" },
66 { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
67 { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
68 { SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP:STAT?" },
69 { SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" },
70 { SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" },
71 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":VOLT:PROT?" },
72 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":VOLT:PROT %.6f" },
73 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ENABLED, ":CURR:PROT:STAT?" },
74 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, ":CURR:PROT:STAT ON?"},
75 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, ":CURR:PROT:STAT OFF?"},
562a3490 76 /* Current limit (CC mode) and OCP are set using the same command. */
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77 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR?" },
78 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR %.6f" },
91ef511d 79 ALL_ZERO
5c9e56c9
AG
80};
81
4ee1e2f3
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82/* Chroma 61600 series AC source */
83static const uint32_t chroma_61604_devopts[] = {
84 SR_CONF_CONTINUOUS | SR_CONF_SET,
85};
86
87static const uint32_t chroma_61604_devopts_cg[] = {
88 SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
89 SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
da005885
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90 SR_CONF_VOLTAGE | SR_CONF_GET,
91 SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
6c0c9dd2
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92 SR_CONF_OUTPUT_FREQUENCY | SR_CONF_GET,
93 SR_CONF_OUTPUT_FREQUENCY_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
da005885
UH
94 SR_CONF_CURRENT | SR_CONF_GET,
95 SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
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96};
97
8cb5affe 98static const struct channel_spec chroma_61604_ch[] = {
6c0c9dd2 99 { "1", { 0, 300, 0.1 }, { 0, 16, 0.1 }, { 1.0, 1000.0, 0.01 } },
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100};
101
8cb5affe 102static const struct channel_group_spec chroma_61604_cg[] = {
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103 { "1", CH_IDX(0), PPS_OVP | PPS_OCP },
104};
105
8cb5affe 106static const struct scpi_command chroma_61604_cmd[] = {
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107 { SCPI_CMD_REMOTE, "SYST:REM" },
108 { SCPI_CMD_LOCAL, "SYST:LOC" },
109 { SCPI_CMD_GET_MEAS_VOLTAGE, ":FETC:VOLT:ACDC?" },
6c0c9dd2 110 { SCPI_CMD_GET_MEAS_FREQUENCY, ":FETC:FREQ?" },
4ee1e2f3
AG
111 { SCPI_CMD_GET_MEAS_CURRENT, ":FETC:CURR:AC?" },
112 { SCPI_CMD_GET_MEAS_POWER, ":FETC:POW:AC?" },
113 { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT:AC?" },
114 { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT:AC %.1f" },
6c0c9dd2
AG
115 { SCPI_CMD_GET_FREQUENCY_TARGET, ":SOUR:FREQ?" },
116 { SCPI_CMD_SET_FREQUENCY_TARGET, ":SOUR:FREQ %.2f" },
4ee1e2f3
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117 { SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP?" },
118 { SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" },
119 { SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" },
120 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:LIM:AC?" },
121 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:LIM:AC %.1f" },
562a3490 122 /* This is not a current limit mode. It is overcurrent protection. */
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123 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR:LIM?" },
124 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR:LIM %.2f" },
91ef511d 125 ALL_ZERO
4ee1e2f3
AG
126};
127
5281993e
AG
128/* Chroma 62000 series DC source */
129
130static const uint32_t chroma_62000_devopts[] = {
131 SR_CONF_CONTINUOUS | SR_CONF_SET,
132};
133
134static const uint32_t chroma_62000_devopts_cg[] = {
135 SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
136 SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
137 SR_CONF_VOLTAGE | SR_CONF_GET,
138 SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
139 SR_CONF_CURRENT | SR_CONF_GET,
140 SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
141 SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
142};
143
5281993e
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144static const struct channel_group_spec chroma_62000_cg[] = {
145 { "1", CH_IDX(0), PPS_OVP | PPS_OCP },
146};
147
148static const struct scpi_command chroma_62000_cmd[] = {
149 { SCPI_CMD_REMOTE, ":CONF:REM ON" },
150 { SCPI_CMD_LOCAL, ":CONF:REM OFF" },
151 { SCPI_CMD_BEEPER, ":CONF:BEEP?" },
152 { SCPI_CMD_BEEPER_ENABLE, ":CONF:BEEP ON" },
153 { SCPI_CMD_BEEPER_DISABLE, ":CONF:BEEP OFF" },
154 { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
155 { SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" },
156 { SCPI_CMD_GET_MEAS_POWER, ":MEAS:POW?" },
157 { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
158 { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.2f" },
159 { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
160 { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
161 { SCPI_CMD_GET_OUTPUT_ENABLED, ":CONF:OUTP?" },
162 { SCPI_CMD_SET_OUTPUT_ENABLE, ":CONF:OUTP ON" },
163 { SCPI_CMD_SET_OUTPUT_DISABLE, ":CONF:OUTP OFF" },
164 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:PROT:HIGH?" },
165 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:PROT:HIGH %.6f" },
166 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR:PROT:HIGH?" },
167 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR:PROT:HIGH %.6f" },
91ef511d 168 ALL_ZERO
5281993e
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169};
170
9a5185c7
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171static int chroma_62000p_probe_channels(struct sr_dev_inst *sdi,
172 struct sr_scpi_hw_info *hw_info,
173 struct channel_spec **channels, unsigned int *num_channels,
174 struct channel_group_spec **channel_groups,
175 unsigned int *num_channel_groups)
176{
177 unsigned int volts, amps;
178 struct channel_spec *channel;
179
180 (void)sdi;
181
182 sscanf(hw_info->model, "%*[^P]P-%u-%u", &volts, &amps);
183 sr_dbg("Found device rated for %d V and %d A", volts, amps);
184
185 if (volts > 600) {
186 sr_err("Probed max voltage of %u V is out of spec.", volts);
187 return SR_ERR_BUG;
188 }
189
190 if (volts > 120) {
191 sr_err("Probed max current of %u A is out of spec.", amps);
192 return SR_ERR_BUG;
193 }
194
195 channel = g_malloc0(sizeof(struct channel_spec));
196 channel->name = "1";
197 channel->voltage[0] = channel->current[0] = 0.0;
198 channel->voltage[1] = (float)volts;
199 channel->current[1] = (float)amps;
200 channel->voltage[2] = channel->current[2] = 0.01;
201 *channels = channel;
202 *num_channels = 1;
203
204 *channel_groups = g_malloc(sizeof(struct channel_group_spec));
205 **channel_groups = chroma_62000_cg[0];
206 *num_channel_groups = 1;
207
208 return SR_OK;
209}
210
d4eabea8 211/* Rigol DP800 series */
584560f1 212static const uint32_t rigol_dp800_devopts[] = {
9d9cf1c4 213 SR_CONF_CONTINUOUS | SR_CONF_SET,
5827f61b 214 SR_CONF_OVER_TEMPERATURE_PROTECTION | SR_CONF_GET | SR_CONF_SET,
d4eabea8
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215};
216
584560f1 217static const uint32_t rigol_dp800_devopts_cg[] = {
7a0b98b5 218 SR_CONF_REGULATION | SR_CONF_GET,
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219 SR_CONF_OVER_VOLTAGE_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
220 SR_CONF_OVER_VOLTAGE_PROTECTION_ACTIVE | SR_CONF_GET,
221 SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
222 SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
223 SR_CONF_OVER_CURRENT_PROTECTION_ACTIVE | SR_CONF_GET,
224 SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
7a0b98b5
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225 SR_CONF_VOLTAGE | SR_CONF_GET,
226 SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
227 SR_CONF_CURRENT | SR_CONF_GET,
228 SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
229 SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
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230};
231
8cb5affe 232static const struct channel_spec rigol_dp821a_ch[] = {
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233 { "1", { 0, 60, 0.001 }, { 0, 1, 0.0001 }, FREQ_DC_ONLY },
234 { "2", { 0, 8, 0.001 }, { 0, 10, 0.001 }, FREQ_DC_ONLY },
cfcdf576
ML
235};
236
8cb5affe 237static const struct channel_spec rigol_dp831_ch[] = {
4264f1c0
AG
238 { "1", { 0, 8, 0.001 }, { 0, 5, 0.0003 }, FREQ_DC_ONLY },
239 { "2", { 0, 30, 0.001 }, { 0, 2, 0.0001 }, FREQ_DC_ONLY },
240 { "3", { 0, -30, 0.001 }, { 0, 2, 0.0001 }, FREQ_DC_ONLY },
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241};
242
8cb5affe 243static const struct channel_spec rigol_dp832_ch[] = {
4264f1c0
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244 { "1", { 0, 30, 0.001 }, { 0, 3, 0.001 }, FREQ_DC_ONLY },
245 { "2", { 0, 30, 0.001 }, { 0, 3, 0.001 }, FREQ_DC_ONLY },
246 { "3", { 0, 5, 0.001 }, { 0, 3, 0.001 }, FREQ_DC_ONLY },
3222ee10
BV
247};
248
8cb5affe 249static const struct channel_group_spec rigol_dp820_cg[] = {
cfcdf576
ML
250 { "1", CH_IDX(0), PPS_OVP | PPS_OCP },
251 { "2", CH_IDX(1), PPS_OVP | PPS_OCP },
252};
253
8cb5affe 254static const struct channel_group_spec rigol_dp830_cg[] = {
d4eabea8
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255 { "1", CH_IDX(0), PPS_OVP | PPS_OCP },
256 { "2", CH_IDX(1), PPS_OVP | PPS_OCP },
257 { "3", CH_IDX(2), PPS_OVP | PPS_OCP },
258};
259
8cb5affe 260static const struct scpi_command rigol_dp800_cmd[] = {
60475cd7
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261 { SCPI_CMD_REMOTE, "SYST:REMOTE" },
262 { SCPI_CMD_LOCAL, "SYST:LOCAL" },
ee2860ee
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263 { SCPI_CMD_BEEPER, "SYST:BEEP:STAT?" },
264 { SCPI_CMD_BEEPER_ENABLE, "SYST:BEEP:STAT ON" },
265 { SCPI_CMD_BEEPER_DISABLE, "SYST:BEEP:STAT OFF" },
60475cd7
BV
266 { SCPI_CMD_SELECT_CHANNEL, ":INST:NSEL %s" },
267 { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
268 { SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" },
269 { SCPI_CMD_GET_MEAS_POWER, ":MEAS:POWE?" },
270 { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
271 { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" },
272 { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
273 { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
274 { SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP?" },
275 { SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" },
276 { SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" },
277 { SCPI_CMD_GET_OUTPUT_REGULATION, ":OUTP:MODE?" },
d4eabea8 278 { SCPI_CMD_GET_OVER_TEMPERATURE_PROTECTION, ":SYST:OTP?" },
53a81803
BV
279 { SCPI_CMD_SET_OVER_TEMPERATURE_PROTECTION_ENABLE, ":SYST:OTP ON" },
280 { SCPI_CMD_SET_OVER_TEMPERATURE_PROTECTION_DISABLE, ":SYST:OTP OFF" },
60475cd7
BV
281 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ENABLED, ":OUTP:OVP?" },
282 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_ENABLE, ":OUTP:OVP ON" },
283 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_DISABLE, ":OUTP:OVP OFF" },
284 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ACTIVE, ":OUTP:OVP:QUES?" },
285 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":OUTP:OVP:VAL?" },
286 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":OUTP:OVP:VAL %.6f" },
287 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ENABLED, ":OUTP:OCP?" },
288 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, ":OUTP:OCP:STAT ON" },
289 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, ":OUTP:OCP:STAT OFF" },
290 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ACTIVE, ":OUTP:OCP:QUES?" },
291 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":OUTP:OCP:VAL?" },
292 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":OUTP:OCP:VAL %.6f" },
91ef511d 293 ALL_ZERO
d4eabea8
BV
294};
295
bfc86799 296/* HP 663xx series */
584560f1 297static const uint32_t hp_6632b_devopts[] = {
9d9cf1c4 298 SR_CONF_CONTINUOUS | SR_CONF_SET,
7a0b98b5
AJ
299 SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
300 SR_CONF_VOLTAGE | SR_CONF_GET,
301 SR_CONF_CURRENT | SR_CONF_GET,
302 SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
303 SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
bc4a2a46
BV
304};
305
8cb5affe 306static const struct channel_spec hp_6632b_ch[] = {
4264f1c0 307 { "1", { 0, 20.475, 0.005 }, { 0, 5.1188, 0.00132 }, FREQ_DC_ONLY },
bc4a2a46
BV
308};
309
8cb5affe 310static const struct channel_group_spec hp_6632b_cg[] = {
bc4a2a46
BV
311 { "1", CH_IDX(0), 0 },
312};
313
8cb5affe 314static const struct scpi_command hp_6632b_cmd[] = {
bc4a2a46 315 { SCPI_CMD_GET_OUTPUT_ENABLED, "OUTP:STAT?" },
53a81803
BV
316 { SCPI_CMD_SET_OUTPUT_ENABLE, "OUTP:STAT ON" },
317 { SCPI_CMD_SET_OUTPUT_DISABLE, "OUTP:STAT OFF" },
bc4a2a46
BV
318 { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
319 { SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" },
ca95e90f
BV
320 { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
321 { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" },
322 { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
323 { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
91ef511d 324 ALL_ZERO
bc4a2a46
BV
325};
326
c3eadb07 327/* Philips/Fluke PM2800 series */
9d9cf1c4
BV
328static const uint32_t philips_pm2800_devopts[] = {
329 SR_CONF_CONTINUOUS | SR_CONF_SET,
330};
331
c3eadb07 332static const uint32_t philips_pm2800_devopts_cg[] = {
7a0b98b5
AJ
333 SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
334 SR_CONF_VOLTAGE | SR_CONF_GET,
335 SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
336 SR_CONF_CURRENT | SR_CONF_GET,
337 SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
c3eadb07
BV
338 SR_CONF_OVER_VOLTAGE_PROTECTION_ACTIVE | SR_CONF_GET,
339 SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
340 SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
341 SR_CONF_OVER_CURRENT_PROTECTION_ACTIVE | SR_CONF_GET,
7a0b98b5 342 SR_CONF_REGULATION | SR_CONF_GET,
c3eadb07
BV
343};
344
345enum philips_pm2800_modules {
346 PM2800_MOD_30V_10A = 1,
347 PM2800_MOD_60V_5A,
348 PM2800_MOD_60V_10A,
349 PM2800_MOD_8V_15A,
350 PM2800_MOD_60V_2A,
351 PM2800_MOD_120V_1A,
352};
353
329733d9 354static const struct philips_pm2800_module_spec {
c3eadb07
BV
355 /* Min, max, programming resolution. */
356 float voltage[3];
357 float current[3];
358} philips_pm2800_module_specs[] = {
359 /* Autoranging modules. */
360 [PM2800_MOD_30V_10A] = { { 0, 30, 0.0075 }, { 0, 10, 0.0025 } },
361 [PM2800_MOD_60V_5A] = { { 0, 60, 0.015 }, { 0, 5, 0.00125 } },
362 [PM2800_MOD_60V_10A] = { { 0, 60, 0.015 }, { 0, 10, 0.0025 } },
363 /* Linear modules. */
364 [PM2800_MOD_8V_15A] = { { 0, 8, 0.002 }, { -15, 15, 0.00375 } },
365 [PM2800_MOD_60V_2A] = { { 0, 60, 0.015 }, { -2, 2, 0.0005 } },
366 [PM2800_MOD_120V_1A] = { { 0, 120, 0.030 }, { -1, 1, 0.00025 } },
367};
368
329733d9 369static const struct philips_pm2800_model {
c3eadb07
BV
370 unsigned int chassis;
371 unsigned int num_modules;
372 unsigned int set;
373 unsigned int modules[3];
374} philips_pm2800_matrix[] = {
375 /* Autoranging chassis. */
376 { 1, 1, 0, { PM2800_MOD_30V_10A, 0, 0 } },
377 { 1, 1, 1, { PM2800_MOD_60V_5A, 0, 0 } },
378 { 1, 2, 0, { PM2800_MOD_30V_10A, PM2800_MOD_30V_10A, 0 } },
379 { 1, 2, 1, { PM2800_MOD_60V_5A, PM2800_MOD_60V_5A, 0 } },
380 { 1, 2, 2, { PM2800_MOD_30V_10A, PM2800_MOD_60V_5A, 0 } },
381 { 1, 2, 3, { PM2800_MOD_30V_10A, PM2800_MOD_60V_10A, 0 } },
382 { 1, 2, 4, { PM2800_MOD_60V_5A, PM2800_MOD_60V_10A, 0 } },
383 { 1, 3, 0, { PM2800_MOD_30V_10A, PM2800_MOD_30V_10A, PM2800_MOD_30V_10A } },
384 { 1, 3, 1, { PM2800_MOD_60V_5A, PM2800_MOD_60V_5A, PM2800_MOD_60V_5A } },
385 { 1, 3, 2, { PM2800_MOD_30V_10A, PM2800_MOD_30V_10A, PM2800_MOD_60V_5A } },
386 { 1, 3, 3, { PM2800_MOD_30V_10A, PM2800_MOD_60V_5A, PM2800_MOD_60V_5A } },
387 /* Linear chassis. */
388 { 3, 1, 0, { PM2800_MOD_60V_2A, 0, 0 } },
389 { 3, 1, 1, { PM2800_MOD_120V_1A, 0, 0 } },
390 { 3, 1, 2, { PM2800_MOD_8V_15A, 0, 0 } },
391 { 3, 2, 0, { PM2800_MOD_60V_2A, 0, 0 } },
392 { 3, 2, 1, { PM2800_MOD_120V_1A, 0, 0 } },
393 { 3, 2, 2, { PM2800_MOD_60V_2A, PM2800_MOD_120V_1A, 0 } },
394 { 3, 2, 3, { PM2800_MOD_8V_15A, PM2800_MOD_8V_15A, 0 } },
395};
396
329733d9 397static const char *philips_pm2800_names[] = { "1", "2", "3" };
c3eadb07
BV
398
399static int philips_pm2800_probe_channels(struct sr_dev_inst *sdi,
400 struct sr_scpi_hw_info *hw_info,
401 struct channel_spec **channels, unsigned int *num_channels,
402 struct channel_group_spec **channel_groups, unsigned int *num_channel_groups)
403{
329733d9
UH
404 const struct philips_pm2800_model *model;
405 const struct philips_pm2800_module_spec *spec;
c3eadb07
BV
406 unsigned int chassis, num_modules, set, module, m, i;
407
408 (void)sdi;
409
410 /*
411 * The model number as reported by *IDN? looks like e.g. PM2813/11,
412 * Where "PM28" is fixed, followed by the chassis code (1 = autoranging,
413 * 3 = linear series) and the number of modules: 1-3 for autoranging,
414 * 1-2 for linear.
415 * After the slash, the first digit denotes the module set. The
416 * digit after that denotes front (5) or rear (1) binding posts.
417 */
418 chassis = hw_info->model[4] - 0x30;
419 num_modules = hw_info->model[5] - 0x30;
420 set = hw_info->model[7] - 0x30;
421 for (m = 0; m < ARRAY_SIZE(philips_pm2800_matrix); m++) {
422 model = &philips_pm2800_matrix[m];
423 if (model->chassis == chassis && model->num_modules == num_modules
424 && model->set == set)
425 break;
426 }
427 if (m == ARRAY_SIZE(philips_pm2800_matrix)) {
428 sr_dbg("Model %s not found in matrix.", hw_info->model);
429 return SR_ERR;
430 }
431
432 sr_dbg("Found %d output channel%s:", num_modules, num_modules > 1 ? "s" : "");
433 *channels = g_malloc0(sizeof(struct channel_spec) * num_modules);
434 *channel_groups = g_malloc0(sizeof(struct channel_group_spec) * num_modules);
435 for (i = 0; i < num_modules; i++) {
436 module = model->modules[i];
437 spec = &philips_pm2800_module_specs[module];
438 sr_dbg("output %d: %.0f - %.0fV, %.0f - %.0fA", i + 1,
439 spec->voltage[0], spec->voltage[1],
440 spec->current[0], spec->current[1]);
329733d9 441 (*channels)[i].name = (char *)philips_pm2800_names[i];
c3eadb07 442 memcpy(&((*channels)[i].voltage), spec, sizeof(float) * 6);
329733d9 443 (*channel_groups)[i].name = (char *)philips_pm2800_names[i];
c3eadb07
BV
444 (*channel_groups)[i].channel_index_mask = 1 << i;
445 (*channel_groups)[i].features = PPS_OTP | PPS_OVP | PPS_OCP;
446 }
447 *num_channels = *num_channel_groups = num_modules;
448
449 return SR_OK;
450}
451
8cb5affe 452static const struct scpi_command philips_pm2800_cmd[] = {
c3eadb07
BV
453 { SCPI_CMD_SELECT_CHANNEL, ":INST:NSEL %s" },
454 { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
455 { SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" },
456 { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
457 { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" },
458 { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
459 { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
460 { SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP?" },
461 { SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" },
462 { SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" },
463 { SCPI_CMD_GET_OUTPUT_REGULATION, ":SOUR:FUNC:MODE?" },
464 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ACTIVE, ":SOUR:VOLT:PROT:TRIP?" },
465 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:PROT:LEV?" },
466 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:PROT:LEV %.6f" },
467 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ENABLED, ":SOUR:CURR:PROT:STAT?" },
468 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, ":SOUR:CURR:PROT:STAT ON" },
469 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, ":SOUR:CURR:PROT:STAT OFF" },
470 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ACTIVE, ":SOUR:CURR:PROT:TRIP?" },
91ef511d 471 ALL_ZERO
c3eadb07
BV
472};
473
d4eabea8 474SR_PRIV const struct scpi_pps pps_profiles[] = {
5c9e56c9
AG
475 /* Agilent N5767A */
476 { "Agilent", "N5767A", 0,
477 ARRAY_AND_SIZE(agilent_n5700a_devopts),
478 ARRAY_AND_SIZE(agilent_n5700a_devopts_cg),
479 ARRAY_AND_SIZE(agilent_n5767a_ch),
480 ARRAY_AND_SIZE(agilent_n5767a_cg),
91ef511d 481 agilent_n5700a_cmd,
5c9e56c9
AG
482 .probe_channels = NULL,
483 },
4ee1e2f3
AG
484 /* Chroma 61604 */
485 { "Chroma", "61604", 0,
486 ARRAY_AND_SIZE(chroma_61604_devopts),
487 ARRAY_AND_SIZE(chroma_61604_devopts_cg),
488 ARRAY_AND_SIZE(chroma_61604_ch),
489 ARRAY_AND_SIZE(chroma_61604_cg),
91ef511d 490 chroma_61604_cmd,
4ee1e2f3
AG
491 .probe_channels = NULL,
492 },
5281993e 493 /* Chroma 62000 series */
9a5185c7 494 { "Chroma", "620[0-9]{2}P-[0-9]{2,3}-[0-9]{1,3}", 0,
5281993e
AG
495 ARRAY_AND_SIZE(chroma_62000_devopts),
496 ARRAY_AND_SIZE(chroma_62000_devopts_cg),
9a5185c7
AG
497 NULL, 0,
498 NULL, 0,
91ef511d 499 chroma_62000_cmd,
9a5185c7 500 .probe_channels = chroma_62000p_probe_channels,
5281993e 501 },
bc4a2a46
BV
502 /* HP 6632B */
503 { "HP", "6632B", 0,
504 ARRAY_AND_SIZE(hp_6632b_devopts),
bfc86799 505 ARRAY_AND_SIZE(devopts_none),
bc4a2a46
BV
506 ARRAY_AND_SIZE(hp_6632b_ch),
507 ARRAY_AND_SIZE(hp_6632b_cg),
91ef511d 508 hp_6632b_cmd,
c3eadb07 509 .probe_channels = NULL,
bc4a2a46
BV
510 },
511
d4eabea8 512 /* Rigol DP800 series */
cfcdf576
ML
513 { "Rigol", "^DP821A$", PPS_OTP,
514 ARRAY_AND_SIZE(rigol_dp800_devopts),
515 ARRAY_AND_SIZE(rigol_dp800_devopts_cg),
516 ARRAY_AND_SIZE(rigol_dp821a_ch),
517 ARRAY_AND_SIZE(rigol_dp820_cg),
91ef511d 518 rigol_dp800_cmd,
cfcdf576
ML
519 .probe_channels = NULL,
520 },
3222ee10
BV
521 { "Rigol", "^DP831A$", PPS_OTP,
522 ARRAY_AND_SIZE(rigol_dp800_devopts),
523 ARRAY_AND_SIZE(rigol_dp800_devopts_cg),
524 ARRAY_AND_SIZE(rigol_dp831_ch),
cfcdf576 525 ARRAY_AND_SIZE(rigol_dp830_cg),
91ef511d 526 rigol_dp800_cmd,
c3eadb07 527 .probe_channels = NULL,
3222ee10
BV
528 },
529 { "Rigol", "^(DP832|DP832A)$", PPS_OTP,
530 ARRAY_AND_SIZE(rigol_dp800_devopts),
531 ARRAY_AND_SIZE(rigol_dp800_devopts_cg),
532 ARRAY_AND_SIZE(rigol_dp832_ch),
cfcdf576 533 ARRAY_AND_SIZE(rigol_dp830_cg),
91ef511d 534 rigol_dp800_cmd,
c3eadb07
BV
535 .probe_channels = NULL,
536 },
537
538 /* Philips/Fluke PM2800 series */
539 { "Philips", "^PM28[13][123]/[01234]{1,2}$", 0,
9d9cf1c4 540 ARRAY_AND_SIZE(philips_pm2800_devopts),
c3eadb07
BV
541 ARRAY_AND_SIZE(philips_pm2800_devopts_cg),
542 NULL, 0,
543 NULL, 0,
91ef511d 544 philips_pm2800_cmd,
c3eadb07 545 philips_pm2800_probe_channels,
d4eabea8
BV
546 },
547};
d4eabea8 548
1beccaed 549SR_PRIV unsigned int num_pps_profiles = ARRAY_SIZE(pps_profiles);