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scpi-pps: Add profile for Chroma 62024P-80-60 DC Source
[libsigrok.git] / src / hardware / scpi-pps / profiles.c
CommitLineData
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1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2014 Bert Vermeulen <bert@biot.com>
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5 * Copyright (C) 2015 Google, Inc.
6 * (Written by Alexandru Gagniuc <mrnuke@google.com> for Google, Inc.)
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7 *
8 * This program is free software: you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation, either version 3 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 */
21
22c18b03 22#include <string.h>
ba464a12 23#include <strings.h>
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24#include "protocol.h"
25
26#define CH_IDX(x) (1 << x)
4264f1c0 27#define FREQ_DC_ONLY {0, 0, 0}
d4eabea8 28
8cb5affe 29static const char *pps_vendors[][2] = {
22c18b03 30 { "RIGOL TECHNOLOGIES", "Rigol" },
bc4a2a46 31 { "HEWLETT-PACKARD", "HP" },
c3eadb07 32 { "PHILIPS", "Philips" },
5281993e 33 { "CHROMA", "Chroma" },
4ee1e2f3 34 { "Chroma ATE", "Chroma" },
5c9e56c9 35 { "Agilent Technologies", "Agilent" },
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36};
37
562a3490 38SR_PRIV const char *get_vendor(const char *raw_vendor)
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39{
40 unsigned int i;
41
42 for (i = 0; i < ARRAY_SIZE(pps_vendors); i++) {
43 if (!strcasecmp(raw_vendor, pps_vendors[i][0]))
44 return pps_vendors[i][1];
45 }
46
47 return raw_vendor;
48}
49
584560f1 50static const uint32_t devopts_none[] = { };
bfc86799 51
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52/* Agilent/Keysight N5700A series */
53static const uint32_t agilent_n5700a_devopts[] = {
54 SR_CONF_CONTINUOUS | SR_CONF_SET,
55};
56
57static const uint32_t agilent_n5700a_devopts_cg[] = {
58 SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
59 SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
60 SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
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61 SR_CONF_VOLTAGE | SR_CONF_GET,
62 SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
63 SR_CONF_CURRENT | SR_CONF_GET,
64 SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
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65};
66
8cb5affe 67static const struct channel_spec agilent_n5767a_ch[] = {
c80cf3e0 68 { "1", { 0, 60, 0.0001 }, { 0, 25, 0.1 }, FREQ_DC_ONLY },
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69};
70
8cb5affe 71static const struct channel_group_spec agilent_n5767a_cg[] = {
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72 { "1", CH_IDX(0), PPS_OVP | PPS_OCP },
73};
74
75/*
76 * TODO: OVER_CURRENT_PROTECTION_ACTIVE status can be determined by the OC bit
562a3490 77 * in STAT:QUES:EVEN?, but this is not implemented.
5c9e56c9 78 */
8cb5affe 79static const struct scpi_command agilent_n5700a_cmd[] = {
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80 { SCPI_CMD_REMOTE, "SYST:COMM:RLST REM" },
81 { SCPI_CMD_LOCAL, "SYST:COMM:RLST LOC" },
82 { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
83 { SCPI_CMD_GET_MEAS_CURRENT, "MEAS:CURR?" },
84 { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
85 { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" },
86 { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
87 { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
88 { SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP:STAT?" },
89 { SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" },
90 { SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" },
91 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":VOLT:PROT?" },
92 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":VOLT:PROT %.6f" },
93 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ENABLED, ":CURR:PROT:STAT?" },
94 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, ":CURR:PROT:STAT ON?"},
95 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, ":CURR:PROT:STAT OFF?"},
562a3490 96 /* Current limit (CC mode) and OCP are set using the same command. */
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97 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR?" },
98 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR %.6f" },
99};
100
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101/* Chroma 61600 series AC source */
102static const uint32_t chroma_61604_devopts[] = {
103 SR_CONF_CONTINUOUS | SR_CONF_SET,
104};
105
106static const uint32_t chroma_61604_devopts_cg[] = {
107 SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
108 SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
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109 SR_CONF_VOLTAGE | SR_CONF_GET,
110 SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
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111 SR_CONF_OUTPUT_FREQUENCY | SR_CONF_GET,
112 SR_CONF_OUTPUT_FREQUENCY_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
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113 SR_CONF_CURRENT | SR_CONF_GET,
114 SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
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115};
116
8cb5affe 117static const struct channel_spec chroma_61604_ch[] = {
6c0c9dd2 118 { "1", { 0, 300, 0.1 }, { 0, 16, 0.1 }, { 1.0, 1000.0, 0.01 } },
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119};
120
8cb5affe 121static const struct channel_group_spec chroma_61604_cg[] = {
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122 { "1", CH_IDX(0), PPS_OVP | PPS_OCP },
123};
124
8cb5affe 125static const struct scpi_command chroma_61604_cmd[] = {
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126 { SCPI_CMD_REMOTE, "SYST:REM" },
127 { SCPI_CMD_LOCAL, "SYST:LOC" },
128 { SCPI_CMD_GET_MEAS_VOLTAGE, ":FETC:VOLT:ACDC?" },
6c0c9dd2 129 { SCPI_CMD_GET_MEAS_FREQUENCY, ":FETC:FREQ?" },
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130 { SCPI_CMD_GET_MEAS_CURRENT, ":FETC:CURR:AC?" },
131 { SCPI_CMD_GET_MEAS_POWER, ":FETC:POW:AC?" },
132 { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT:AC?" },
133 { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT:AC %.1f" },
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134 { SCPI_CMD_GET_FREQUENCY_TARGET, ":SOUR:FREQ?" },
135 { SCPI_CMD_SET_FREQUENCY_TARGET, ":SOUR:FREQ %.2f" },
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136 { SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP?" },
137 { SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" },
138 { SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" },
139 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:LIM:AC?" },
140 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:LIM:AC %.1f" },
562a3490 141 /* This is not a current limit mode. It is overcurrent protection. */
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142 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR:LIM?" },
143 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR:LIM %.2f" },
144};
145
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146/* Chroma 62000 series DC source */
147
148static const uint32_t chroma_62000_devopts[] = {
149 SR_CONF_CONTINUOUS | SR_CONF_SET,
150};
151
152static const uint32_t chroma_62000_devopts_cg[] = {
153 SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
154 SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
155 SR_CONF_VOLTAGE | SR_CONF_GET,
156 SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
157 SR_CONF_CURRENT | SR_CONF_GET,
158 SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
159 SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
160};
161
162static const struct channel_spec chroma_62024p_80_60_ch[] = {
163 { "1", { 0, 80, 0.01 }, { 0, 60, 0.01 }, FREQ_DC_ONLY },
164};
165
166static const struct channel_group_spec chroma_62000_cg[] = {
167 { "1", CH_IDX(0), PPS_OVP | PPS_OCP },
168};
169
170static const struct scpi_command chroma_62000_cmd[] = {
171 { SCPI_CMD_REMOTE, ":CONF:REM ON" },
172 { SCPI_CMD_LOCAL, ":CONF:REM OFF" },
173 { SCPI_CMD_BEEPER, ":CONF:BEEP?" },
174 { SCPI_CMD_BEEPER_ENABLE, ":CONF:BEEP ON" },
175 { SCPI_CMD_BEEPER_DISABLE, ":CONF:BEEP OFF" },
176 { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
177 { SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" },
178 { SCPI_CMD_GET_MEAS_POWER, ":MEAS:POW?" },
179 { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
180 { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.2f" },
181 { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
182 { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
183 { SCPI_CMD_GET_OUTPUT_ENABLED, ":CONF:OUTP?" },
184 { SCPI_CMD_SET_OUTPUT_ENABLE, ":CONF:OUTP ON" },
185 { SCPI_CMD_SET_OUTPUT_DISABLE, ":CONF:OUTP OFF" },
186 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:PROT:HIGH?" },
187 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:PROT:HIGH %.6f" },
188 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR:PROT:HIGH?" },
189 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR:PROT:HIGH %.6f" },
190};
191
d4eabea8 192/* Rigol DP800 series */
584560f1 193static const uint32_t rigol_dp800_devopts[] = {
9d9cf1c4 194 SR_CONF_CONTINUOUS | SR_CONF_SET,
5827f61b 195 SR_CONF_OVER_TEMPERATURE_PROTECTION | SR_CONF_GET | SR_CONF_SET,
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196};
197
584560f1 198static const uint32_t rigol_dp800_devopts_cg[] = {
7a0b98b5 199 SR_CONF_REGULATION | SR_CONF_GET,
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200 SR_CONF_OVER_VOLTAGE_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
201 SR_CONF_OVER_VOLTAGE_PROTECTION_ACTIVE | SR_CONF_GET,
202 SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
203 SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
204 SR_CONF_OVER_CURRENT_PROTECTION_ACTIVE | SR_CONF_GET,
205 SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
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206 SR_CONF_VOLTAGE | SR_CONF_GET,
207 SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
208 SR_CONF_CURRENT | SR_CONF_GET,
209 SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
210 SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
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211};
212
8cb5affe 213static const struct channel_spec rigol_dp821a_ch[] = {
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214 { "1", { 0, 60, 0.001 }, { 0, 1, 0.0001 }, FREQ_DC_ONLY },
215 { "2", { 0, 8, 0.001 }, { 0, 10, 0.001 }, FREQ_DC_ONLY },
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216};
217
8cb5affe 218static const struct channel_spec rigol_dp831_ch[] = {
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219 { "1", { 0, 8, 0.001 }, { 0, 5, 0.0003 }, FREQ_DC_ONLY },
220 { "2", { 0, 30, 0.001 }, { 0, 2, 0.0001 }, FREQ_DC_ONLY },
221 { "3", { 0, -30, 0.001 }, { 0, 2, 0.0001 }, FREQ_DC_ONLY },
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222};
223
8cb5affe 224static const struct channel_spec rigol_dp832_ch[] = {
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225 { "1", { 0, 30, 0.001 }, { 0, 3, 0.001 }, FREQ_DC_ONLY },
226 { "2", { 0, 30, 0.001 }, { 0, 3, 0.001 }, FREQ_DC_ONLY },
227 { "3", { 0, 5, 0.001 }, { 0, 3, 0.001 }, FREQ_DC_ONLY },
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228};
229
8cb5affe 230static const struct channel_group_spec rigol_dp820_cg[] = {
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231 { "1", CH_IDX(0), PPS_OVP | PPS_OCP },
232 { "2", CH_IDX(1), PPS_OVP | PPS_OCP },
233};
234
8cb5affe 235static const struct channel_group_spec rigol_dp830_cg[] = {
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236 { "1", CH_IDX(0), PPS_OVP | PPS_OCP },
237 { "2", CH_IDX(1), PPS_OVP | PPS_OCP },
238 { "3", CH_IDX(2), PPS_OVP | PPS_OCP },
239};
240
8cb5affe 241static const struct scpi_command rigol_dp800_cmd[] = {
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242 { SCPI_CMD_REMOTE, "SYST:REMOTE" },
243 { SCPI_CMD_LOCAL, "SYST:LOCAL" },
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244 { SCPI_CMD_BEEPER, "SYST:BEEP:STAT?" },
245 { SCPI_CMD_BEEPER_ENABLE, "SYST:BEEP:STAT ON" },
246 { SCPI_CMD_BEEPER_DISABLE, "SYST:BEEP:STAT OFF" },
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247 { SCPI_CMD_SELECT_CHANNEL, ":INST:NSEL %s" },
248 { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
249 { SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" },
250 { SCPI_CMD_GET_MEAS_POWER, ":MEAS:POWE?" },
251 { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
252 { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" },
253 { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
254 { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
255 { SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP?" },
256 { SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" },
257 { SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" },
258 { SCPI_CMD_GET_OUTPUT_REGULATION, ":OUTP:MODE?" },
d4eabea8 259 { SCPI_CMD_GET_OVER_TEMPERATURE_PROTECTION, ":SYST:OTP?" },
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260 { SCPI_CMD_SET_OVER_TEMPERATURE_PROTECTION_ENABLE, ":SYST:OTP ON" },
261 { SCPI_CMD_SET_OVER_TEMPERATURE_PROTECTION_DISABLE, ":SYST:OTP OFF" },
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262 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ENABLED, ":OUTP:OVP?" },
263 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_ENABLE, ":OUTP:OVP ON" },
264 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_DISABLE, ":OUTP:OVP OFF" },
265 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ACTIVE, ":OUTP:OVP:QUES?" },
266 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":OUTP:OVP:VAL?" },
267 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":OUTP:OVP:VAL %.6f" },
268 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ENABLED, ":OUTP:OCP?" },
269 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, ":OUTP:OCP:STAT ON" },
270 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, ":OUTP:OCP:STAT OFF" },
271 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ACTIVE, ":OUTP:OCP:QUES?" },
272 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":OUTP:OCP:VAL?" },
273 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":OUTP:OCP:VAL %.6f" },
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274};
275
bfc86799 276/* HP 663xx series */
584560f1 277static const uint32_t hp_6632b_devopts[] = {
9d9cf1c4 278 SR_CONF_CONTINUOUS | SR_CONF_SET,
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279 SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
280 SR_CONF_VOLTAGE | SR_CONF_GET,
281 SR_CONF_CURRENT | SR_CONF_GET,
282 SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
283 SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
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284};
285
8cb5affe 286static const struct channel_spec hp_6632b_ch[] = {
4264f1c0 287 { "1", { 0, 20.475, 0.005 }, { 0, 5.1188, 0.00132 }, FREQ_DC_ONLY },
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288};
289
8cb5affe 290static const struct channel_group_spec hp_6632b_cg[] = {
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291 { "1", CH_IDX(0), 0 },
292};
293
8cb5affe 294static const struct scpi_command hp_6632b_cmd[] = {
bc4a2a46 295 { SCPI_CMD_GET_OUTPUT_ENABLED, "OUTP:STAT?" },
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296 { SCPI_CMD_SET_OUTPUT_ENABLE, "OUTP:STAT ON" },
297 { SCPI_CMD_SET_OUTPUT_DISABLE, "OUTP:STAT OFF" },
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298 { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
299 { SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" },
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300 { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
301 { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" },
302 { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
303 { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
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304};
305
c3eadb07 306/* Philips/Fluke PM2800 series */
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307static const uint32_t philips_pm2800_devopts[] = {
308 SR_CONF_CONTINUOUS | SR_CONF_SET,
309};
310
c3eadb07 311static const uint32_t philips_pm2800_devopts_cg[] = {
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AJ
312 SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
313 SR_CONF_VOLTAGE | SR_CONF_GET,
314 SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
315 SR_CONF_CURRENT | SR_CONF_GET,
316 SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
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317 SR_CONF_OVER_VOLTAGE_PROTECTION_ACTIVE | SR_CONF_GET,
318 SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
319 SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
320 SR_CONF_OVER_CURRENT_PROTECTION_ACTIVE | SR_CONF_GET,
7a0b98b5 321 SR_CONF_REGULATION | SR_CONF_GET,
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322};
323
324enum philips_pm2800_modules {
325 PM2800_MOD_30V_10A = 1,
326 PM2800_MOD_60V_5A,
327 PM2800_MOD_60V_10A,
328 PM2800_MOD_8V_15A,
329 PM2800_MOD_60V_2A,
330 PM2800_MOD_120V_1A,
331};
332
329733d9 333static const struct philips_pm2800_module_spec {
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334 /* Min, max, programming resolution. */
335 float voltage[3];
336 float current[3];
337} philips_pm2800_module_specs[] = {
338 /* Autoranging modules. */
339 [PM2800_MOD_30V_10A] = { { 0, 30, 0.0075 }, { 0, 10, 0.0025 } },
340 [PM2800_MOD_60V_5A] = { { 0, 60, 0.015 }, { 0, 5, 0.00125 } },
341 [PM2800_MOD_60V_10A] = { { 0, 60, 0.015 }, { 0, 10, 0.0025 } },
342 /* Linear modules. */
343 [PM2800_MOD_8V_15A] = { { 0, 8, 0.002 }, { -15, 15, 0.00375 } },
344 [PM2800_MOD_60V_2A] = { { 0, 60, 0.015 }, { -2, 2, 0.0005 } },
345 [PM2800_MOD_120V_1A] = { { 0, 120, 0.030 }, { -1, 1, 0.00025 } },
346};
347
329733d9 348static const struct philips_pm2800_model {
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349 unsigned int chassis;
350 unsigned int num_modules;
351 unsigned int set;
352 unsigned int modules[3];
353} philips_pm2800_matrix[] = {
354 /* Autoranging chassis. */
355 { 1, 1, 0, { PM2800_MOD_30V_10A, 0, 0 } },
356 { 1, 1, 1, { PM2800_MOD_60V_5A, 0, 0 } },
357 { 1, 2, 0, { PM2800_MOD_30V_10A, PM2800_MOD_30V_10A, 0 } },
358 { 1, 2, 1, { PM2800_MOD_60V_5A, PM2800_MOD_60V_5A, 0 } },
359 { 1, 2, 2, { PM2800_MOD_30V_10A, PM2800_MOD_60V_5A, 0 } },
360 { 1, 2, 3, { PM2800_MOD_30V_10A, PM2800_MOD_60V_10A, 0 } },
361 { 1, 2, 4, { PM2800_MOD_60V_5A, PM2800_MOD_60V_10A, 0 } },
362 { 1, 3, 0, { PM2800_MOD_30V_10A, PM2800_MOD_30V_10A, PM2800_MOD_30V_10A } },
363 { 1, 3, 1, { PM2800_MOD_60V_5A, PM2800_MOD_60V_5A, PM2800_MOD_60V_5A } },
364 { 1, 3, 2, { PM2800_MOD_30V_10A, PM2800_MOD_30V_10A, PM2800_MOD_60V_5A } },
365 { 1, 3, 3, { PM2800_MOD_30V_10A, PM2800_MOD_60V_5A, PM2800_MOD_60V_5A } },
366 /* Linear chassis. */
367 { 3, 1, 0, { PM2800_MOD_60V_2A, 0, 0 } },
368 { 3, 1, 1, { PM2800_MOD_120V_1A, 0, 0 } },
369 { 3, 1, 2, { PM2800_MOD_8V_15A, 0, 0 } },
370 { 3, 2, 0, { PM2800_MOD_60V_2A, 0, 0 } },
371 { 3, 2, 1, { PM2800_MOD_120V_1A, 0, 0 } },
372 { 3, 2, 2, { PM2800_MOD_60V_2A, PM2800_MOD_120V_1A, 0 } },
373 { 3, 2, 3, { PM2800_MOD_8V_15A, PM2800_MOD_8V_15A, 0 } },
374};
375
329733d9 376static const char *philips_pm2800_names[] = { "1", "2", "3" };
c3eadb07
BV
377
378static int philips_pm2800_probe_channels(struct sr_dev_inst *sdi,
379 struct sr_scpi_hw_info *hw_info,
380 struct channel_spec **channels, unsigned int *num_channels,
381 struct channel_group_spec **channel_groups, unsigned int *num_channel_groups)
382{
329733d9
UH
383 const struct philips_pm2800_model *model;
384 const struct philips_pm2800_module_spec *spec;
c3eadb07
BV
385 unsigned int chassis, num_modules, set, module, m, i;
386
387 (void)sdi;
388
389 /*
390 * The model number as reported by *IDN? looks like e.g. PM2813/11,
391 * Where "PM28" is fixed, followed by the chassis code (1 = autoranging,
392 * 3 = linear series) and the number of modules: 1-3 for autoranging,
393 * 1-2 for linear.
394 * After the slash, the first digit denotes the module set. The
395 * digit after that denotes front (5) or rear (1) binding posts.
396 */
397 chassis = hw_info->model[4] - 0x30;
398 num_modules = hw_info->model[5] - 0x30;
399 set = hw_info->model[7] - 0x30;
400 for (m = 0; m < ARRAY_SIZE(philips_pm2800_matrix); m++) {
401 model = &philips_pm2800_matrix[m];
402 if (model->chassis == chassis && model->num_modules == num_modules
403 && model->set == set)
404 break;
405 }
406 if (m == ARRAY_SIZE(philips_pm2800_matrix)) {
407 sr_dbg("Model %s not found in matrix.", hw_info->model);
408 return SR_ERR;
409 }
410
411 sr_dbg("Found %d output channel%s:", num_modules, num_modules > 1 ? "s" : "");
412 *channels = g_malloc0(sizeof(struct channel_spec) * num_modules);
413 *channel_groups = g_malloc0(sizeof(struct channel_group_spec) * num_modules);
414 for (i = 0; i < num_modules; i++) {
415 module = model->modules[i];
416 spec = &philips_pm2800_module_specs[module];
417 sr_dbg("output %d: %.0f - %.0fV, %.0f - %.0fA", i + 1,
418 spec->voltage[0], spec->voltage[1],
419 spec->current[0], spec->current[1]);
329733d9 420 (*channels)[i].name = (char *)philips_pm2800_names[i];
c3eadb07 421 memcpy(&((*channels)[i].voltage), spec, sizeof(float) * 6);
329733d9 422 (*channel_groups)[i].name = (char *)philips_pm2800_names[i];
c3eadb07
BV
423 (*channel_groups)[i].channel_index_mask = 1 << i;
424 (*channel_groups)[i].features = PPS_OTP | PPS_OVP | PPS_OCP;
425 }
426 *num_channels = *num_channel_groups = num_modules;
427
428 return SR_OK;
429}
430
8cb5affe 431static const struct scpi_command philips_pm2800_cmd[] = {
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BV
432 { SCPI_CMD_SELECT_CHANNEL, ":INST:NSEL %s" },
433 { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
434 { SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" },
435 { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
436 { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" },
437 { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
438 { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
439 { SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP?" },
440 { SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" },
441 { SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" },
442 { SCPI_CMD_GET_OUTPUT_REGULATION, ":SOUR:FUNC:MODE?" },
443 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ACTIVE, ":SOUR:VOLT:PROT:TRIP?" },
444 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:PROT:LEV?" },
445 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:PROT:LEV %.6f" },
446 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ENABLED, ":SOUR:CURR:PROT:STAT?" },
447 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, ":SOUR:CURR:PROT:STAT ON" },
448 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, ":SOUR:CURR:PROT:STAT OFF" },
449 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ACTIVE, ":SOUR:CURR:PROT:TRIP?" },
450};
451
d4eabea8 452SR_PRIV const struct scpi_pps pps_profiles[] = {
5c9e56c9
AG
453 /* Agilent N5767A */
454 { "Agilent", "N5767A", 0,
455 ARRAY_AND_SIZE(agilent_n5700a_devopts),
456 ARRAY_AND_SIZE(agilent_n5700a_devopts_cg),
457 ARRAY_AND_SIZE(agilent_n5767a_ch),
458 ARRAY_AND_SIZE(agilent_n5767a_cg),
459 ARRAY_AND_SIZE(agilent_n5700a_cmd),
460 .probe_channels = NULL,
461 },
4ee1e2f3
AG
462 /* Chroma 61604 */
463 { "Chroma", "61604", 0,
464 ARRAY_AND_SIZE(chroma_61604_devopts),
465 ARRAY_AND_SIZE(chroma_61604_devopts_cg),
466 ARRAY_AND_SIZE(chroma_61604_ch),
467 ARRAY_AND_SIZE(chroma_61604_cg),
468 ARRAY_AND_SIZE(chroma_61604_cmd),
469 .probe_channels = NULL,
470 },
5281993e
AG
471 /* Chroma 62000 series */
472 { "Chroma", "62024P-80-60", 0,
473 ARRAY_AND_SIZE(chroma_62000_devopts),
474 ARRAY_AND_SIZE(chroma_62000_devopts_cg),
475 ARRAY_AND_SIZE(chroma_62024p_80_60_ch),
476 ARRAY_AND_SIZE(chroma_62000_cg),
477 ARRAY_AND_SIZE(chroma_62000_cmd),
478 .probe_channels = NULL,
479 },
bc4a2a46
BV
480 /* HP 6632B */
481 { "HP", "6632B", 0,
482 ARRAY_AND_SIZE(hp_6632b_devopts),
bfc86799 483 ARRAY_AND_SIZE(devopts_none),
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BV
484 ARRAY_AND_SIZE(hp_6632b_ch),
485 ARRAY_AND_SIZE(hp_6632b_cg),
486 ARRAY_AND_SIZE(hp_6632b_cmd),
c3eadb07 487 .probe_channels = NULL,
bc4a2a46
BV
488 },
489
d4eabea8 490 /* Rigol DP800 series */
cfcdf576
ML
491 { "Rigol", "^DP821A$", PPS_OTP,
492 ARRAY_AND_SIZE(rigol_dp800_devopts),
493 ARRAY_AND_SIZE(rigol_dp800_devopts_cg),
494 ARRAY_AND_SIZE(rigol_dp821a_ch),
495 ARRAY_AND_SIZE(rigol_dp820_cg),
496 ARRAY_AND_SIZE(rigol_dp800_cmd),
497 .probe_channels = NULL,
498 },
3222ee10
BV
499 { "Rigol", "^DP831A$", PPS_OTP,
500 ARRAY_AND_SIZE(rigol_dp800_devopts),
501 ARRAY_AND_SIZE(rigol_dp800_devopts_cg),
502 ARRAY_AND_SIZE(rigol_dp831_ch),
cfcdf576 503 ARRAY_AND_SIZE(rigol_dp830_cg),
3222ee10 504 ARRAY_AND_SIZE(rigol_dp800_cmd),
c3eadb07 505 .probe_channels = NULL,
3222ee10
BV
506 },
507 { "Rigol", "^(DP832|DP832A)$", PPS_OTP,
508 ARRAY_AND_SIZE(rigol_dp800_devopts),
509 ARRAY_AND_SIZE(rigol_dp800_devopts_cg),
510 ARRAY_AND_SIZE(rigol_dp832_ch),
cfcdf576 511 ARRAY_AND_SIZE(rigol_dp830_cg),
3222ee10 512 ARRAY_AND_SIZE(rigol_dp800_cmd),
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BV
513 .probe_channels = NULL,
514 },
515
516 /* Philips/Fluke PM2800 series */
517 { "Philips", "^PM28[13][123]/[01234]{1,2}$", 0,
9d9cf1c4 518 ARRAY_AND_SIZE(philips_pm2800_devopts),
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BV
519 ARRAY_AND_SIZE(philips_pm2800_devopts_cg),
520 NULL, 0,
521 NULL, 0,
522 ARRAY_AND_SIZE(philips_pm2800_cmd),
523 philips_pm2800_probe_channels,
d4eabea8
BV
524 },
525};
d4eabea8 526
1beccaed 527SR_PRIV unsigned int num_pps_profiles = ARRAY_SIZE(pps_profiles);