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1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
5 * Copyright (C) 2012 Joel Holdsworth <joel@airwebreathe.org.uk>
6 *
7 * This program is free software: you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation, either version 3 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program. If not, see <http://www.gnu.org/licenses/>.
19 */
20
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21#ifndef LIBSIGROK_HARDWARE_DREAMSOURCELAB_DSLOGIC_PROTOCOL_H
22#define LIBSIGROK_HARDWARE_DREAMSOURCELAB_DSLOGIC_PROTOCOL_H
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23
24#include <glib.h>
25#include <stdint.h>
26#include <stdlib.h>
27#include <string.h>
28#include <libusb.h>
29#include <libsigrok/libsigrok.h>
30#include "libsigrok-internal.h"
31
8dacbcf6 32#define LOG_PREFIX "dreamsourcelab-dslogic"
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33
34#define USB_INTERFACE 0
35#define USB_CONFIGURATION 1
36
37#define MAX_RENUM_DELAY_MS 3000
38#define NUM_SIMUL_TRANSFERS 32
39#define MAX_EMPTY_TRANSFERS (NUM_SIMUL_TRANSFERS * 2)
40
41#define NUM_CHANNELS 16
42#define NUM_TRIGGER_STAGES 16
43
44#define DSLOGIC_REQUIRED_VERSION_MAJOR 1
45
46/* 6 delay states of up to 256 clock ticks */
47#define MAX_SAMPLE_DELAY (6 * 256)
48
49#define DSLOGIC_FPGA_FIRMWARE_5V "dreamsourcelab-dslogic-fpga-5v.fw"
50#define DSLOGIC_FPGA_FIRMWARE_3V3 "dreamsourcelab-dslogic-fpga-3v3.fw"
51#define DSCOPE_FPGA_FIRMWARE "dreamsourcelab-dscope-fpga.fw"
52#define DSLOGIC_PRO_FPGA_FIRMWARE "dreamsourcelab-dslogic-pro-fpga.fw"
53#define DSLOGIC_PLUS_FPGA_FIRMWARE "dreamsourcelab-dslogic-plus-fpga.fw"
54#define DSLOGIC_BASIC_FPGA_FIRMWARE "dreamsourcelab-dslogic-basic-fpga.fw"
55
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56enum dslogic_operation_modes {
57 DS_OP_NORMAL,
58 DS_OP_INTERNAL_TEST,
59 DS_OP_EXTERNAL_TEST,
60 DS_OP_LOOPBACK_TEST,
61};
62
63enum dslogic_edge_modes {
64 DS_EDGE_RISING,
65 DS_EDGE_FALLING,
66};
67
68struct dslogic_version {
69 uint8_t major;
70 uint8_t minor;
71};
72
73struct dslogic_mode {
74 uint8_t flags;
75 uint8_t sample_delay_h;
76 uint8_t sample_delay_l;
77};
78
79struct dslogic_trigger_pos {
10481ef0 80 uint32_t check_id;
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81 uint32_t real_pos;
82 uint32_t ram_saddr;
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83 uint32_t remain_cnt_l;
84 uint32_t remain_cnt_h;
85 uint32_t status;
86 uint8_t first_block[488];
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87};
88
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89struct dslogic_profile {
90 uint16_t vid;
91 uint16_t pid;
92
93 const char *vendor;
94 const char *model;
95 const char *model_version;
96
97 const char *firmware;
98
99 uint32_t dev_caps;
100
101 const char *usb_manufacturer;
102 const char *usb_product;
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103
104 /* Memory depth in bits. */
105 uint64_t mem_depth;
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106};
107
108struct dev_context {
109 const struct dslogic_profile *profile;
110 /*
44b46d70 111 * Since we can't keep track of a DSLogic device after upgrading
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112 * the firmware (it renumerates into a different device address
113 * after the upgrade) this is like a global lock. No device will open
114 * until a proper delay after the last device was upgraded.
115 */
116 int64_t fw_updated;
117
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118 const uint64_t *samplerates;
119 int num_samplerates;
120
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121 uint64_t cur_samplerate;
122 uint64_t limit_samples;
123 uint64_t capture_ratio;
124
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125 gboolean acq_aborted;
126
127 unsigned int sent_samples;
128 int submitted_transfers;
129 int empty_transfer_count;
130
131 unsigned int num_transfers;
132 struct libusb_transfer **transfers;
133 struct sr_context *ctx;
134
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135 uint16_t *deinterleave_buffer;
136
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137 uint16_t mode;
138 uint32_t trigger_pos;
139 gboolean external_clock;
140 gboolean continuous_mode;
141 int clock_edge;
1ee70746 142 double cur_threshold;
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143};
144
4bd770f5 145SR_PRIV int dslogic_fpga_firmware_upload(const struct sr_dev_inst *sdi);
1ee70746 146SR_PRIV int dslogic_set_voltage_threshold(const struct sr_dev_inst *sdi, double threshold);
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147SR_PRIV int dslogic_dev_open(struct sr_dev_inst *sdi, struct sr_dev_driver *di);
148SR_PRIV struct dev_context *dslogic_dev_new(void);
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149SR_PRIV int dslogic_acquisition_start(const struct sr_dev_inst *sdi);
150SR_PRIV int dslogic_acquisition_stop(struct sr_dev_inst *sdi);
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151
152#endif