]> sigrok.org Git - libsigrok.git/blame - src/hardware/dslogic/protocol.h
fx2lafw: Moved all protocol handling to protocol.c
[libsigrok.git] / src / hardware / dslogic / protocol.h
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1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
5 * Copyright (C) 2012 Joel Holdsworth <joel@airwebreathe.org.uk>
6 *
7 * This program is free software: you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation, either version 3 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program. If not, see <http://www.gnu.org/licenses/>.
19 */
20
21#ifndef LIBSIGROK_HARDWARE_DSLOGIC_PROTOCOL_H
22#define LIBSIGROK_HARDWARE_DSLOGIC_PROTOCOL_H
23
24#include <glib.h>
25#include <stdint.h>
26#include <stdlib.h>
27#include <string.h>
28#include <libusb.h>
29#include <libsigrok/libsigrok.h>
30#include "libsigrok-internal.h"
31
32#define LOG_PREFIX "dslogic"
33
34#define USB_INTERFACE 0
35#define USB_CONFIGURATION 1
36
37#define MAX_RENUM_DELAY_MS 3000
38#define NUM_SIMUL_TRANSFERS 32
39#define MAX_EMPTY_TRANSFERS (NUM_SIMUL_TRANSFERS * 2)
40
41#define NUM_CHANNELS 16
42#define NUM_TRIGGER_STAGES 16
43
44#define DSLOGIC_REQUIRED_VERSION_MAJOR 1
45
46/* 6 delay states of up to 256 clock ticks */
47#define MAX_SAMPLE_DELAY (6 * 256)
48
49#define DSLOGIC_FPGA_FIRMWARE_5V "dreamsourcelab-dslogic-fpga-5v.fw"
50#define DSLOGIC_FPGA_FIRMWARE_3V3 "dreamsourcelab-dslogic-fpga-3v3.fw"
51#define DSCOPE_FPGA_FIRMWARE "dreamsourcelab-dscope-fpga.fw"
52#define DSLOGIC_PRO_FPGA_FIRMWARE "dreamsourcelab-dslogic-pro-fpga.fw"
53#define DSLOGIC_PLUS_FPGA_FIRMWARE "dreamsourcelab-dslogic-plus-fpga.fw"
54#define DSLOGIC_BASIC_FPGA_FIRMWARE "dreamsourcelab-dslogic-basic-fpga.fw"
55
56struct dslogic_profile {
57 uint16_t vid;
58 uint16_t pid;
59
60 const char *vendor;
61 const char *model;
62 const char *model_version;
63
64 const char *firmware;
65
66 uint32_t dev_caps;
67
68 const char *usb_manufacturer;
69 const char *usb_product;
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70
71 /* Memory depth in bits. */
72 uint64_t mem_depth;
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73};
74
75struct dev_context {
76 const struct dslogic_profile *profile;
77 /*
78 * Since we can't keep track of an dslogic device after upgrading
79 * the firmware (it renumerates into a different device address
80 * after the upgrade) this is like a global lock. No device will open
81 * until a proper delay after the last device was upgraded.
82 */
83 int64_t fw_updated;
84
85 /* Supported samplerates */
86 const uint64_t *samplerates;
87 int num_samplerates;
88
89 /* Device/capture settings */
90 uint64_t cur_samplerate;
91 uint64_t limit_samples;
92 uint64_t capture_ratio;
93
94 /* Operational settings */
95 gboolean trigger_fired;
96 gboolean acq_aborted;
97
98 unsigned int sent_samples;
99 int submitted_transfers;
100 int empty_transfer_count;
101
102 unsigned int num_transfers;
103 struct libusb_transfer **transfers;
104 struct sr_context *ctx;
105
106 uint16_t mode;
107 uint32_t trigger_pos;
108 gboolean external_clock;
109 gboolean continuous_mode;
110 int clock_edge;
1ee70746 111 double cur_threshold;
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112};
113
1ee70746 114SR_PRIV int dslogic_set_voltage_threshold(const struct sr_dev_inst *sdi, double threshold);
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115SR_PRIV int dslogic_command_start_acquisition(const struct sr_dev_inst *sdi);
116SR_PRIV int dslogic_dev_open(struct sr_dev_inst *sdi, struct sr_dev_driver *di);
117SR_PRIV struct dev_context *dslogic_dev_new(void);
118SR_PRIV void dslogic_abort_acquisition(struct dev_context *devc);
119SR_PRIV void LIBUSB_CALL dslogic_receive_transfer(struct libusb_transfer *transfer);
120SR_PRIV size_t dslogic_get_buffer_size(struct dev_context *devc);
121SR_PRIV unsigned int dslogic_get_timeout(struct dev_context *devc);
122SR_PRIV void dslogic_send_data(struct sr_dev_inst *sdi, uint8_t *data,
123 size_t length, size_t sample_width);
124
125#endif