[libsigrok.git] / hardware / rigol-ds1xx2 / api.c

/*
 * This file is part of the libsigrok project.
 *
 * Copyright (C) 2012 Martin Ling <martin-git@earth.li>
 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
 *
 * This program is free software: you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation, either version 3 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */

#include <fcntl.h>
#include <unistd.h>
#include <stdlib.h>
#include <string.h>
#include <glib.h>
#include "libsigrok.h"
#include "libsigrok-internal.h"
#include "protocol.h"

#define NUM_TIMEBASE  12
#define NUM_VDIV      8

static const int32_t hwcaps[] = {
	SR_CONF_OSCILLOSCOPE,
	SR_CONF_TIMEBASE,
	SR_CONF_TRIGGER_SOURCE,
	SR_CONF_TRIGGER_SLOPE,
	SR_CONF_HORIZ_TRIGGERPOS,
	SR_CONF_VDIV,
	SR_CONF_COUPLING,
	SR_CONF_NUM_TIMEBASE,
	SR_CONF_NUM_VDIV,
};

static const uint64_t timebases[][2] = {
	/* nanoseconds */
	{ 2, 1000000000 },
	{ 5, 1000000000 },
	{ 10, 1000000000 },
	{ 20, 1000000000 },
	{ 50, 1000000000 },
	{ 100, 1000000000 },
	{ 500, 1000000000 },
	/* microseconds */
	{ 1, 1000000 },
	{ 2, 1000000 },
	{ 5, 1000000 },
	{ 10, 1000000 },
	{ 20, 1000000 },
	{ 50, 1000000 },
	{ 100, 1000000 },
	{ 200, 1000000 },
	{ 500, 1000000 },
	/* milliseconds */
	{ 1, 1000 },
	{ 2, 1000 },
	{ 5, 1000 },
	{ 10, 1000 },
	{ 20, 1000 },
	{ 50, 1000 },
	{ 100, 1000 },
	{ 200, 1000 },
	{ 500, 1000 },
	/* seconds */
	{ 1, 1 },
	{ 2, 1 },
	{ 5, 1 },
	{ 10, 1 },
	{ 20, 1 },
	{ 50, 1 },
};

static const uint64_t vdivs[][2] = {
	/* millivolts */
	{ 2, 1000 },
	{ 5, 1000 },
	{ 10, 1000 },
	{ 20, 1000 },
	{ 50, 1000 },
	{ 100, 1000 },
	{ 200, 1000 },
	{ 500, 1000 },
	/* volts */
	{ 1, 1 },
	{ 2, 1 },
	{ 5, 1 },
	{ 10, 1 },
};

static const char *trigger_sources[] = {
	"CH1",
	"CH2",
	"EXT",
	"AC Line",
};

static const char *coupling[] = {
	"AC",
	"DC",
	"GND",
};

static const char *supported_models[] = {
	"DS1052E",
	"DS1102E",
	"DS1052D",
	"DS1102D",
};

SR_PRIV struct sr_dev_driver rigol_ds1xx2_driver_info;
static struct sr_dev_driver *di = &rigol_ds1xx2_driver_info;

/* Properly close and free all devices. */
static int clear_instances(void)
{
	struct sr_dev_inst *sdi;
	struct drv_context *drvc;
	struct dev_context *devc;
	GSList *l;

	if (!(drvc = di->priv))
		return SR_OK;

	for (l = drvc->instances; l; l = l->next) {
		if (!(sdi = l->data))
			continue;
		if (!(devc = sdi->priv))
			continue;

		g_free(devc->device);
		g_free(devc->coupling[0]);
		g_free(devc->coupling[1]);
		g_free(devc->trigger_source);
		g_free(devc->trigger_slope);
		close(devc->fd);

		sr_dev_inst_free(sdi);
	}

	g_slist_free(drvc->instances);
	drvc->instances = NULL;

	return SR_OK;
}

static int set_cfg(const struct sr_dev_inst *sdi, const char *format, ...)
{
	struct dev_context *devc;
	va_list args;
	char buf[256];

	devc = sdi->priv;

	va_start(args, format);
	vsnprintf(buf, 255, format, args);
	va_end(args);
	if (rigol_ds1xx2_send(devc, buf) != SR_OK)
		return SR_ERR;

	/* When setting a bunch of parameters in a row, the DS1052E scrambles
	 * some of them unless there is at least 100ms delay in between. */
	sr_spew("delay %dms", 100);
	g_usleep(100);

	return SR_OK;
}

static int hw_init(struct sr_context *sr_ctx)
{
	return std_hw_init(sr_ctx, di, DRIVER_LOG_DOMAIN);
}

static GSList *hw_scan(GSList *options)
{
	struct drv_context *drvc;
	struct sr_dev_inst *sdi;
	struct dev_context *devc;
	struct sr_probe *probe;
	GSList *devices;
	GDir *dir;
	const gchar *dev_name;
	const gchar *dev_dir = "/dev/";
	const gchar *prefix = "usbtmc";
	gchar *device;
	const gchar *idn_query = "*IDN?";
	unsigned int i;
	int len, num_tokens, fd;
	const gchar *delimiter = ",";
	gchar **tokens;
	const char *manufacturer, *model, *version;
	gboolean matched = FALSE;
	char buf[256];

	(void)options;

	drvc = di->priv;
	drvc->instances = NULL;

	devices = NULL;

	dir = g_dir_open("/sys/class/usb/", 0, NULL);

	if (dir == NULL)
		return NULL;

	while ((dev_name = g_dir_read_name(dir)) != NULL) {
		if (strncmp(dev_name, prefix, strlen(prefix))) 
			continue;

		device = g_strconcat(dev_dir, dev_name, NULL);

		fd = open(device, O_RDWR);
		len = write(fd, idn_query, strlen(idn_query));
		len = read(fd, buf, sizeof(buf));
		close(fd);
		if (len == 0) {
			g_free(device);
			return NULL;
		}

		buf[len] = 0;
		tokens = g_strsplit(buf, delimiter, 0);
		close(fd);
		sr_dbg("response: %s %d [%s]", device, len, buf);

		for (num_tokens = 0; tokens[num_tokens] != NULL; num_tokens++);

		if (num_tokens < 4) {
			g_strfreev(tokens);
			g_free(device);
			return NULL;
		}

		manufacturer = tokens[0];
		model = tokens[1];
		version = tokens[3];

		if (strcmp(manufacturer, "Rigol Technologies")) {
			g_strfreev(tokens);
			g_free(device);
			return NULL;
		}

		for (i = 0; i < ARRAY_SIZE(supported_models); i++) {
			if (!strcmp(model, supported_models[i])) {
				matched = 1;
				break;
			}
		}

		if (!matched || !(sdi = sr_dev_inst_new(0, SR_ST_ACTIVE,
			manufacturer, model, version))) {
			g_strfreev(tokens);
			g_free(device);
			return NULL;
		}

		g_strfreev(tokens);

		if (!(devc = g_try_malloc0(sizeof(struct dev_context)))) {
			sr_err("Device context malloc failed.");
			g_free(device);
			return NULL;
		}
		devc->limit_frames = 0;
		devc->device = device;
		sdi->priv = devc;
		sdi->driver = di;

		for (i = 0; i < 2; i++) {
			if (!(probe = sr_probe_new(0, SR_PROBE_ANALOG, TRUE,
			    i == 0 ? "CH1" : "CH2")))
				return NULL;
			sdi->probes = g_slist_append(sdi->probes, probe);
		}

		drvc->instances = g_slist_append(drvc->instances, sdi);
		devices = g_slist_append(devices, sdi);
	}

	g_dir_close(dir);

	return devices;
}

static GSList *hw_dev_list(void)
{
	return ((struct drv_context *)(di->priv))->instances;
}

static int hw_dev_open(struct sr_dev_inst *sdi)
{
	struct dev_context *devc;
	int fd;

	devc = sdi->priv;

	if ((fd = open(devc->device, O_RDWR)) == -1)
		return SR_ERR;
	devc->fd = fd;

	if (rigol_ds1xx2_get_dev_cfg(sdi) != SR_OK)
		/* TODO: force configuration? */
		return SR_ERR;

	return SR_OK;
}

static int hw_dev_close(struct sr_dev_inst *sdi)
{
	struct dev_context *devc;

	devc = sdi->priv;

	close(devc->fd);

	return SR_OK;
}

static int hw_cleanup(void)
{
	clear_instances();

	return SR_OK;
}

static int config_get(int id, GVariant **data, const struct sr_dev_inst *sdi)
{

	(void)sdi;

	switch (id) {
	case SR_CONF_NUM_TIMEBASE:
		*data = g_variant_new_int32(NUM_TIMEBASE);
		break;
	case SR_CONF_NUM_VDIV:
		*data = g_variant_new_int32(NUM_VDIV);
		break;
	default:
		return SR_ERR_ARG;
	}

	return SR_OK;
}

static int config_set(int id, GVariant *data, const struct sr_dev_inst *sdi)
{
	struct dev_context *devc;
	uint64_t tmp_u64, p, q;
	double t_dbl;
	unsigned int i;
	int ret;
	const char *tmp_str;

	devc = sdi->priv;

	if (sdi->status != SR_ST_ACTIVE) {
		sr_err("Device inactive, can't set config options.");
		return SR_ERR;
	}

	ret = SR_OK;
	switch (id) {
	case SR_CONF_LIMIT_FRAMES:
		devc->limit_frames = g_variant_get_uint64(data);
		break;
	case SR_CONF_TRIGGER_SLOPE:
		tmp_u64 = g_variant_get_uint64(data);
		if (tmp_u64 != 0 && tmp_u64 != 1)
			return SR_ERR;
		g_free(devc->trigger_slope);
		devc->trigger_slope = g_strdup(tmp_u64 ? "POS" : "NEG");
		ret = set_cfg(sdi, ":TRIG:EDGE:SLOP %s", devc->trigger_slope);
		break;
	case SR_CONF_HORIZ_TRIGGERPOS:
		t_dbl = g_variant_get_double(data);
		if (t_dbl < 0.0 || t_dbl > 1.0)
			return SR_ERR;
		devc->horiz_triggerpos = t_dbl;
		/* We have the trigger offset as a percentage of the frame, but
		 * need to express this in seconds. */
		t_dbl = -(devc->horiz_triggerpos - 0.5) * devc->timebase * NUM_TIMEBASE;
		ret = set_cfg(sdi, ":TIM:OFFS %.6f", t_dbl);
		break;
	case SR_CONF_TIMEBASE:
		g_variant_get(data, "(tt)", &p, &q);
		for (i = 0; i < ARRAY_SIZE(timebases); i++) {
			if (timebases[i][0] == p && timebases[i][1] == q) {
				devc->timebase = (float)p / q;
				ret = set_cfg(sdi, ":TIM:SCAL %.9f", devc->timebase);
				break;
			}
		}
		if (i == ARRAY_SIZE(timebases))
			ret = SR_ERR_ARG;
		break;
	case SR_CONF_TRIGGER_SOURCE:
		tmp_str = g_variant_get_string(data, NULL);
		for (i = 0; i < ARRAY_SIZE(trigger_sources); i++) {
			if (!strcmp(trigger_sources[i], tmp_str)) {
				g_free(devc->trigger_source);
				devc->trigger_source = g_strdup(trigger_sources[i]);
				if (!strcmp(devc->trigger_source, "AC Line"))
					tmp_str = "ACL";
				else if (!strcmp(devc->trigger_source, "CH1"))
					tmp_str = "CHAN1";
				else if (!strcmp(devc->trigger_source, "CH2"))
					tmp_str = "CHAN2";
				else
					tmp_str = (char *)devc->trigger_source;
				ret = set_cfg(sdi, ":TRIG:EDGE:SOUR %s", tmp_str);
				break;
			}
		}
		if (i == ARRAY_SIZE(trigger_sources))
			ret = SR_ERR_ARG;
		break;
	case SR_CONF_VDIV:
		g_variant_get(data, "(tt)", &p, &q);
		for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
			if (vdivs[i][0] != p || vdivs[i][1] != q)
				continue;
			devc->vdiv[0] = devc->vdiv[1] = (float)p / q;
			set_cfg(sdi, ":CHAN1:SCAL %.3f", devc->vdiv[0]);
			ret = set_cfg(sdi, ":CHAN2:SCAL %.3f", devc->vdiv[1]);
			break;
		}
		if (i == ARRAY_SIZE(vdivs))
			ret = SR_ERR_ARG;
		break;
	case SR_CONF_COUPLING:
		/* TODO: Not supporting coupling per channel yet. */
		tmp_str = g_variant_get_string(data, NULL);
		for (i = 0; i < ARRAY_SIZE(coupling); i++) {
			if (!strcmp(tmp_str, coupling[i])) {
				g_free(devc->coupling[0]);
				g_free(devc->coupling[1]);
				devc->coupling[0] = g_strdup(coupling[i]);
				devc->coupling[1] = g_strdup(coupling[i]);
				set_cfg(sdi, ":CHAN1:COUP %s", devc->coupling[0]);
				ret = set_cfg(sdi, ":CHAN2:COUP %s", devc->coupling[1]);
				break;
			}
		}
		if (i == ARRAY_SIZE(coupling))
			ret = SR_ERR_ARG;
		break;
	default:
		sr_err("Unknown hardware capability: %d.", id);
		ret = SR_ERR_ARG;
		break;
	}

	return ret;
}

static int config_list(int key, GVariant **data, const struct sr_dev_inst *sdi)
{
	GVariant *tuple, *rational[2];
	GVariantBuilder gvb;
	unsigned int i;

	(void)sdi;

	switch (key) {
	case SR_CONF_DEVICE_OPTIONS:
		*data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
				hwcaps, ARRAY_SIZE(hwcaps), sizeof(int32_t));
		break;
	case SR_CONF_COUPLING:
		*data = g_variant_new_strv(coupling, ARRAY_SIZE(coupling));
		break;
	case SR_CONF_VDIV:
		g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
		for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
			rational[0] = g_variant_new_uint64(vdivs[i][0]);
			rational[1] = g_variant_new_uint64(vdivs[i][1]);
			tuple = g_variant_new_tuple(rational, 2);
			g_variant_builder_add_value(&gvb, tuple);
		}
		*data = g_variant_builder_end(&gvb);
		break;
	case SR_CONF_TIMEBASE:
		g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
		for (i = 0; i < ARRAY_SIZE(timebases); i++) {
			rational[0] = g_variant_new_uint64(timebases[i][0]);
			rational[1] = g_variant_new_uint64(timebases[i][1]);
			tuple = g_variant_new_tuple(rational, 2);
			g_variant_builder_add_value(&gvb, tuple);
		}
		*data = g_variant_builder_end(&gvb);
		break;
	case SR_CONF_TRIGGER_SOURCE:
		*data = g_variant_new_strv(trigger_sources,
				ARRAY_SIZE(trigger_sources));
		break;
	default:
		return SR_ERR_ARG;
	}

	return SR_OK;
}

static int dev_acquisition_start(const struct sr_dev_inst *sdi, void *cb_data)
{
	struct dev_context *devc;
	struct sr_probe *probe;
	GSList *l;
	int probenum;
	char cmd[256];

	(void)cb_data;

	devc = sdi->priv;

	for (l = sdi->probes; l; l = l->next) {
		probe = l->data;
		probenum = probe->name[2] == '1' ? 0 : 1;
		if (probe->enabled)
			devc->enabled_probes = g_slist_append(devc->enabled_probes, probe);

		if (probe->enabled != devc->channels[probenum]) {
			/* Enabled channel is currently disabled, or vice versa. */
			sprintf(cmd, ":CHAN%d:DISP %s", probenum + 1,
					probe->enabled ? "ON" : "OFF");
			if (rigol_ds1xx2_send(devc, cmd) != SR_OK)
				return SR_ERR;
		}
	}
	if (!devc->enabled_probes)
		return SR_ERR;

	sr_source_add(devc->fd, G_IO_IN, 50, rigol_ds1xx2_receive, (void *)sdi);

	/* Send header packet to the session bus. */
	std_session_send_df_header(cb_data, DRIVER_LOG_DOMAIN);

	/* Fetch the first frame. */
	devc->channel_frame = devc->enabled_probes->data;
	if (rigol_ds1xx2_send(devc, ":WAV:DATA? CHAN%c",
			devc->channel_frame->name[2]) != SR_OK)
		return SR_ERR;

	devc->num_frame_bytes = 0;

	return SR_OK;
}

static int dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data)
{
	struct dev_context *devc;

	(void)cb_data;

	devc = sdi->priv;

	if (sdi->status != SR_ST_ACTIVE) {
		sr_err("Device inactive, can't stop acquisition.");
		return SR_ERR;
	}

	g_slist_free(devc->enabled_probes);
	devc->enabled_probes = NULL;
	sr_source_remove(devc->fd);

	return SR_OK;
}

SR_PRIV struct sr_dev_driver rigol_ds1xx2_driver_info = {
	.name = "rigol-ds1xx2",
	.longname = "Rigol DS1xx2",
	.api_version = 1,
	.init = hw_init,
	.cleanup = hw_cleanup,
	.scan = hw_scan,
	.dev_list = hw_dev_list,
	.dev_clear = clear_instances,
	.config_get = config_get,
	.config_set = config_set,
	.config_list = config_list,
	.dev_open = hw_dev_open,
	.dev_close = hw_dev_close,
	.dev_acquisition_start = dev_acquisition_start,
	.dev_acquisition_stop = dev_acquisition_stop,
	.priv = NULL,
};
Commit	Line	Data
f4816ac6 ML	1	/*
	2	* This file is part of the libsigrok project.
	3	*
	4	* Copyright (C) 2012 Martin Ling <martin-git@earth.li>
88e429c9	5	* Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
f4816ac6 ML	6	*
	7	* This program is free software: you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License as published by
	9	* the Free Software Foundation, either version 3 of the License, or
	10	* (at your option) any later version.
	11	*
	12	* This program is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	* GNU General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU General Public License
	18	* along with this program. If not, see <http://www.gnu.org/licenses/>.
	19	*/
	20
e0b7d23c ML	21	#include <fcntl.h>
	22	#include <unistd.h>
	23	#include <stdlib.h>
	24	#include <string.h>
f4816ac6 ML	25	#include <glib.h>
	26	#include "libsigrok.h"
	27	#include "libsigrok-internal.h"
	28	#include "protocol.h"
	29
d62d7ad1 BV	30	#define NUM_TIMEBASE 12
	31	#define NUM_VDIV 8
	32
f6a0ac9f	33	static const int32_t hwcaps[] = {
1953564a	34	SR_CONF_OSCILLOSCOPE,
1953564a BV	35	SR_CONF_TIMEBASE,
	36	SR_CONF_TRIGGER_SOURCE,
	37	SR_CONF_TRIGGER_SLOPE,
	38	SR_CONF_HORIZ_TRIGGERPOS,
	39	SR_CONF_VDIV,
	40	SR_CONF_COUPLING,
d62d7ad1 BV	41	SR_CONF_NUM_TIMEBASE,
d62d7ad1 BV	42	SR_CONF_NUM_VDIV,
e0b7d23c ML	43	};
e0b7d23c ML	44
f6a0ac9f	45	static const uint64_t timebases[][2] = {
e0b7d23c ML	46	/* nanoseconds */
	47	{ 2, 1000000000 },
	48	{ 5, 1000000000 },
	49	{ 10, 1000000000 },
	50	{ 20, 1000000000 },
	51	{ 50, 1000000000 },
	52	{ 100, 1000000000 },
	53	{ 500, 1000000000 },
	54	/* microseconds */
	55	{ 1, 1000000 },
	56	{ 2, 1000000 },
	57	{ 5, 1000000 },
	58	{ 10, 1000000 },
	59	{ 20, 1000000 },
	60	{ 50, 1000000 },
	61	{ 100, 1000000 },
	62	{ 200, 1000000 },
	63	{ 500, 1000000 },
	64	/* milliseconds */
	65	{ 1, 1000 },
	66	{ 2, 1000 },
	67	{ 5, 1000 },
	68	{ 10, 1000 },
	69	{ 20, 1000 },
	70	{ 50, 1000 },
	71	{ 100, 1000 },
	72	{ 200, 1000 },
	73	{ 500, 1000 },
	74	/* seconds */
	75	{ 1, 1 },
	76	{ 2, 1 },
	77	{ 5, 1 },
	78	{ 10, 1 },
	79	{ 20, 1 },
	80	{ 50, 1 },
e0b7d23c ML	81	};
e0b7d23c ML	82
f6a0ac9f	83	static const uint64_t vdivs[][2] = {
e0b7d23c ML	84	/* millivolts */
	85	{ 2, 1000 },
	86	{ 5, 1000 },
	87	{ 10, 1000 },
	88	{ 20, 1000 },
	89	{ 50, 1000 },
	90	{ 100, 1000 },
	91	{ 200, 1000 },
	92	{ 500, 1000 },
	93	/* volts */
	94	{ 1, 1 },
	95	{ 2, 1 },
	96	{ 5, 1 },
	97	{ 10, 1 },
e0b7d23c ML	98	};
	99
	100	static const char *trigger_sources[] = {
	101	"CH1",
	102	"CH2",
	103	"EXT",
	104	"AC Line",
e0b7d23c ML	105	};
	106
	107	static const char *coupling[] = {
	108	"AC",
	109	"DC",
	110	"GND",
e0b7d23c ML	111	};
e0b7d23c ML	112
512bb890 BV	113	static const char *supported_models[] = {
	114	"DS1052E",
	115	"DS1102E",
	116	"DS1052D",
333bf022	117	"DS1102D",
512bb890 BV	118	};
512bb890 BV	119
f4816ac6 ML	120	SR_PRIV struct sr_dev_driver rigol_ds1xx2_driver_info;
	121	static struct sr_dev_driver *di = &rigol_ds1xx2_driver_info;
	122
	123	/* Properly close and free all devices. */
	124	static int clear_instances(void)
	125	{
	126	struct sr_dev_inst *sdi;
	127	struct drv_context *drvc;
	128	struct dev_context *devc;
	129	GSList *l;
	130
	131	if (!(drvc = di->priv))
	132	return SR_OK;
	133
	134	for (l = drvc->instances; l; l = l->next) {
	135	if (!(sdi = l->data))
	136	continue;
	137	if (!(devc = sdi->priv))
	138	continue;
	139
fb6e5ba8	140	g_free(devc->device);
254dd102 BV	141	g_free(devc->coupling[0]);
	142	g_free(devc->coupling[1]);
	143	g_free(devc->trigger_source);
	144	g_free(devc->trigger_slope);
e0b7d23c	145	close(devc->fd);
f4816ac6 ML	146
	147	sr_dev_inst_free(sdi);
	148	}
	149
	150	g_slist_free(drvc->instances);
	151	drvc->instances = NULL;
	152
	153	return SR_OK;
	154	}
	155
254dd102 BV	156	static int set_cfg(const struct sr_dev_inst sdi, const char format, ...)
	157	{
	158	struct dev_context *devc;
254dd102 BV	159	va_list args;
	160	char buf[256];
	161
	162	devc = sdi->priv;
	163
	164	va_start(args, format);
	165	vsnprintf(buf, 255, format, args);
	166	va_end(args);
	167	if (rigol_ds1xx2_send(devc, buf) != SR_OK)
	168	return SR_ERR;
	169
	170	/* When setting a bunch of parameters in a row, the DS1052E scrambles
	171	* some of them unless there is at least 100ms delay in between. */
8f35be72 BV	172	sr_spew("delay %dms", 100);
8f35be72 BV	173	g_usleep(100);
254dd102 BV	174
	175	return SR_OK;
	176	}
	177
e0b7d23c	178	static int hw_init(struct sr_context *sr_ctx)
f4816ac6	179	{
063e7aef	180	return std_hw_init(sr_ctx, di, DRIVER_LOG_DOMAIN);
f4816ac6 ML	181	}
	182
	183	static GSList hw_scan(GSList options)
	184	{
	185	struct drv_context *drvc;
e0b7d23c ML	186	struct sr_dev_inst *sdi;
	187	struct dev_context *devc;
	188	struct sr_probe *probe;
f4816ac6	189	GSList *devices;
fb6e5ba8 ML	190	GDir *dir;
	191	const gchar *dev_name;
	192	const gchar *dev_dir = "/dev/";
	193	const gchar *prefix = "usbtmc";
	194	gchar *device;
	195	const gchar idn_query = "IDN?";
f6a0ac9f BV	196	unsigned int i;
f6a0ac9f BV	197	int len, num_tokens, fd;
fb6e5ba8 ML	198	const gchar *delimiter = ",";
fb6e5ba8 ML	199	gchar **tokens;
512bb890	200	const char manufacturer, model, *version;
512bb890	201	gboolean matched = FALSE;
fb6e5ba8 ML	202	char buf[256];
fb6e5ba8 ML	203
f4816ac6 ML	204	(void)options;
f4816ac6 ML	205
f4816ac6 ML	206	drvc = di->priv;
	207	drvc->instances = NULL;
	208
4b97c74e UH	209	devices = NULL;
4b97c74e UH	210
fb6e5ba8	211	dir = g_dir_open("/sys/class/usb/", 0, NULL);
e0b7d23c	212
fb6e5ba8 ML	213	if (dir == NULL)
fb6e5ba8 ML	214	return NULL;
e0b7d23c	215
29d957ce	216	while ((dev_name = g_dir_read_name(dir)) != NULL) {
fb6e5ba8 ML	217	if (strncmp(dev_name, prefix, strlen(prefix)))
	218	continue;
	219
	220	device = g_strconcat(dev_dir, dev_name, NULL);
	221
	222	fd = open(device, O_RDWR);
	223	len = write(fd, idn_query, strlen(idn_query));
	224	len = read(fd, buf, sizeof(buf));
	225	close(fd);
29d957ce	226	if (len == 0) {
fb6e5ba8 ML	227	g_free(device);
	228	return NULL;
	229	}
	230
	231	buf[len] = 0;
	232	tokens = g_strsplit(buf, delimiter, 0);
	233	close(fd);
512bb890	234	sr_dbg("response: %s %d [%s]", device, len, buf);
fb6e5ba8 ML	235
	236	for (num_tokens = 0; tokens[num_tokens] != NULL; num_tokens++);
	237
512bb890	238	if (num_tokens < 4) {
fb6e5ba8 ML	239	g_strfreev(tokens);
fb6e5ba8 ML	240	g_free(device);
e0b7d23c	241	return NULL;
fb6e5ba8	242	}
512bb890 BV	243
	244	manufacturer = tokens[0];
	245	model = tokens[1];
	246	version = tokens[3];
	247
	248	if (strcmp(manufacturer, "Rigol Technologies")) {
	249	g_strfreev(tokens);
	250	g_free(device);
	251	return NULL;
	252	}
	253
333bf022	254	for (i = 0; i < ARRAY_SIZE(supported_models); i++) {
512bb890 BV	255	if (!strcmp(model, supported_models[i])) {
	256	matched = 1;
	257	break;
	258	}
	259	}
	260
	261	if (!matched \|\| !(sdi = sr_dev_inst_new(0, SR_ST_ACTIVE,
	262	manufacturer, model, version))) {
	263	g_strfreev(tokens);
	264	g_free(device);
	265	return NULL;
	266	}
	267
fb6e5ba8 ML	268	g_strfreev(tokens);
fb6e5ba8 ML	269
29d957ce UH	270	if (!(devc = g_try_malloc0(sizeof(struct dev_context)))) {
29d957ce UH	271	sr_err("Device context malloc failed.");
fb6e5ba8 ML	272	g_free(device);
	273	return NULL;
	274	}
254dd102	275	devc->limit_frames = 0;
fb6e5ba8	276	devc->device = device;
fb6e5ba8 ML	277	sdi->priv = devc;
	278	sdi->driver = di;
	279
29d957ce UH	280	for (i = 0; i < 2; i++) {
	281	if (!(probe = sr_probe_new(0, SR_PROBE_ANALOG, TRUE,
	282	i == 0 ? "CH1" : "CH2")))
fb6e5ba8 ML	283	return NULL;
	284	sdi->probes = g_slist_append(sdi->probes, probe);
	285	}
	286
	287	drvc->instances = g_slist_append(drvc->instances, sdi);
	288	devices = g_slist_append(devices, sdi);
e0b7d23c	289	}
fb6e5ba8 ML	290
fb6e5ba8 ML	291	g_dir_close(dir);
f4816ac6 ML	292
	293	return devices;
	294	}
	295
	296	static GSList *hw_dev_list(void)
	297	{
0e94d524	298	return ((struct drv_context *)(di->priv))->instances;
f4816ac6 ML	299	}
	300
	301	static int hw_dev_open(struct sr_dev_inst *sdi)
	302	{
29d957ce UH	303	struct dev_context *devc;
29d957ce UH	304	int fd;
fb6e5ba8	305
29d957ce	306	devc = sdi->priv;
e0b7d23c	307
29d957ce	308	if ((fd = open(devc->device, O_RDWR)) == -1)
e0b7d23c	309	return SR_ERR;
e0b7d23c ML	310	devc->fd = fd;
e0b7d23c ML	311
254dd102 BV	312	if (rigol_ds1xx2_get_dev_cfg(sdi) != SR_OK)
	313	/* TODO: force configuration? */
	314	return SR_ERR;
f4816ac6 ML	315
	316	return SR_OK;
	317	}
	318
	319	static int hw_dev_close(struct sr_dev_inst *sdi)
	320	{
29d957ce UH	321	struct dev_context *devc;
	322
	323	devc = sdi->priv;
e0b7d23c ML	324
e0b7d23c ML	325	close(devc->fd);
f4816ac6 ML	326
	327	return SR_OK;
	328	}
	329
	330	static int hw_cleanup(void)
	331	{
	332	clear_instances();
	333
f4816ac6 ML	334	return SR_OK;
	335	}
	336
d62d7ad1 BV	337	static int config_get(int id, GVariant *data, const struct sr_dev_inst sdi)
	338	{
	339
	340	(void)sdi;
	341
	342	switch (id) {
	343	case SR_CONF_NUM_TIMEBASE:
	344	*data = g_variant_new_int32(NUM_TIMEBASE);
	345	break;
	346	case SR_CONF_NUM_VDIV:
	347	*data = g_variant_new_int32(NUM_VDIV);
	348	break;
	349	default:
	350	return SR_ERR_ARG;
	351	}
	352
	353	return SR_OK;
	354	}
	355
f6a0ac9f	356	static int config_set(int id, GVariant data, const struct sr_dev_inst sdi)
f4816ac6	357	{
29d957ce	358	struct dev_context *devc;
f6a0ac9f	359	uint64_t tmp_u64, p, q;
254dd102	360	double t_dbl;
f6a0ac9f	361	unsigned int i;
254dd102 BV	362	int ret;
254dd102 BV	363	const char *tmp_str;
f4816ac6	364
29d957ce UH	365	devc = sdi->priv;
29d957ce UH	366
f4816ac6 ML	367	if (sdi->status != SR_ST_ACTIVE) {
	368	sr_err("Device inactive, can't set config options.");
	369	return SR_ERR;
	370	}
	371
	372	ret = SR_OK;
035a1078	373	switch (id) {
1953564a	374	case SR_CONF_LIMIT_FRAMES:
f6a0ac9f	375	devc->limit_frames = g_variant_get_uint64(data);
e0b7d23c	376	break;
1953564a	377	case SR_CONF_TRIGGER_SLOPE:
f6a0ac9f	378	tmp_u64 = g_variant_get_uint64(data);
254dd102 BV	379	if (tmp_u64 != 0 && tmp_u64 != 1)
	380	return SR_ERR;
	381	g_free(devc->trigger_slope);
	382	devc->trigger_slope = g_strdup(tmp_u64 ? "POS" : "NEG");
	383	ret = set_cfg(sdi, ":TRIG:EDGE:SLOP %s", devc->trigger_slope);
e0b7d23c	384	break;
1953564a	385	case SR_CONF_HORIZ_TRIGGERPOS:
254dd102 BV	386	t_dbl = g_variant_get_double(data);
	387	if (t_dbl < 0.0 \|\| t_dbl > 1.0)
	388	return SR_ERR;
	389	devc->horiz_triggerpos = t_dbl;
	390	/* We have the trigger offset as a percentage of the frame, but
	391	* need to express this in seconds. */
	392	t_dbl = -(devc->horiz_triggerpos - 0.5) * devc->timebase * NUM_TIMEBASE;
	393	ret = set_cfg(sdi, ":TIM:OFFS %.6f", t_dbl);
e0b7d23c	394	break;
1953564a	395	case SR_CONF_TIMEBASE:
f6a0ac9f	396	g_variant_get(data, "(tt)", &p, &q);
f6a0ac9f BV	397	for (i = 0; i < ARRAY_SIZE(timebases); i++) {
f6a0ac9f BV	398	if (timebases[i][0] == p && timebases[i][1] == q) {
254dd102 BV	399	devc->timebase = (float)p / q;
254dd102 BV	400	ret = set_cfg(sdi, ":TIM:SCAL %.9f", devc->timebase);
f6a0ac9f BV	401	break;
	402	}
	403	}
254dd102 BV	404	if (i == ARRAY_SIZE(timebases))
254dd102 BV	405	ret = SR_ERR_ARG;
e0b7d23c	406	break;
1953564a	407	case SR_CONF_TRIGGER_SOURCE:
f6a0ac9f	408	tmp_str = g_variant_get_string(data, NULL);
254dd102 BV	409	for (i = 0; i < ARRAY_SIZE(trigger_sources); i++) {
	410	if (!strcmp(trigger_sources[i], tmp_str)) {
	411	g_free(devc->trigger_source);
	412	devc->trigger_source = g_strdup(trigger_sources[i]);
	413	if (!strcmp(devc->trigger_source, "AC Line"))
	414	tmp_str = "ACL";
	415	else if (!strcmp(devc->trigger_source, "CH1"))
	416	tmp_str = "CHAN1";
	417	else if (!strcmp(devc->trigger_source, "CH2"))
	418	tmp_str = "CHAN2";
	419	else
	420	tmp_str = (char *)devc->trigger_source;
	421	ret = set_cfg(sdi, ":TRIG:EDGE:SOUR %s", tmp_str);
	422	break;
	423	}
4e108ace	424	}
254dd102 BV	425	if (i == ARRAY_SIZE(trigger_sources))
254dd102 BV	426	ret = SR_ERR_ARG;
e0b7d23c	427	break;
1953564a	428	case SR_CONF_VDIV:
f6a0ac9f	429	g_variant_get(data, "(tt)", &p, &q);
f6a0ac9f BV	430	for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
	431	if (vdivs[i][0] != p \|\| vdivs[i][1] != q)
	432	continue;
254dd102 BV	433	devc->vdiv[0] = devc->vdiv[1] = (float)p / q;
	434	set_cfg(sdi, ":CHAN1:SCAL %.3f", devc->vdiv[0]);
	435	ret = set_cfg(sdi, ":CHAN2:SCAL %.3f", devc->vdiv[1]);
f6a0ac9f	436	break;
e0b7d23c	437	}
f6a0ac9f	438	if (i == ARRAY_SIZE(vdivs))
e0b7d23c ML	439	ret = SR_ERR_ARG;
e0b7d23c ML	440	break;
1953564a	441	case SR_CONF_COUPLING:
e0b7d23c	442	/* TODO: Not supporting coupling per channel yet. */
f6a0ac9f BV	443	tmp_str = g_variant_get_string(data, NULL);
	444	for (i = 0; i < ARRAY_SIZE(coupling); i++) {
	445	if (!strcmp(tmp_str, coupling[i])) {
254dd102 BV	446	g_free(devc->coupling[0]);
	447	g_free(devc->coupling[1]);
	448	devc->coupling[0] = g_strdup(coupling[i]);
	449	devc->coupling[1] = g_strdup(coupling[i]);
	450	set_cfg(sdi, ":CHAN1:COUP %s", devc->coupling[0]);
	451	ret = set_cfg(sdi, ":CHAN2:COUP %s", devc->coupling[1]);
e0b7d23c ML	452	break;
	453	}
	454	}
f6a0ac9f	455	if (i == ARRAY_SIZE(coupling))
e0b7d23c ML	456	ret = SR_ERR_ARG;
e0b7d23c ML	457	break;
f4816ac6	458	default:
035a1078	459	sr_err("Unknown hardware capability: %d.", id);
f4816ac6	460	ret = SR_ERR_ARG;
29d957ce	461	break;
f4816ac6 ML	462	}
	463
	464	return ret;
	465	}
	466
f6a0ac9f	467	static int config_list(int key, GVariant *data, const struct sr_dev_inst sdi)
a1c743fc	468	{
861c447b BV	469	GVariant tuple, rational[2];
	470	GVariantBuilder gvb;
	471	unsigned int i;
a1c743fc BV	472
	473	(void)sdi;
	474
	475	switch (key) {
9a6517d1	476	case SR_CONF_DEVICE_OPTIONS:
f6a0ac9f BV	477	*data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
f6a0ac9f BV	478	hwcaps, ARRAY_SIZE(hwcaps), sizeof(int32_t));
9a6517d1	479	break;
2a7b113d	480	case SR_CONF_COUPLING:
169dbe85 UH	481	*data = g_variant_new_strv(coupling, ARRAY_SIZE(coupling));
169dbe85 UH	482	break;
e4f2b2ad	483	case SR_CONF_VDIV:
861c447b BV	484	g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
	485	for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
	486	rational[0] = g_variant_new_uint64(vdivs[i][0]);
	487	rational[1] = g_variant_new_uint64(vdivs[i][1]);
	488	tuple = g_variant_new_tuple(rational, 2);
	489	g_variant_builder_add_value(&gvb, tuple);
	490	}
	491	*data = g_variant_builder_end(&gvb);
e4f2b2ad	492	break;
41f5bd09	493	case SR_CONF_TIMEBASE:
861c447b BV	494	g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
	495	for (i = 0; i < ARRAY_SIZE(timebases); i++) {
	496	rational[0] = g_variant_new_uint64(timebases[i][0]);
	497	rational[1] = g_variant_new_uint64(timebases[i][1]);
	498	tuple = g_variant_new_tuple(rational, 2);
	499	g_variant_builder_add_value(&gvb, tuple);
	500	}
	501	*data = g_variant_builder_end(&gvb);
41f5bd09	502	break;
328bafab	503	case SR_CONF_TRIGGER_SOURCE:
f6a0ac9f BV	504	*data = g_variant_new_strv(trigger_sources,
f6a0ac9f BV	505	ARRAY_SIZE(trigger_sources));
328bafab	506	break;
a1c743fc BV	507	default:
	508	return SR_ERR_ARG;
	509	}
	510
	511	return SR_OK;
	512	}
	513
254dd102	514	static int dev_acquisition_start(const struct sr_dev_inst sdi, void cb_data)
f4816ac6	515	{
29d957ce	516	struct dev_context *devc;
254dd102 BV	517	struct sr_probe *probe;
	518	GSList *l;
	519	int probenum;
	520	char cmd[256];
29d957ce	521
e0b7d23c ML	522	(void)cb_data;
e0b7d23c ML	523
29d957ce UH	524	devc = sdi->priv;
29d957ce UH	525
254dd102 BV	526	for (l = sdi->probes; l; l = l->next) {
	527	probe = l->data;
	528	probenum = probe->name[2] == '1' ? 0 : 1;
	529	if (probe->enabled)
	530	devc->enabled_probes = g_slist_append(devc->enabled_probes, probe);
	531
	532	if (probe->enabled != devc->channels[probenum]) {
	533	/* Enabled channel is currently disabled, or vice versa. */
	534	sprintf(cmd, ":CHAN%d:DISP %s", probenum + 1,
	535	probe->enabled ? "ON" : "OFF");
	536	if (rigol_ds1xx2_send(devc, cmd) != SR_OK)
	537	return SR_ERR;
	538	}
	539	}
	540	if (!devc->enabled_probes)
	541	return SR_ERR;
e0b7d23c	542
254dd102	543	sr_source_add(devc->fd, G_IO_IN, 50, rigol_ds1xx2_receive, (void *)sdi);
e0b7d23c ML	544
e0b7d23c ML	545	/* Send header packet to the session bus. */
4afdfd46	546	std_session_send_df_header(cb_data, DRIVER_LOG_DOMAIN);
e0b7d23c	547
254dd102 BV	548	/* Fetch the first frame. */
	549	devc->channel_frame = devc->enabled_probes->data;
	550	if (rigol_ds1xx2_send(devc, ":WAV:DATA? CHAN%c",
	551	devc->channel_frame->name[2]) != SR_OK)
	552	return SR_ERR;
f4816ac6	553
ee7e9bee ML	554	devc->num_frame_bytes = 0;
ee7e9bee ML	555
f4816ac6 ML	556	return SR_OK;
	557	}
	558
254dd102	559	static int dev_acquisition_stop(struct sr_dev_inst sdi, void cb_data)
f4816ac6	560	{
29d957ce UH	561	struct dev_context *devc;
29d957ce UH	562
f4816ac6 ML	563	(void)cb_data;
f4816ac6 ML	564
29d957ce UH	565	devc = sdi->priv;
29d957ce UH	566
f4816ac6 ML	567	if (sdi->status != SR_ST_ACTIVE) {
	568	sr_err("Device inactive, can't stop acquisition.");
	569	return SR_ERR;
	570	}
	571
254dd102 BV	572	g_slist_free(devc->enabled_probes);
254dd102 BV	573	devc->enabled_probes = NULL;
e0b7d23c	574	sr_source_remove(devc->fd);
f4816ac6 ML	575
	576	return SR_OK;
	577	}
	578
	579	SR_PRIV struct sr_dev_driver rigol_ds1xx2_driver_info = {
	580	.name = "rigol-ds1xx2",
	581	.longname = "Rigol DS1xx2",
	582	.api_version = 1,
	583	.init = hw_init,
	584	.cleanup = hw_cleanup,
	585	.scan = hw_scan,
	586	.dev_list = hw_dev_list,
	587	.dev_clear = clear_instances,
d62d7ad1	588	.config_get = config_get,
035a1078	589	.config_set = config_set,
a1c743fc	590	.config_list = config_list,
f4816ac6 ML	591	.dev_open = hw_dev_open,
f4816ac6 ML	592	.dev_close = hw_dev_close,
254dd102 BV	593	.dev_acquisition_start = dev_acquisition_start,
254dd102 BV	594	.dev_acquisition_stop = dev_acquisition_stop,
f4816ac6 ML	595	.priv = NULL,
f4816ac6 ML	596	};