[libsigrok.git] / hardware / rigol-ds1xx2 / api.c

/*
 * This file is part of the libsigrok project.
 *
 * Copyright (C) 2012 Martin Ling <martin-git@earth.li>
 *
 * This program is free software: you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation, either version 3 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */

#include <fcntl.h>
#include <unistd.h>
#include <stdlib.h>
#include <string.h>
#include <glib.h>
#include "libsigrok.h"
#include "libsigrok-internal.h"
#include "protocol.h"

#define NUM_PROBES 2

static const int hwcaps[] = {
	SR_HWCAP_OSCILLOSCOPE,
	SR_HWCAP_LIMIT_SAMPLES,
	SR_HWCAP_TIMEBASE,
	SR_HWCAP_TRIGGER_SOURCE,
	SR_HWCAP_TRIGGER_SLOPE,
	SR_HWCAP_HORIZ_TRIGGERPOS,
	SR_HWCAP_VDIV,
	SR_HWCAP_COUPLING,
	0,
};

static const char *probe_names[] = {
	"CH1", "CH2",
	NULL,
};

static const struct sr_rational timebases[] = {
	/* nanoseconds */
	{ 2, 1000000000 },
	{ 5, 1000000000 },
	{ 10, 1000000000 },
	{ 20, 1000000000 },
	{ 50, 1000000000 },
	{ 100, 1000000000 },
	{ 500, 1000000000 },
	/* microseconds */
	{ 1, 1000000 },
	{ 2, 1000000 },
	{ 5, 1000000 },
	{ 10, 1000000 },
	{ 20, 1000000 },
	{ 50, 1000000 },
	{ 100, 1000000 },
	{ 200, 1000000 },
	{ 500, 1000000 },
	/* milliseconds */
	{ 1, 1000 },
	{ 2, 1000 },
	{ 5, 1000 },
	{ 10, 1000 },
	{ 20, 1000 },
	{ 50, 1000 },
	{ 100, 1000 },
	{ 200, 1000 },
	{ 500, 1000 },
	/* seconds */
	{ 1, 1 },
	{ 2, 1 },
	{ 5, 1 },
	{ 10, 1 },
	{ 20, 1 },
	{ 50, 1 },
	{ 0, 0},
};

static const struct sr_rational vdivs[] = {
	/* millivolts */
	{ 2, 1000 },
	{ 5, 1000 },
	{ 10, 1000 },
	{ 20, 1000 },
	{ 50, 1000 },
	{ 100, 1000 },
	{ 200, 1000 },
	{ 500, 1000 },
	/* volts */
	{ 1, 1 },
	{ 2, 1 },
	{ 5, 1 },
	{ 10, 1 },
	{ 0, 0 },
};

static const char *trigger_sources[] = {
	"CH1",
	"CH2",
	"EXT",
	"AC Line",
	NULL,
};

static const char *coupling[] = {
	"AC",
	"DC",
	"GND",
	NULL,
};

SR_PRIV struct sr_dev_driver rigol_ds1xx2_driver_info;
static struct sr_dev_driver *di = &rigol_ds1xx2_driver_info;

/* Properly close and free all devices. */
static int clear_instances(void)
{
	struct sr_dev_inst *sdi;
	struct drv_context *drvc;
	struct dev_context *devc;
	GSList *l;

	if (!(drvc = di->priv))
		return SR_OK;

	for (l = drvc->instances; l; l = l->next) {
		if (!(sdi = l->data))
			continue;
		if (!(devc = sdi->priv))
			continue;

		g_free(devc->device);
		close(devc->fd);

		sr_dev_inst_free(sdi);
	}

	g_slist_free(drvc->instances);
	drvc->instances = NULL;

	return SR_OK;
}

static int hw_init(struct sr_context *sr_ctx)
{
	struct drv_context *drvc;
	(void)sr_ctx;

	if (!(drvc = g_try_malloc0(sizeof(struct drv_context)))) {
		sr_err("Driver context malloc failed.");
		return SR_ERR_MALLOC;
	}

	di->priv = drvc;

	return SR_OK;
}

static GSList *hw_scan(GSList *options)
{
	struct drv_context *drvc;
	struct sr_dev_inst *sdi;
	struct dev_context *devc;
	struct sr_probe *probe;
	GSList *devices;
	GDir *dir;
	const gchar *dev_name;
	const gchar *dev_dir = "/dev/";
	const gchar *prefix = "usbtmc";
	gchar *device;
	const gchar *idn_query = "*IDN?";
	int len, num_tokens, fd, i;
	const gchar *delimiter = ",";
	gchar **tokens;
	char buf[256];

	(void)options;

	devices = NULL;
	drvc = di->priv;
	drvc->instances = NULL;

	dir = g_dir_open("/sys/class/usb/", 0, NULL);

	if (dir == NULL)
		return NULL;

	while ((dev_name = g_dir_read_name(dir)) != NULL) {
		if (strncmp(dev_name, prefix, strlen(prefix))) 
			continue;

		device = g_strconcat(dev_dir, dev_name, NULL);

		fd = open(device, O_RDWR);
		len = write(fd, idn_query, strlen(idn_query));
		len = read(fd, buf, sizeof(buf));
		close(fd);
		if (len == 0) {
			g_free(device);
			return NULL;
		}

		buf[len] = 0;
		tokens = g_strsplit(buf, delimiter, 0);
		close(fd);

		for (num_tokens = 0; tokens[num_tokens] != NULL; num_tokens++);

		if (!(sdi = sr_dev_inst_new(0, SR_ST_ACTIVE, tokens[0],
		    num_tokens > 1 ? tokens[1] : NULL,
		    num_tokens > 3 ? tokens[3] : NULL))) {
			g_strfreev(tokens);
			g_free(device);
			return NULL;
		}
		g_strfreev(tokens);

		if (!(devc = g_try_malloc0(sizeof(struct dev_context)))) {
			sr_err("Device context malloc failed.");
			g_free(device);
			return NULL;
		}

		devc->device = device;

		sdi->priv = devc;
		sdi->driver = di;

		for (i = 0; i < 2; i++) {
			if (!(probe = sr_probe_new(0, SR_PROBE_ANALOG, TRUE,
			    i == 0 ? "CH1" : "CH2")))
				return NULL;
			sdi->probes = g_slist_append(sdi->probes, probe);
		}

		drvc->instances = g_slist_append(drvc->instances, sdi);
		devices = g_slist_append(devices, sdi);
	}

	g_dir_close(dir);

	return devices;
}

static GSList *hw_dev_list(void)
{
	struct drv_context *drvc;

	drvc = di->priv;

	return drvc->instances;
}

static int hw_dev_open(struct sr_dev_inst *sdi)
{
	struct dev_context *devc;
	int fd;

	devc = sdi->priv;

	if ((fd = open(devc->device, O_RDWR)) == -1)
		return SR_ERR;

	devc->fd = fd;

	devc->scale = 1;

	return SR_OK;
}

static int hw_dev_close(struct sr_dev_inst *sdi)
{
	struct dev_context *devc;

	devc = sdi->priv;

	close(devc->fd);

	return SR_OK;
}

static int hw_cleanup(void)
{
	clear_instances();

	return SR_OK;
}

static int hw_info_get(int info_id, const void **data,
		       const struct sr_dev_inst *sdi)
{
	(void)sdi;

	switch (info_id) {
	case SR_DI_HWCAPS:
		*data = hwcaps;
		break;
	case SR_DI_NUM_PROBES:
		*data = GINT_TO_POINTER(NUM_PROBES);
		break;
	case SR_DI_PROBE_NAMES:
		*data = probe_names;
		break;
	case SR_DI_TIMEBASES:
		*data = timebases;
		break;
	case SR_DI_TRIGGER_SOURCES:
		*data = trigger_sources;
		break;
	case SR_DI_VDIVS:
		*data = vdivs;
		break;
	case SR_DI_COUPLING:
		*data = coupling;
		break;
	default:
		sr_err("Unknown info_id: %d.", info_id);
		return SR_ERR_ARG;
	}

	return SR_OK;
}

static int hw_dev_config_set(const struct sr_dev_inst *sdi, int hwcap,
			     const void *value)
{
	struct dev_context *devc;
	uint64_t tmp_u64;
	float tmp_float;
	struct sr_rational tmp_rat;
	int ret, i, j;
	char *channel;

	devc = sdi->priv;

	if (sdi->status != SR_ST_ACTIVE) {
		sr_err("Device inactive, can't set config options.");
		return SR_ERR;
	}

	ret = SR_OK;
	switch (hwcap) {
	case SR_HWCAP_LIMIT_FRAMES:
		devc->limit_frames = *(const uint64_t *)value;
		break;
	case SR_HWCAP_TRIGGER_SLOPE:
		tmp_u64 = *(const int *)value;
		rigol_ds1xx2_send_data(devc->fd, ":TRIG:EDGE:SLOP %s\n",
				       tmp_u64 ? "POS" : "NEG");
		break;
	case SR_HWCAP_HORIZ_TRIGGERPOS:
		tmp_float = *(const float *)value;
		rigol_ds1xx2_send_data(devc->fd, ":TIM:OFFS %.9f\n", tmp_float);
		break;
	case SR_HWCAP_TIMEBASE:
		tmp_rat = *(const struct sr_rational *)value;
		rigol_ds1xx2_send_data(devc->fd, ":TIM:SCAL %.9f\n",
				       (float)tmp_rat.p / tmp_rat.q);
		break;
	case SR_HWCAP_TRIGGER_SOURCE:
		if (!strcmp(value, "CH1"))
			channel = "CHAN1";
		else if (!strcmp(value, "CH2"))
			channel = "CHAN2";
		else if (!strcmp(value, "EXT"))
			channel = "EXT";
		else if (!strcmp(value, "AC Line"))
			channel = "ACL";
		else {
			ret = SR_ERR_ARG;
			break;
		}
		rigol_ds1xx2_send_data(devc->fd, ":TRIG:EDGE:SOUR %s\n", channel);
		break;
	case SR_HWCAP_VDIV:
		/* TODO: Not supporting vdiv per channel yet. */
		tmp_rat = *(const struct sr_rational *)value;
		for (i = 0; vdivs[i].p && vdivs[i].q; i++) {
			if (vdivs[i].p == tmp_rat.p
					&& vdivs[i].q == tmp_rat.q) {
				devc->scale = (float)tmp_rat.p / tmp_rat.q;
				for (j = 0; j < 2; j++)
					rigol_ds1xx2_send_data(devc->fd,
					 ":CHAN%d:SCAL %.3f\n", j, devc->scale);
				break;
			}
		}
		if (vdivs[i].p == 0 && vdivs[i].q == 0)
			ret = SR_ERR_ARG;
		break;
	case SR_HWCAP_COUPLING:
		/* TODO: Not supporting coupling per channel yet. */
		for (i = 0; coupling[i]; i++) {
			if (!strcmp(value, coupling[i])) {
				for (j = 0; j < 2; j++)
					rigol_ds1xx2_send_data(devc->fd,
					  ":CHAN%d:COUP %s\n", j, coupling[i]);
				break;
			}
		}
		if (coupling[i] == 0)
			ret = SR_ERR_ARG;
		break;
	default:
		sr_err("Unknown hardware capability: %d.", hwcap);
		ret = SR_ERR_ARG;
		break;
	}

	return ret;
}

static int hw_dev_acquisition_start(const struct sr_dev_inst *sdi,
				    void *cb_data)
{
	struct dev_context *devc;
	struct sr_datafeed_packet packet;
	struct sr_datafeed_header header;
	struct sr_datafeed_meta_analog meta;
	char buf[256];
	int len;

	(void)cb_data;

	devc = sdi->priv;

	devc->num_frames = 0;

	sr_source_add(devc->fd, G_IO_IN, 50, rigol_ds1xx2_receive_data, (void *)sdi);

	/* Send header packet to the session bus. */
	packet.type = SR_DF_HEADER;
	packet.payload = (unsigned char *)&header;
	header.feed_version = 1;
	gettimeofday(&header.starttime, NULL);
	sr_session_send(cb_data, &packet);

	/* Send metadata about the SR_DF_ANALOG packets to come. */
	packet.type = SR_DF_META_ANALOG;
	packet.payload = &meta;
	meta.num_probes = NUM_PROBES;
	sr_session_send(cb_data, &packet);

	rigol_ds1xx2_send_data(devc->fd, ":CHAN1:SCAL?\n");
	len = read(devc->fd, buf, sizeof(buf));
	buf[len] = 0;
	devc->scale = atof(buf);
	sr_dbg("Scale is %.3f.", devc->scale);
	rigol_ds1xx2_send_data(devc->fd, ":CHAN1:OFFS?\n");
	len = read(devc->fd, buf, sizeof(buf));
	buf[len] = 0;
	devc->offset = atof(buf);
	sr_dbg("Offset is %.6f.", devc->offset);
	rigol_ds1xx2_send_data(devc->fd, ":WAV:DATA?\n");

	return SR_OK;
}

static int hw_dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data)
{
	struct dev_context *devc;

	(void)cb_data;

	devc = sdi->priv;

	if (sdi->status != SR_ST_ACTIVE) {
		sr_err("Device inactive, can't stop acquisition.");
		return SR_ERR;
	}

	sr_source_remove(devc->fd);

	return SR_OK;
}

SR_PRIV struct sr_dev_driver rigol_ds1xx2_driver_info = {
	.name = "rigol-ds1xx2",
	.longname = "Rigol DS1xx2",
	.api_version = 1,
	.init = hw_init,
	.cleanup = hw_cleanup,
	.scan = hw_scan,
	.dev_list = hw_dev_list,
	.dev_clear = clear_instances,
	.dev_open = hw_dev_open,
	.dev_close = hw_dev_close,
	.info_get = hw_info_get,
	.dev_config_set = hw_dev_config_set,
	.dev_acquisition_start = hw_dev_acquisition_start,
	.dev_acquisition_stop = hw_dev_acquisition_stop,
	.priv = NULL,
};
Commit	Line	Data
f4816ac6 ML	1	/*
	2	* This file is part of the libsigrok project.
	3	*
	4	* Copyright (C) 2012 Martin Ling <martin-git@earth.li>
	5	*
	6	* This program is free software: you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation, either version 3 of the License, or
	9	* (at your option) any later version.
	10	*
	11	* This program is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	* GNU General Public License for more details.
	15	*
	16	* You should have received a copy of the GNU General Public License
	17	* along with this program. If not, see <http://www.gnu.org/licenses/>.
	18	*/
	19
e0b7d23c ML	20	#include <fcntl.h>
	21	#include <unistd.h>
	22	#include <stdlib.h>
	23	#include <string.h>
f4816ac6 ML	24	#include <glib.h>
	25	#include "libsigrok.h"
	26	#include "libsigrok-internal.h"
	27	#include "protocol.h"
	28
e0b7d23c ML	29	#define NUM_PROBES 2
	30
	31	static const int hwcaps[] = {
	32	SR_HWCAP_OSCILLOSCOPE,
	33	SR_HWCAP_LIMIT_SAMPLES,
	34	SR_HWCAP_TIMEBASE,
	35	SR_HWCAP_TRIGGER_SOURCE,
	36	SR_HWCAP_TRIGGER_SLOPE,
	37	SR_HWCAP_HORIZ_TRIGGERPOS,
	38	SR_HWCAP_VDIV,
	39	SR_HWCAP_COUPLING,
	40	0,
	41	};
	42
	43	static const char *probe_names[] = {
	44	"CH1", "CH2",
	45	NULL,
	46	};
	47
	48	static const struct sr_rational timebases[] = {
	49	/* nanoseconds */
	50	{ 2, 1000000000 },
	51	{ 5, 1000000000 },
	52	{ 10, 1000000000 },
	53	{ 20, 1000000000 },
	54	{ 50, 1000000000 },
	55	{ 100, 1000000000 },
	56	{ 500, 1000000000 },
	57	/* microseconds */
	58	{ 1, 1000000 },
	59	{ 2, 1000000 },
	60	{ 5, 1000000 },
	61	{ 10, 1000000 },
	62	{ 20, 1000000 },
	63	{ 50, 1000000 },
	64	{ 100, 1000000 },
	65	{ 200, 1000000 },
	66	{ 500, 1000000 },
	67	/* milliseconds */
	68	{ 1, 1000 },
	69	{ 2, 1000 },
	70	{ 5, 1000 },
	71	{ 10, 1000 },
	72	{ 20, 1000 },
	73	{ 50, 1000 },
	74	{ 100, 1000 },
	75	{ 200, 1000 },
	76	{ 500, 1000 },
	77	/* seconds */
	78	{ 1, 1 },
	79	{ 2, 1 },
	80	{ 5, 1 },
	81	{ 10, 1 },
	82	{ 20, 1 },
	83	{ 50, 1 },
	84	{ 0, 0},
	85	};
	86
	87	static const struct sr_rational vdivs[] = {
	88	/* millivolts */
	89	{ 2, 1000 },
	90	{ 5, 1000 },
	91	{ 10, 1000 },
	92	{ 20, 1000 },
93	{ 50, 1000 },
94	{ 100, 1000 },
95	{ 200, 1000 },
96	{ 500, 1000 },
97	/* volts */
98	{ 1, 1 },
99	{ 2, 1 },
100	{ 5, 1 },
101	{ 10, 1 },
102	{ 0, 0 },
103	};
104
105	static const char *trigger_sources[] = {
106	"CH1",
107	"CH2",
108	"EXT",
109	"AC Line",
110	NULL,
111	};
112
113	static const char *coupling[] = {
114	"AC",
115	"DC",
116	"GND",
117	NULL,
118	};
119
f4816ac6 ML	120	SR_PRIV struct sr_dev_driver rigol_ds1xx2_driver_info;
	121	static struct sr_dev_driver *di = &rigol_ds1xx2_driver_info;
	122
	123	/* Properly close and free all devices. */
	124	static int clear_instances(void)
	125	{
	126	struct sr_dev_inst *sdi;
	127	struct drv_context *drvc;
	128	struct dev_context *devc;
	129	GSList *l;
	130
	131	if (!(drvc = di->priv))
	132	return SR_OK;
	133
	134	for (l = drvc->instances; l; l = l->next) {
	135	if (!(sdi = l->data))
	136	continue;
	137	if (!(devc = sdi->priv))
	138	continue;
	139
fb6e5ba8	140	g_free(devc->device);
e0b7d23c	141	close(devc->fd);
f4816ac6 ML	142
	143	sr_dev_inst_free(sdi);
	144	}
	145
	146	g_slist_free(drvc->instances);
	147	drvc->instances = NULL;
	148
	149	return SR_OK;
	150	}
	151
e0b7d23c	152	static int hw_init(struct sr_context *sr_ctx)
f4816ac6 ML	153	{
f4816ac6 ML	154	struct drv_context *drvc;
e0b7d23c	155	(void)sr_ctx;
f4816ac6 ML	156
	157	if (!(drvc = g_try_malloc0(sizeof(struct drv_context)))) {
	158	sr_err("Driver context malloc failed.");
	159	return SR_ERR_MALLOC;
	160	}
	161
f4816ac6 ML	162	di->priv = drvc;
	163
	164	return SR_OK;
	165	}
	166
	167	static GSList hw_scan(GSList options)
	168	{
	169	struct drv_context *drvc;
e0b7d23c ML	170	struct sr_dev_inst *sdi;
	171	struct dev_context *devc;
	172	struct sr_probe *probe;
f4816ac6	173	GSList *devices;
fb6e5ba8 ML	174	GDir *dir;
	175	const gchar *dev_name;
	176	const gchar *dev_dir = "/dev/";
	177	const gchar *prefix = "usbtmc";
	178	gchar *device;
	179	const gchar idn_query = "IDN?";
29d957ce	180	int len, num_tokens, fd, i;
fb6e5ba8 ML	181	const gchar *delimiter = ",";
fb6e5ba8 ML	182	gchar **tokens;
fb6e5ba8 ML	183	char buf[256];
fb6e5ba8 ML	184
f4816ac6 ML	185	(void)options;
	186
	187	devices = NULL;
	188	drvc = di->priv;
	189	drvc->instances = NULL;
	190
fb6e5ba8	191	dir = g_dir_open("/sys/class/usb/", 0, NULL);
e0b7d23c	192
fb6e5ba8 ML	193	if (dir == NULL)
fb6e5ba8 ML	194	return NULL;
e0b7d23c	195
29d957ce	196	while ((dev_name = g_dir_read_name(dir)) != NULL) {
fb6e5ba8 ML	197	if (strncmp(dev_name, prefix, strlen(prefix)))
	198	continue;
	199
	200	device = g_strconcat(dev_dir, dev_name, NULL);
	201
	202	fd = open(device, O_RDWR);
	203	len = write(fd, idn_query, strlen(idn_query));
	204	len = read(fd, buf, sizeof(buf));
	205	close(fd);
29d957ce	206	if (len == 0) {
fb6e5ba8 ML	207	g_free(device);
	208	return NULL;
	209	}
	210
	211	buf[len] = 0;
	212	tokens = g_strsplit(buf, delimiter, 0);
	213	close(fd);
	214
	215	for (num_tokens = 0; tokens[num_tokens] != NULL; num_tokens++);
	216
	217	if (!(sdi = sr_dev_inst_new(0, SR_ST_ACTIVE, tokens[0],
29d957ce UH	218	num_tokens > 1 ? tokens[1] : NULL,
29d957ce UH	219	num_tokens > 3 ? tokens[3] : NULL))) {
fb6e5ba8 ML	220	g_strfreev(tokens);
fb6e5ba8 ML	221	g_free(device);
e0b7d23c	222	return NULL;
fb6e5ba8 ML	223	}
	224	g_strfreev(tokens);
	225
29d957ce UH	226	if (!(devc = g_try_malloc0(sizeof(struct dev_context)))) {
29d957ce UH	227	sr_err("Device context malloc failed.");
fb6e5ba8 ML	228	g_free(device);
	229	return NULL;
	230	}
	231
	232	devc->device = device;
	233
	234	sdi->priv = devc;
	235	sdi->driver = di;
	236
29d957ce UH	237	for (i = 0; i < 2; i++) {
	238	if (!(probe = sr_probe_new(0, SR_PROBE_ANALOG, TRUE,
	239	i == 0 ? "CH1" : "CH2")))
fb6e5ba8 ML	240	return NULL;
	241	sdi->probes = g_slist_append(sdi->probes, probe);
	242	}
	243
	244	drvc->instances = g_slist_append(drvc->instances, sdi);
	245	devices = g_slist_append(devices, sdi);
e0b7d23c	246	}
fb6e5ba8 ML	247
fb6e5ba8 ML	248	g_dir_close(dir);
f4816ac6 ML	249
	250	return devices;
	251	}
	252
	253	static GSList *hw_dev_list(void)
	254	{
	255	struct drv_context *drvc;
	256
	257	drvc = di->priv;
	258
	259	return drvc->instances;
	260	}
	261
	262	static int hw_dev_open(struct sr_dev_inst *sdi)
	263	{
29d957ce UH	264	struct dev_context *devc;
29d957ce UH	265	int fd;
fb6e5ba8	266
29d957ce	267	devc = sdi->priv;
e0b7d23c	268
29d957ce	269	if ((fd = open(devc->device, O_RDWR)) == -1)
e0b7d23c ML	270	return SR_ERR;
e0b7d23c ML	271
e0b7d23c ML	272	devc->fd = fd;
	273
	274	devc->scale = 1;
f4816ac6 ML	275
	276	return SR_OK;
	277	}
	278
	279	static int hw_dev_close(struct sr_dev_inst *sdi)
	280	{
29d957ce UH	281	struct dev_context *devc;
	282
	283	devc = sdi->priv;
e0b7d23c ML	284
e0b7d23c ML	285	close(devc->fd);
f4816ac6 ML	286
	287	return SR_OK;
	288	}
	289
	290	static int hw_cleanup(void)
	291	{
	292	clear_instances();
	293
f4816ac6 ML	294	return SR_OK;
	295	}
	296
	297	static int hw_info_get(int info_id, const void **data,
	298	const struct sr_dev_inst *sdi)
	299	{
e0b7d23c ML	300	(void)sdi;
e0b7d23c ML	301
f4816ac6	302	switch (info_id) {
e0b7d23c ML	303	case SR_DI_HWCAPS:
	304	*data = hwcaps;
	305	break;
	306	case SR_DI_NUM_PROBES:
	307	*data = GINT_TO_POINTER(NUM_PROBES);
	308	break;
	309	case SR_DI_PROBE_NAMES:
	310	*data = probe_names;
	311	break;
	312	case SR_DI_TIMEBASES:
	313	*data = timebases;
	314	break;
	315	case SR_DI_TRIGGER_SOURCES:
	316	*data = trigger_sources;
	317	break;
	318	case SR_DI_VDIVS:
	319	*data = vdivs;
	320	break;
	321	case SR_DI_COUPLING:
	322	*data = coupling;
	323	break;
f4816ac6 ML	324	default:
	325	sr_err("Unknown info_id: %d.", info_id);
	326	return SR_ERR_ARG;
	327	}
	328
	329	return SR_OK;
	330	}
	331
	332	static int hw_dev_config_set(const struct sr_dev_inst *sdi, int hwcap,
	333	const void *value)
	334	{
29d957ce	335	struct dev_context *devc;
e0b7d23c ML	336	uint64_t tmp_u64;
	337	float tmp_float;
	338	struct sr_rational tmp_rat;
	339	int ret, i, j;
	340	char *channel;
f4816ac6	341
29d957ce UH	342	devc = sdi->priv;
29d957ce UH	343
f4816ac6 ML	344	if (sdi->status != SR_ST_ACTIVE) {
	345	sr_err("Device inactive, can't set config options.");
	346	return SR_ERR;
	347	}
	348
	349	ret = SR_OK;
	350	switch (hwcap) {
29d957ce	351	case SR_HWCAP_LIMIT_FRAMES:
e0b7d23c ML	352	devc->limit_frames = (const uint64_t )value;
	353	break;
	354	case SR_HWCAP_TRIGGER_SLOPE:
	355	tmp_u64 = (const int )value;
29d957ce UH	356	rigol_ds1xx2_send_data(devc->fd, ":TRIG:EDGE:SLOP %s\n",
29d957ce UH	357	tmp_u64 ? "POS" : "NEG");
e0b7d23c ML	358	break;
	359	case SR_HWCAP_HORIZ_TRIGGERPOS:
	360	tmp_float = (const float )value;
542843f7	361	rigol_ds1xx2_send_data(devc->fd, ":TIM:OFFS %.9f\n", tmp_float);
e0b7d23c ML	362	break;
	363	case SR_HWCAP_TIMEBASE:
	364	tmp_rat = (const struct sr_rational )value;
29d957ce UH	365	rigol_ds1xx2_send_data(devc->fd, ":TIM:SCAL %.9f\n",
29d957ce UH	366	(float)tmp_rat.p / tmp_rat.q);
e0b7d23c ML	367	break;
	368	case SR_HWCAP_TRIGGER_SOURCE:
	369	if (!strcmp(value, "CH1"))
	370	channel = "CHAN1";
	371	else if (!strcmp(value, "CH2"))
	372	channel = "CHAN2";
	373	else if (!strcmp(value, "EXT"))
	374	channel = "EXT";
	375	else if (!strcmp(value, "AC Line"))
	376	channel = "ACL";
29d957ce	377	else {
e0b7d23c ML	378	ret = SR_ERR_ARG;
e0b7d23c ML	379	break;
4e108ace ML	380	}
4e108ace ML	381	rigol_ds1xx2_send_data(devc->fd, ":TRIG:EDGE:SOUR %s\n", channel);
e0b7d23c ML	382	break;
	383	case SR_HWCAP_VDIV:
	384	/* TODO: Not supporting vdiv per channel yet. */
	385	tmp_rat = (const struct sr_rational )value;
	386	for (i = 0; vdivs[i].p && vdivs[i].q; i++) {
	387	if (vdivs[i].p == tmp_rat.p
	388	&& vdivs[i].q == tmp_rat.q) {
29d957ce	389	devc->scale = (float)tmp_rat.p / tmp_rat.q;
e0b7d23c	390	for (j = 0; j < 2; j++)
29d957ce UH	391	rigol_ds1xx2_send_data(devc->fd,
29d957ce UH	392	":CHAN%d:SCAL %.3f\n", j, devc->scale);
e0b7d23c ML	393	break;
	394	}
	395	}
	396	if (vdivs[i].p == 0 && vdivs[i].q == 0)
	397	ret = SR_ERR_ARG;
	398	break;
	399	case SR_HWCAP_COUPLING:
	400	/* TODO: Not supporting coupling per channel yet. */
	401	for (i = 0; coupling[i]; i++) {
	402	if (!strcmp(value, coupling[i])) {
	403	for (j = 0; j < 2; j++)
29d957ce UH	404	rigol_ds1xx2_send_data(devc->fd,
29d957ce UH	405	":CHAN%d:COUP %s\n", j, coupling[i]);
e0b7d23c ML	406	break;
	407	}
	408	}
	409	if (coupling[i] == 0)
	410	ret = SR_ERR_ARG;
	411	break;
f4816ac6 ML	412	default:
	413	sr_err("Unknown hardware capability: %d.", hwcap);
	414	ret = SR_ERR_ARG;
29d957ce	415	break;
f4816ac6 ML	416	}
	417
	418	return ret;
	419	}
	420
	421	static int hw_dev_acquisition_start(const struct sr_dev_inst *sdi,
	422	void *cb_data)
	423	{
29d957ce	424	struct dev_context *devc;
e0b7d23c ML	425	struct sr_datafeed_packet packet;
	426	struct sr_datafeed_header header;
	427	struct sr_datafeed_meta_analog meta;
	428	char buf[256];
	429	int len;
29d957ce	430
e0b7d23c ML	431	(void)cb_data;
e0b7d23c ML	432
29d957ce UH	433	devc = sdi->priv;
29d957ce UH	434
e0b7d23c ML	435	devc->num_frames = 0;
	436
	437	sr_source_add(devc->fd, G_IO_IN, 50, rigol_ds1xx2_receive_data, (void *)sdi);
	438
	439	/* Send header packet to the session bus. */
	440	packet.type = SR_DF_HEADER;
	441	packet.payload = (unsigned char *)&header;
	442	header.feed_version = 1;
	443	gettimeofday(&header.starttime, NULL);
	444	sr_session_send(cb_data, &packet);
	445
	446	/* Send metadata about the SR_DF_ANALOG packets to come. */
	447	packet.type = SR_DF_META_ANALOG;
	448	packet.payload = &meta;
	449	meta.num_probes = NUM_PROBES;
	450	sr_session_send(cb_data, &packet);
	451
	452	rigol_ds1xx2_send_data(devc->fd, ":CHAN1:SCAL?\n");
	453	len = read(devc->fd, buf, sizeof(buf));
	454	buf[len] = 0;
	455	devc->scale = atof(buf);
29d957ce	456	sr_dbg("Scale is %.3f.", devc->scale);
e0b7d23c ML	457	rigol_ds1xx2_send_data(devc->fd, ":CHAN1:OFFS?\n");
	458	len = read(devc->fd, buf, sizeof(buf));
	459	buf[len] = 0;
	460	devc->offset = atof(buf);
29d957ce	461	sr_dbg("Offset is %.6f.", devc->offset);
e0b7d23c	462	rigol_ds1xx2_send_data(devc->fd, ":WAV:DATA?\n");
f4816ac6 ML	463
	464	return SR_OK;
	465	}
	466
	467	static int hw_dev_acquisition_stop(struct sr_dev_inst sdi, void cb_data)
	468	{
29d957ce UH	469	struct dev_context *devc;
29d957ce UH	470
f4816ac6 ML	471	(void)cb_data;
f4816ac6 ML	472
29d957ce UH	473	devc = sdi->priv;
29d957ce UH	474
f4816ac6 ML	475	if (sdi->status != SR_ST_ACTIVE) {
	476	sr_err("Device inactive, can't stop acquisition.");
	477	return SR_ERR;
	478	}
	479
e0b7d23c	480	sr_source_remove(devc->fd);
f4816ac6 ML	481
	482	return SR_OK;
	483	}
	484
	485	SR_PRIV struct sr_dev_driver rigol_ds1xx2_driver_info = {
	486	.name = "rigol-ds1xx2",
	487	.longname = "Rigol DS1xx2",
	488	.api_version = 1,
	489	.init = hw_init,
	490	.cleanup = hw_cleanup,
	491	.scan = hw_scan,
	492	.dev_list = hw_dev_list,
	493	.dev_clear = clear_instances,
	494	.dev_open = hw_dev_open,
	495	.dev_close = hw_dev_close,
	496	.info_get = hw_info_get,
	497	.dev_config_set = hw_dev_config_set,
	498	.dev_acquisition_start = hw_dev_acquisition_start,
	499	.dev_acquisition_stop = hw_dev_acquisition_stop,
	500	.priv = NULL,
	501	};