Left a note that the next revision has to get roundrect pads.

Totally forgot to change them... and I already ordered the boards so it
is too late for the current revision. :(

diff --git a/hardware/fx2grok-flat/0.3/fx2grok-flat.kicad_pcb b/hardware/fx2grok-flat/0.3/fx2grok-flat.kicad_pcb
index 87b2bbce085005cbebe5c353818962aee19ff9e5..cead8ba72eadc149b9dfb40992ed38e76c94c9f7 100644 (file)
--- a/hardware/fx2grok-flat/0.3/fx2grok-flat.kicad_pcb
+++ b/hardware/fx2grok-flat/0.3/fx2grok-flat.kicad_pcb
@@ -2,7 +2,7 @@
 
   (general
     (thickness 1.6)
-    (drawings 47)
+    (drawings 48)
     (tracks 480)
     (zones 0)
     (modules 38)
@@ -34,7 +34,7 @@
     (44 Edge.Cuts user)
     (46 B.CrtYd user)
     (47 F.CrtYd user)
-    (48 B.Fab user hide)
+    (48 B.Fab user)
     (49 F.Fab user)
   )
 
@@ -317,12 +317,12 @@
     )
   )
 
-  (module pkl_logos:1b2_Logo_SilkS_10mm locked (layer B.Cu) (tedit 5531811B) (tstamp 5AD1E8D9)
+  (module pkl_logos:1b2_Logo_SilkS_10mm locked (layer B.Cu) (tedit 5AD83DA6) (tstamp 5AD1E8D9)
     (at 39.5 30.5 90)
     (fp_text reference REF** (at 0 -6 90) (layer B.Fab)
       (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
     )
-    (fp_text value 1b2_Logo_SilkS_10mm (at 0 6.35 90) (layer B.Fab)
+    (fp_text value 1b2_Logo_SilkS_10mm (at 0 6.35 90) (layer B.Fab) hide
       (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
     )
     (fp_line (start -1 1) (end -1 5) (layer B.SilkS) (width 0.4))
@@ -1838,6 +1838,9 @@
     )
   )
 
+  (gr_text "Note: Make sure next revision\nuses roundrect pads! :)" (at 40 43) (layer F.Fab)
+    (effects (font (size 1 1) (thickness 0.2)))
+  )
   (gr_text "T\n2" (at 55.5 26.1 90) (layer B.SilkS) (tstamp 5AD86047)
     (effects (font (size 0.5 1.25) (thickness 0.125)) (justify mirror))
   )
@@ -2429,7 +2432,7 @@
   (segment (start 47.25 26.55) (end 46.375 26.55) (width 0.15) (layer F.Cu) (net 61))
   (segment (start 48.3 25.5) (end 47.25 26.55) (width 0.15) (layer F.Cu) (net 61))
 
-  (zone (net 2) (net_name GND) (layer F.Cu) (tstamp 5AD8612C) (hatch edge 0.508)
+  (zone (net 2) (net_name GND) (layer F.Cu) (tstamp 5AD86178) (hatch edge 0.508)
     (connect_pads (clearance 0.15))
     (min_thickness 0.15)
     (fill yes (arc_segments 16) (thermal_gap 0.15) (thermal_bridge_width 0.2))
@@ -3018,7 +3021,7 @@
       )
     )
   )
-  (zone (net 2) (net_name GND) (layer B.Cu) (tstamp 5AD86129) (hatch edge 0.508)
+  (zone (net 2) (net_name GND) (layer B.Cu) (tstamp 5AD86175) (hatch edge 0.508)
     (connect_pads (clearance 0.15))
     (min_thickness 0.15)
     (fill yes (arc_segments 16) (thermal_gap 0.15) (thermal_bridge_width 0.2))
@@ -3166,7 +3169,7 @@
       )
     )
   )
-  (zone (net 2) (net_name GND) (layer In1.Cu) (tstamp 5AD86126) (hatch edge 0.508)
+  (zone (net 2) (net_name GND) (layer In1.Cu) (tstamp 5AD86172) (hatch edge 0.508)
     (connect_pads (clearance 0.15))
     (min_thickness 0.15)
     (fill yes (arc_segments 16) (thermal_gap 0.15) (thermal_bridge_width 0.2))
@@ -3355,7 +3358,7 @@
       )
     )
   )
-  (zone (net 1) (net_name +3V3) (layer In2.Cu) (tstamp 5AD86123) (hatch edge 0.508)
+  (zone (net 1) (net_name +3V3) (layer In2.Cu) (tstamp 5AD8616F) (hatch edge 0.508)
     (connect_pads (clearance 0.15))
     (min_thickness 0.15)
     (fill yes (arc_segments 16) (thermal_gap 0.15) (thermal_bridge_width 0.2))
@@ -3651,7 +3654,7 @@
       )
     )
   )
-  (zone (net 27) (net_name /shield) (layer F.Cu) (tstamp 5AD86120) (hatch edge 0.508)
+  (zone (net 27) (net_name /shield) (layer F.Cu) (tstamp 5AD8616C) (hatch edge 0.508)
     (priority 1)
     (connect_pads (clearance 0.15))
     (min_thickness 0.15)