+ wrptr = buf;
+
+ /* Read ID register. */
+ write_u8_inc(&wrptr, REG_ADDR_LOW | (READ_ID & 0xf));
+ write_u8_inc(&wrptr, REG_ADDR_HIGH | (READ_ID >> 4));
+ write_u8_inc(&wrptr, REG_READ_ADDR);
+
+ /* Write 0x55 to scratch register, read back. */
+ data_55 = 0x55;
+ write_u8_inc(&wrptr, REG_ADDR_LOW | (WRITE_TEST & 0xf));
+ write_u8_inc(&wrptr, REG_DATA_LOW | (data_55 & 0xf));
+ write_u8_inc(&wrptr, REG_DATA_HIGH_WRITE | (data_55 >> 4));
+ write_u8_inc(&wrptr, REG_READ_ADDR);
+
+ /* Write 0xaa to scratch register, read back. */
+ data_aa = 0xaa;
+ write_u8_inc(&wrptr, REG_ADDR_LOW | (WRITE_TEST & 0xf));
+ write_u8_inc(&wrptr, REG_DATA_LOW | (data_aa & 0xf));
+ write_u8_inc(&wrptr, REG_DATA_HIGH_WRITE | (data_aa >> 4));
+ write_u8_inc(&wrptr, REG_READ_ADDR);
+
+ /* Initiate SDRAM initialization in mode register. */
+ mode = WMR_SDRAMINIT;
+ write_u8_inc(&wrptr, REG_ADDR_LOW | (WRITE_MODE & 0xf));
+ write_u8_inc(&wrptr, REG_DATA_LOW | (mode & 0xf));
+ write_u8_inc(&wrptr, REG_DATA_HIGH_WRITE | (mode >> 4));
+