uart: Don't prefix databyte output numbers.

[libsigrokdecode.git] / decoders / uart / pd.py

diff --git a/decoders/uart/pd.py b/decoders/uart/pd.py
index b10012aa5eeaca0db38333f24fefeaa382a6136b..c0968fb59d33f5d1a06c14259c3ce572bf0cb2a9 100644 (file)
--- a/decoders/uart/pd.py
+++ b/decoders/uart/pd.py
@@ -111,8 +111,8 @@ class Decoder(srd.Decoder):
         self.stopbit1 = [-1, -1]
         self.startsample = [-1, -1]
         self.state = ['WAIT FOR START BIT', 'WAIT FOR START BIT']
-        self.oldbit = [None, None]
-        self.oldpins = None
+        self.oldbit = [1, 1]
+        self.oldpins = [1, 1]
 
     def start(self, metadata):
         self.samplerate = metadata['samplerate']
@@ -206,14 +206,12 @@ class Decoder(srd.Decoder):
         self.putp(['DATA', rxtx, self.databyte[rxtx]])
 
         s = 'RX: ' if (rxtx == RX) else 'TX: '
-        self.putx(rxtx, [ANN_ASCII, [s + chr(self.databyte[rxtx])]])
-        self.putx(rxtx, [ANN_DEC,   [s + str(self.databyte[rxtx])]])
-        self.putx(rxtx, [ANN_HEX,   [s + hex(self.databyte[rxtx]),
-                                     s + hex(self.databyte[rxtx])[2:]]])
-        self.putx(rxtx, [ANN_OCT,   [s + oct(self.databyte[rxtx]),
-                                     s + oct(self.databyte[rxtx])[2:]]])
-        self.putx(rxtx, [ANN_BITS,  [s + bin(self.databyte[rxtx]),
-                                     s + bin(self.databyte[rxtx])[2:]]])
+        b = self.databyte[rxtx]
+        self.putx(rxtx, [ANN_ASCII, [s + chr(b)]])
+        self.putx(rxtx, [ANN_DEC,   [s + str(b)]])
+        self.putx(rxtx, [ANN_HEX,   [s + hex(b)[2:]]])
+        self.putx(rxtx, [ANN_OCT,   [s + oct(b)[2:]]])
+        self.putx(rxtx, [ANN_BITS,  [s + bin(b)[2:]]])
 
     def get_parity_bit(self, rxtx, signal):
         # If no parity is used/configured, skip to the next state immediately.
@@ -268,14 +266,6 @@ class Decoder(srd.Decoder):
             #     continue
             self.oldpins, (rx, tx) = pins, pins
 
-            # First sample: Save RX/TX value.
-            if self.oldbit[RX] == None:
-                self.oldbit[RX] = rx
-                continue
-            if self.oldbit[TX] == None:
-                self.oldbit[TX] = tx
-                continue
-
             # State machine.
             for rxtx in (RX, TX):
                 signal = rx if (rxtx == RX) else tx