## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
-# UART protocol decoder
-
import sigrokdecode as srd
'''
-Protocol output format:
+OUTPUT_PYTHON format:
UART packet:
[<packet-type>, <rxtx>, <packet-data>]
# TODO: Options to invert the signal(s).
}
annotations = [
- ['RX data', 'UART RX data'],
- ['TX data', 'UART TX data'],
- ['Start bits', 'UART start bits'],
- ['Parity bits', 'UART parity bits'],
- ['Stop bits', 'UART stop bits'],
- ['Warnings', 'Warnings'],
+ ['rx-data', 'UART RX data'],
+ ['tx-data', 'UART TX data'],
+ ['start-bits', 'UART start bits'],
+ ['parity-bits', 'UART parity bits'],
+ ['stop-bits', 'UART stop bits'],
+ ['warnings', 'Warnings'],
]
binary = (
('rx', 'RX dump'),
def putp(self, data):
s, halfbit = self.samplenum, int(self.bit_width / 2)
- self.put(s - halfbit, s + halfbit, self.out_proto, data)
+ self.put(s - halfbit, s + halfbit, self.out_python, data)
def putbin(self, rxtx, data):
s, halfbit = self.startsample[rxtx], int(self.bit_width / 2)
self.oldpins = [1, 1]
def start(self):
- self.out_proto = self.register(srd.OUTPUT_PYTHON)
+ self.out_python = self.register(srd.OUTPUT_PYTHON)
self.out_bin = self.register(srd.OUTPUT_BINARY)
self.out_ann = self.register(srd.OUTPUT_ANN)
b, f = self.databyte[rxtx], self.options['format']
if f == 'ascii':
- c = chr(b) if chr(b).isprintable() else '[%02X]' % b
+ c = chr(b) if b in range(30, 126 + 1) else '[%02X]' % b
self.putx(rxtx, [rxtx, [c]])
elif f == 'dec':
self.putx(rxtx, [rxtx, [str(b)]])