desc = 'Sitronix ST7735 TFT controller protocol.'
license = 'gplv2+'
inputs = ['logic']
- outputs = ['st7735']
+ outputs = []
+ tags = ['Display', 'IC']
channels = (
{'id': 'cs', 'name': 'CS#', 'desc': 'Chip-select'},
{'id': 'clk', 'name': 'CLK', 'desc': 'Clock'},
annotation_rows = (
('bits', 'Bits', (Ann.BITS,)),
('fields', 'Fields', (Ann.CMD, Ann.DATA)),
- ('description', 'Description', (Ann.DESC,)),
+ ('descriptions', 'Descriptions', (Ann.DESC,)),
)
def __init__(self):
self.reset()
def reset(self):
- pass
-
- def start(self):
- self.out_ann = self.register(srd.OUTPUT_ANN)
-
- def reset_state(self):
self.accum_byte = 0
self.accum_bits_num = 0
self.bit_ss = -1
self.byte_ss = -1
self.current_bit = -1
+ def start(self):
+ self.out_ann = self.register(srd.OUTPUT_ANN)
+
def put_desc(self, ss, es, cmd, data):
if cmd == -1:
return
- if META[cmd]:
+ if cmd in META:
self.put(ss, es, self.out_ann, [Ann.DESC,
['%s: %s' % (META[cmd]['name'].strip(), META[cmd]['desc'])]])
else:
current_data = []
desc_ss = -1
desc_es = -1
- self.reset_state()
+ self.reset()
while True:
# Check data on both CLK edges.
(cs, clk, mosi, dc) = self.wait({1: 'e'})
if cs == 1: # Wait for CS = low, ignore the rest.
- self.reset_state()
+ self.reset()
continue
if clk == 1: