)
def __init__(self):
+ self.device_id = -1
self.on_end_transaction = None
self.end_current_transaction()
def start(self):
self.out_ann = self.register(srd.OUTPUT_ANN)
self.chip = chips[self.options['chip']]
+ self.vendor = self.options['chip'].split('_')[0]
def putx(self, data):
# Simplification, most annotations span exactly one SPI byte/packet.
def putb(self, data):
self.put(self.ss_block, self.es_block, self.out_ann, data)
+ def vendor_device(self):
+ dev = device_name[self.vendor].get(self.device_id, 'Unknown')
+ return '%s %s' % (self.chip['vendor'], dev)
+
def handle_wren(self, mosi, miso):
self.putx([0, ['Command: %s' % cmds[self.state][1]]])
self.state = None
self.putx([2, ['Device ID: 0x%02x' % miso]])
if self.cmdstate == 4:
- # TODO: Check self.device_id is valid & exists in device_names.
# TODO: Same device ID? Check!
- d = 'Device: Macronix %s' % device_name[self.device_id]
+ d = 'Device: %s' % self.vendor_device()
self.put(self.ss_block, self.es, self.out_ann, [0, [d]])
self.state = None
else:
self.cmdstate += 1
+ def handle_rdsr2(self, mosi, miso):
+ # Read status register 2: Master asserts CS#, sends RDSR2 command,
+ # reads status register 2 byte. If CS# is kept asserted, the status
+ # register 2 can be read continuously / multiple times in a row.
+ # When done, the master de-asserts CS# again.
+ if self.cmdstate == 1:
+ # Byte 1: Master sends command ID.
+ self.putx([3, ['Command: %s' % cmds[self.state][1]]])
+ elif self.cmdstate >= 2:
+ # Bytes 2-x: Slave sends status register 2 as long as master clocks.
+ self.putx([24, ['Status register 2: 0x%02x' % miso]])
+ self.putx([25, [decode_status_reg(miso)]])
+ # TODO: Handle status register 2 correctly.
+
+ self.cmdstate += 1
+
def handle_wrsr(self, mosi, miso):
- pass # TODO
+ # Write status register: Master asserts CS#, sends WRSR command,
+ # writes 1 or 2 status register byte(s).
+ # When done, the master de-asserts CS# again. If this doesn't happen
+ # the WRSR command will not be executed.
+ if self.cmdstate == 1:
+ # Byte 1: Master sends command ID.
+ self.putx([3, ['Command: %s' % cmds[self.state][1]]])
+ elif self.cmdstate in (2, 3):
+ # Bytes 2 and/or 3: Master sends status register byte(s).
+ self.putx([24, ['Status register: 0x%02x' % miso]])
+ self.putx([25, [decode_status_reg(miso)]])
+ # TODO: Handle status register 2 correctly.
+
+ self.cmdstate += 1
def handle_read(self, mosi, miso):
# Read data bytes: Master asserts CS#, sends READ command, sends
pass # TODO
def handle_rdp_res(self, mosi, miso):
- pass # TODO
+ if self.cmdstate == 1:
+ # Byte 1: Master sends command ID.
+ self.ss_block = self.ss
+ self.putx([16, ['Command: %s' % cmds[self.state][1]]])
+ elif self.cmdstate in (2, 3, 4):
+ # Bytes 2/3/4: Master sends three dummy bytes.
+ self.putx([24, ['Dummy byte: %02x' % mosi]])
+ elif self.cmdstate == 5:
+ # Byte 5: Slave sends device ID.
+ self.device_id = miso
+ self.putx([24, ['Device: %s' % self.vendor_device()]])
+ self.state = None
+
+ self.cmdstate += 1
def handle_rems(self, mosi, miso):
if self.cmdstate == 1:
if self.cmdstate == 6:
id = self.ids[1] if self.manufacturer_id_first else self.ids[0]
- self.putx([24, ['Device: Macronix %s' % device_name[id]]])
+ self.device_id = id
+ self.putx([24, ['Device: %s' % self.vendor_device()]])
self.state = None
else:
self.cmdstate += 1