+ def handle_stop(self, ss, es):
+ # Meta bitrate
+ if self.samplerate and self.pdu_start:
+ elapsed = es - self.pdu_start + 1
+ elapsed /= self.samplerate
+ bitrate = int(1 / elapsed * self.pdu_bits)
+ ss_meta, es_meta = self.pdu_start, es
+ self.put(ss_meta, es_meta, self.out_bitrate, bitrate)
+ self.pdu_start = None
+ self.pdu_bits = 0
+
+ cmd = 'STOP'
+ self.putp(ss, es, [cmd, None])
+ cls, texts = proto[cmd][0], proto[cmd][1:]
+ self.putg(ss, es, cls, texts)
+ self.is_repeat_start = False
+ self.is_write = None
+ self.data_bits.clear()
+
+ def decode(self):
+ # Check for several bus conditions. Determine sample numbers
+ # here and pass ss, es, and bit values to handling routines.
+ while True:
+ # State machine.
+ # BEWARE! This implementation expects to see valid traffic,
+ # is rather picky in which phase which symbols get handled.
+ # This attempts to support severely undersampled captures,
+ # which a previous implementation happened to read instead
+ # of rejecting the inadequate input data.
+ # NOTE that handling bits at the start of their validity,
+ # and assuming that they remain valid until the next bit
+ # starts, is also done for backwards compatibility.
+ if self._wants_start():
+ # Wait for a START condition (S): SCL = high, SDA = falling.
+ pins = self.wait({0: 'h', 1: 'f'})
+ ss, es = self.samplenum, self.samplenum
+ self.handle_start(ss, es)
+ elif self._collects_address() and self._collects_byte():
+ # Wait for a data bit: SCL = rising.
+ pins = self.wait({0: 'r'})
+ _, sda = pins
+ ss, es = self.samplenum, self.samplenum + self.bitwidth
+ self.handle_address_or_data(ss, es, sda)
+ elif self._collects_byte():
+ # Wait for any of the following conditions (or combinations):
+ # a) Data sampling of receiver: SCL = rising, and/or
+ # b) START condition (S): SCL = high, SDA = falling, and/or
+ # c) STOP condition (P): SCL = high, SDA = rising
+ pins = self.wait([{0: 'r'}, {0: 'h', 1: 'f'}, {0: 'h', 1: 'r'}])
+
+ # Check which of the condition(s) matched and handle them.
+ if self.matched[0]:
+ _, sda = pins
+ ss, es = self.samplenum, self.samplenum + self.bitwidth
+ self.handle_address_or_data(ss, es, sda)
+ elif self.matched[1]:
+ ss, es = self.samplenum, self.samplenum
+ self.handle_start(ss, es)
+ elif self.matched[2]:
+ ss, es = self.samplenum, self.samplenum
+ self.handle_stop(ss, es)
+ else:
+ # Wait for a data/ack bit: SCL = rising.
+ pins = self.wait({0: 'r'})
+ _, sda = pins
+ ss, es = self.samplenum, self.samplenum + self.bitwidth
+ self.get_ack(ss, es, sda)