l.reverse()
return int(''.join(l), 2)
+def reverse_number(num, count):
+ out = list(count * '0')
+ for i in range(0, count):
+ if (num >> i & 1):
+ out[i] = '1';
+ return int(''.join(out), 2)
+
+def calc_crc5(bitstr):
+ poly5 = 0x25
+ crc5 = 0x1f
+ for bit in bitstr:
+ crc5 <<= 1
+ if (int(bit) != (crc5 >> 5)):
+ crc5 ^= poly5
+ crc5 &= 0x1f
+ crc5 ^= 0x1f
+ return reverse_number(crc5, 5)
+
+def calc_crc16(bitstr):
+ poly16 = 0x18005
+ crc16 = 0xffff
+ for bit in bitstr:
+ crc16 <<= 1
+ if (int(bit) != (crc16 >> 16)):
+ crc16 ^= poly16
+ crc16 &= 0xffff
+ crc16 ^= 0xffff
+ return reverse_number(crc16, 16)
+
class Decoder(srd.Decoder):
- api_version = 1
+ api_version = 2
id = 'usb_packet'
name = 'USB packet'
longname = 'Universal Serial Bus (LS/FS) packet'
('packet-invalid', 'Packet: Invalid'),
)
annotation_rows = (
- ('fields', 'Packet fields', tuple(range(11 + 1))),
- ('packet', 'Packets', tuple(range(12, 28 + 1))),
+ ('fields', 'Packet fields', tuple(range(10 + 1))),
+ ('packet', 'Packets', tuple(range(11, 28 + 1))),
)
def __init__(self):
- self.samplenum = 0
self.bits = []
self.packet = []
self.packet_summary = ''
for (bit, ss, es) in self.bits:
packet += bit
+ if len(packet) < 8:
+ self.putp([28, ['Invalid packet (shorter than 8 bits)']])
+ return
+
# Bits[0:7]: SYNC
sync = packet[:7 + 1]
self.ss, self.es = self.bits[0][1], self.bits[7][2]
self.putb([0, ['SYNC: %s' % sync, 'SYNC', 'S']])
self.packet.append(sync)
+ if len(packet) < 16:
+ self.putp([28, ['Invalid packet (shorter than 16 bits)']])
+ return
+
# Bits[8:15]: PID
pid = packet[8:15 + 1]
- pidname = pids.get(pid, (pid, ''))[0]
+ pidname = pids.get(pid, ('UNKNOWN', 'Unknown PID'))[0]
self.ss, self.es = self.bits[8][1], self.bits[15][2]
self.putpb(['PID', pidname])
self.putb([2, ['PID: %s' % pidname, pidname, pidname[0]]])
self.packet_summary += pidname
if pidname in ('OUT', 'IN', 'SOF', 'SETUP', 'PRE', 'PING'):
+ if len(packet) < 32:
+ self.putp([28, ['Invalid packet (shorter than 32 bits)']])
+ return
+
if pidname == 'SOF':
# Bits[16:26]: Framenum
framenum = bitstr_to_num(packet[16:26 + 1])
# Bits[27:31]: CRC5
crc5 = bitstr_to_num(packet[27:31 + 1])
+ crc5_calc = calc_crc5(packet[16:27])
self.ss, self.es = self.bits[27][1], self.bits[31][2]
- self.putpb(['CRC5', crc5])
- self.putb([6, ['CRC5: 0x%02X' % crc5, 'CRC5', 'C']])
+ if (crc5 == crc5_calc):
+ self.putpb(['CRC5', crc5])
+ self.putb([6, ['CRC5: 0x%02X' % crc5, 'CRC5', 'C']])
+ else:
+ self.putpb(['CRC5 ERROR', crc5])
+ self.putb([7, ['CRC5 ERROR: 0x%02X' % crc5, 'CRC5 ERR', 'CE', 'C']])
self.packet.append(crc5)
elif pidname in ('DATA0', 'DATA1', 'DATA2', 'MDATA'):
# Bits[16:packetlen-16]: Data
'DB: %02X' % db, '%02X' % db]])
databytes.append(db)
self.packet_summary += ' %02X' % db
- data = data[8:]
self.packet_summary += ' ]'
# Convenience Python output (no annotation) for all bytes together.
# Bits[packetlen-16:packetlen]: CRC16
crc16 = bitstr_to_num(packet[-16:])
+ crc16_calc = calc_crc16(packet[16:-16])
self.ss, self.es = self.bits[-16][1], self.bits[-1][2]
- self.putpb(['CRC16', crc16])
- self.putb([9, ['CRC16: 0x%04X' % crc16, 'CRC16', 'C']])
+ if (crc16 == crc16_calc):
+ self.putpb(['CRC16', crc16])
+ self.putb([9, ['CRC16: 0x%04X' % crc16, 'CRC16', 'C']])
+ else:
+ self.putpb(['CRC16 ERROR', crc16])
+ self.putb([10, ['CRC16 ERROR: 0x%04X' % crc16, 'CRC16 ERR', 'CE', 'C']])
self.packet.append(crc16)
elif pidname in ('ACK', 'NAK', 'STALL', 'NYET', 'ERR'):
pass # Nothing to do, these only have SYNC+PID+EOP fields.
elif ptype == 'EOP':
self.es_packet = es
self.handle_packet()
+ self.packet, self.packet_summary = [], ''
self.bits, self.state = [], 'WAIT FOR SOP'
else:
pass # TODO: Error
- else:
- raise Exception('Invalid state: %s' % self.state)
-