2 * This file is part of the sigrok project.
4 * Copyright (C) 2010-2012 Bert Vermeulen <bert@biot.com>
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
21 #include <arpa/inet.h>
23 extern SR_PRIV struct sr_dev_driver link_mso19_driver_info;
24 static struct sr_dev_driver *di = &link_mso19_driver_info;
26 SR_PRIV int mso_send_control_message(struct sr_serial_dev_inst *serial,
27 uint16_t payload[], int n)
29 int i, w, ret, s = n * 2 + sizeof(mso_head) + sizeof(mso_foot);
37 if (!(buf = g_try_malloc(s))) {
38 sr_err("Failed to malloc message buffer.");
44 memcpy(p, mso_head, sizeof(mso_head));
45 p += sizeof(mso_head);
47 for (i = 0; i < n; i++) {
48 *(uint16_t *) p = htons(payload[i]);
51 memcpy(p, mso_foot, sizeof(mso_foot));
55 ret = serial_write(serial, buf + w, s - w);
70 SR_PRIV int mso_configure_trigger(struct sr_dev_inst *sdi)
72 struct dev_context *devc = sdi->priv;
74 uint16_t dso_trigger = mso_calc_raw_from_mv(devc);
77 if ((!devc->trigger_slope && devc->trigger_chan == 1) ||
78 (devc->trigger_slope &&
79 (devc->trigger_chan == 0 ||
80 devc->trigger_chan == 2 ||
81 devc->trigger_chan == 3)))
84 switch (devc->trigger_chan) {
86 dso_trigger |= 0xe000;
88 dso_trigger |= 0x4000;
91 dso_trigger |= 0x2000;
94 dso_trigger |= 0xa000;
97 dso_trigger |= 0x8000;
104 switch (devc->trigger_outsrc) {
106 dso_trigger |= 0x800;
109 dso_trigger |= 0x1000;
112 dso_trigger |= 0x1800;
117 ops[0] = mso_trans(5, devc->la_trigger);
118 ops[1] = mso_trans(6, devc->la_trigger_mask);
119 ops[2] = mso_trans(3, dso_trigger & 0xff);
120 ops[3] = mso_trans(4, (dso_trigger >> 8) & 0xff);
121 ops[4] = mso_trans(11,
122 devc->dso_trigger_width / SR_HZ_TO_NS(devc->cur_rate));
124 /* Select the SPI/I2C trigger config bank */
125 ops[5] = mso_trans(REG_CTL2, (devc->ctlbase2 | BITS_CTL2_BANK(2)));
126 /* Configure the SPI/I2C protocol trigger */
127 ops[6] = mso_trans(REG_PT_WORD(0), devc->protocol_trigger.word[0]);
128 ops[7] = mso_trans(REG_PT_WORD(1), devc->protocol_trigger.word[1]);
129 ops[8] = mso_trans(REG_PT_WORD(2), devc->protocol_trigger.word[2]);
130 ops[9] = mso_trans(REG_PT_WORD(3), devc->protocol_trigger.word[3]);
131 ops[10] = mso_trans(REG_PT_MASK(0), devc->protocol_trigger.mask[0]);
132 ops[11] = mso_trans(REG_PT_MASK(1), devc->protocol_trigger.mask[1]);
133 ops[12] = mso_trans(REG_PT_MASK(2), devc->protocol_trigger.mask[2]);
134 ops[13] = mso_trans(REG_PT_MASK(3), devc->protocol_trigger.mask[3]);
135 ops[14] = mso_trans(REG_PT_SPIMODE, devc->protocol_trigger.spimode);
136 /* Select the default config bank */
137 ops[15] = mso_trans(REG_CTL2, devc->ctlbase2);
139 return mso_send_control_message(devc->serial, ARRAY_AND_SIZE(ops));
142 SR_PRIV int mso_configure_threshold_level(struct sr_dev_inst *sdi)
144 struct dev_context *devc = sdi->priv;
146 return mso_dac_out(sdi, la_threshold_map[devc->la_threshold]);
149 SR_PRIV int mso_read_buffer(struct sr_dev_inst *sdi)
151 uint16_t ops[] = { mso_trans(REG_BUFFER, 0) };
152 struct dev_context *devc = sdi->priv;
154 sr_dbg("Requesting buffer dump.");
155 return mso_send_control_message(devc->serial, ARRAY_AND_SIZE(ops));
158 SR_PRIV int mso_arm(struct sr_dev_inst *sdi)
160 struct dev_context *devc = sdi->priv;
162 mso_trans(REG_CTL1, devc->ctlbase1 | BIT_CTL1_RESETFSM),
163 mso_trans(REG_CTL1, devc->ctlbase1 | BIT_CTL1_ARM),
164 mso_trans(REG_CTL1, devc->ctlbase1),
167 sr_dbg("Requesting trigger arm.");
168 return mso_send_control_message(devc->serial, ARRAY_AND_SIZE(ops));
171 SR_PRIV int mso_force_capture(struct sr_dev_inst *sdi)
173 struct dev_context *devc = sdi->priv;
175 mso_trans(REG_CTL1, devc->ctlbase1 | 8),
176 mso_trans(REG_CTL1, devc->ctlbase1),
179 sr_dbg("Requesting forced capture.");
180 return mso_send_control_message(devc->serial, ARRAY_AND_SIZE(ops));
183 SR_PRIV int mso_dac_out(struct sr_dev_inst *sdi, uint16_t val)
185 struct dev_context *devc = sdi->priv;
187 mso_trans(REG_DAC1, (val >> 8) & 0xff),
188 mso_trans(REG_DAC2, val & 0xff),
189 mso_trans(REG_CTL1, devc->ctlbase1 | BIT_CTL1_RESETADC),
192 sr_dbg("Setting dac word to 0x%x.", val);
193 return mso_send_control_message(devc->serial, ARRAY_AND_SIZE(ops));
196 SR_PRIV inline uint16_t mso_calc_raw_from_mv(struct dev_context *devc)
198 return (uint16_t) (0x200 -
199 ((devc->dso_trigger_voltage / devc->dso_probe_attn) /
204 SR_PRIV int mso_parse_serial(const char *iSerial, const char *iProduct,
205 struct dev_context *devc)
207 unsigned int u1, u2, u3, u4, u5, u6;
210 /* FIXME: This code is in the original app, but I think its
211 * used only for the GUI */
212 /* if (strstr(iProduct, "REV_02") || strstr(iProduct, "REV_03"))
213 devc->num_sample_rates = 0x16;
215 devc->num_sample_rates = 0x10; */
219 if (iSerial[0] != '4' || sscanf(iSerial, "%5u%3u%3u%1u%1u%6u",
220 &u1, &u2, &u3, &u4, &u5, &u6) != 6)
224 devc->vbit = u1 / 10000;
226 devc->vbit = 4.19195;
227 devc->dac_offset = u2;
228 if (devc->dac_offset == 0)
229 devc->dac_offset = 0x1ff;
230 devc->offset_range = u3;
231 if (devc->offset_range == 0)
232 devc->offset_range = 0x17d;
235 * FIXME: There is more code on the original software to handle
236 * bigger iSerial strings, but as I can't test on my device
237 * I will not implement it yet
243 SR_PRIV int mso_reset_adc(struct sr_dev_inst *sdi)
245 struct dev_context *devc = sdi->priv;
248 ops[0] = mso_trans(REG_CTL1, (devc->ctlbase1 | BIT_CTL1_RESETADC));
249 ops[1] = mso_trans(REG_CTL1, devc->ctlbase1);
250 devc->ctlbase1 |= BIT_CTL1_ADC_UNKNOWN4;
252 sr_dbg("Requesting ADC reset.");
253 return mso_send_control_message(devc->serial, ARRAY_AND_SIZE(ops));
256 SR_PRIV int mso_reset_fsm(struct sr_dev_inst *sdi)
258 struct dev_context *devc = sdi->priv;
261 devc->ctlbase1 |= BIT_CTL1_RESETFSM;
262 ops[0] = mso_trans(REG_CTL1, devc->ctlbase1);
264 sr_dbg("Requesting ADC reset.");
265 return mso_send_control_message(devc->serial, ARRAY_AND_SIZE(ops));
268 SR_PRIV int mso_toggle_led(struct sr_dev_inst *sdi, int state)
270 struct dev_context *devc = sdi->priv;
273 devc->ctlbase1 &= ~BIT_CTL1_LED;
275 devc->ctlbase1 |= BIT_CTL1_LED;
276 ops[0] = mso_trans(REG_CTL1, devc->ctlbase1);
278 sr_dbg("Requesting LED toggle.");
279 return mso_send_control_message(devc->serial, ARRAY_AND_SIZE(ops));
282 SR_PRIV void stop_acquisition(const struct sr_dev_inst *sdi)
284 struct sr_datafeed_packet packet;
285 struct dev_context *devc;
288 sr_source_remove(devc->serial->fd);
290 /* Terminate session */
291 packet.type = SR_DF_END;
292 sr_session_send(sdi, &packet);
295 SR_PRIV int mso_clkrate_out(struct sr_serial_dev_inst *serial, uint16_t val)
298 mso_trans(REG_CLKRATE1, (val >> 8) & 0xff),
299 mso_trans(REG_CLKRATE2, val & 0xff),
302 sr_dbg("Setting clkrate word to 0x%x.", val);
303 return mso_send_control_message(serial, ARRAY_AND_SIZE(ops));
306 SR_PRIV int mso_configure_rate(struct sr_dev_inst *sdi, uint32_t rate)
308 struct dev_context *devc = sdi->priv;
312 for (i = 0; i < ARRAY_SIZE(rate_map); i++) {
313 if (rate_map[i].rate == rate) {
314 devc->ctlbase2 = rate_map[i].slowmode;
315 ret = mso_clkrate_out(devc->serial, rate_map[i].val);
317 devc->cur_rate = rate;
323 sr_err("Unsupported rate.");
332 SR_PRIV int mso_check_trigger(struct sr_serial_dev_inst *serial, uint8_t *info)
334 uint16_t ops[] = { mso_trans(REG_TRIGGER, 0) };
337 sr_dbg("Requesting trigger state.");
338 ret = mso_send_control_message(serial, ARRAY_AND_SIZE(ops));
339 if (info == NULL || ret != SR_OK)
344 if (serial_read(serial, &buf, 1) != 1) /* FIXME: Need timeout */
348 sr_dbg("Trigger state is: 0x%x.", *info);
352 SR_PRIV int mso_receive_data(int fd, int revents, void *cb_data)
355 struct sr_datafeed_packet packet;
356 struct sr_datafeed_logic logic;
357 struct sr_dev_inst *sdi;
361 struct drv_context *drvc = di->priv;
363 /* Find this device's devc struct by its fd. */
364 struct dev_context *devc = NULL;
365 for (l = drvc->instances; l; l = l->next) {
368 if (devc->serial->fd == fd)
373 /* Shouldn't happen. */
379 size_t s = serial_read(devc->serial, in, sizeof(in));
384 if (devc->trigger_state != MSO_TRIGGER_DATAREADY) {
385 devc->trigger_state = in[0];
386 if (devc->trigger_state == MSO_TRIGGER_DATAREADY) {
387 mso_read_buffer(sdi);
390 mso_check_trigger(devc->serial, NULL);
395 /* the hardware always dumps 1024 samples, 24bits each */
396 if (devc->buffer_n < 3072) {
397 memcpy(devc->buffer + devc->buffer_n, in, s);
400 if (devc->buffer_n < 3072)
403 /* do the conversion */
404 uint8_t logic_out[1024];
405 double analog_out[1024];
406 for (i = 0; i < 1024; i++) {
407 /* FIXME: Need to do conversion to mV */
408 analog_out[i] = (devc->buffer[i * 3] & 0x3f) |
409 ((devc->buffer[i * 3 + 1] & 0xf) << 6);
410 logic_out[i] = ((devc->buffer[i * 3 + 1] & 0x30) >> 4) |
411 ((devc->buffer[i * 3 + 2] & 0x3f) << 2);
414 packet.type = SR_DF_LOGIC;
415 packet.payload = &logic;
418 logic.data = logic_out;
419 sr_session_send(cb_data, &packet);
421 // Dont bother fixing this yet, keep it "old style"
423 packet.type = SR_DF_ANALOG;
424 packet.length = 1024;
425 packet.unitsize = sizeof(double);
426 packet.payload = analog_out;
427 sr_session_send(ctx->session_dev_id, &packet);
430 packet.type = SR_DF_END;
431 sr_session_send(devc->session_dev_id, &packet);