[libsigrok.git] / hardware / link-mso19 / protocol.c

/*
 * This file is part of the sigrok project.
 *
 * Copyright (C) 2010-2012 Bert Vermeulen <bert@biot.com>
 *
 * This program is free software: you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation, either version 3 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */

#include "protocol.h"
#include <arpa/inet.h>

extern SR_PRIV struct sr_dev_driver link_mso19_driver_info;
static struct sr_dev_driver *di = &link_mso19_driver_info;

SR_PRIV int mso_send_control_message(struct sr_serial_dev_inst *serial,
    uint16_t payload[], int n)
{
	int i, w, ret, s = n * 2 + sizeof(mso_head) + sizeof(mso_foot);
	char *p, *buf;

	ret = SR_ERR;

	if (serial->fd < 0)
		goto ret;

	if (!(buf = g_try_malloc(s))) {
		sr_err("Failed to malloc message buffer.");
		ret = SR_ERR_MALLOC;
		goto ret;
	}

	p = buf;
	memcpy(p, mso_head, sizeof(mso_head));
	p += sizeof(mso_head);

	for (i = 0; i < n; i++) {
		*(uint16_t *) p = htons(payload[i]);
		p += 2;
	}
	memcpy(p, mso_foot, sizeof(mso_foot));

	w = 0;
	while (w < s) {
		ret = serial_write(serial, buf + w, s - w);
		if (ret < 0) {
			ret = SR_ERR;
			goto free;
		}
		w += ret;
	}
	ret = SR_OK;
free:
	g_free(buf);
ret:
	return ret;
}


SR_PRIV int mso_configure_trigger(struct sr_dev_inst *sdi)
{
	struct dev_context *devc = sdi->priv;
	uint16_t ops[16];
	uint16_t dso_trigger = mso_calc_raw_from_mv(devc);

	dso_trigger &= 0x3ff;
	if ((!devc->trigger_slope && devc->trigger_chan == 1) ||
			(devc->trigger_slope &&
			 (devc->trigger_chan == 0 ||
			  devc->trigger_chan == 2 ||
			  devc->trigger_chan == 3)))
		dso_trigger |= 0x400;

	switch (devc->trigger_chan) {
	case 1:
		dso_trigger |= 0xe000;
	case 2:
		dso_trigger |= 0x4000;
		break;
	case 3:
		dso_trigger |= 0x2000;
		break;
	case 4:
		dso_trigger |= 0xa000;
		break;
	case 5:
		dso_trigger |= 0x8000;
		break;
	default:
	case 0:
		break;
	}

	switch (devc->trigger_outsrc) {
	case 1:
		dso_trigger |= 0x800;
		break;
	case 2:
		dso_trigger |= 0x1000;
		break;
	case 3:
		dso_trigger |= 0x1800;
		break;

	}

	ops[0] = mso_trans(5, devc->la_trigger);
	ops[1] = mso_trans(6, devc->la_trigger_mask);
	ops[2] = mso_trans(3, dso_trigger & 0xff);
	ops[3] = mso_trans(4, (dso_trigger >> 8) & 0xff);
	ops[4] = mso_trans(11,
			devc->dso_trigger_width / SR_HZ_TO_NS(devc->cur_rate));

	/* Select the SPI/I2C trigger config bank */
	ops[5] = mso_trans(REG_CTL2, (devc->ctlbase2 | BITS_CTL2_BANK(2)));
	/* Configure the SPI/I2C protocol trigger */
	ops[6] = mso_trans(REG_PT_WORD(0), devc->protocol_trigger.word[0]);
	ops[7] = mso_trans(REG_PT_WORD(1), devc->protocol_trigger.word[1]);
	ops[8] = mso_trans(REG_PT_WORD(2), devc->protocol_trigger.word[2]);
	ops[9] = mso_trans(REG_PT_WORD(3), devc->protocol_trigger.word[3]);
	ops[10] = mso_trans(REG_PT_MASK(0), devc->protocol_trigger.mask[0]);
	ops[11] = mso_trans(REG_PT_MASK(1), devc->protocol_trigger.mask[1]);
	ops[12] = mso_trans(REG_PT_MASK(2), devc->protocol_trigger.mask[2]);
	ops[13] = mso_trans(REG_PT_MASK(3), devc->protocol_trigger.mask[3]);
	ops[14] = mso_trans(REG_PT_SPIMODE, devc->protocol_trigger.spimode);
	/* Select the default config bank */
	ops[15] = mso_trans(REG_CTL2, devc->ctlbase2);

	return mso_send_control_message(devc->serial, ARRAY_AND_SIZE(ops));
}

SR_PRIV int mso_configure_threshold_level(struct sr_dev_inst *sdi)
{
	struct dev_context *devc = sdi->priv;

	return mso_dac_out(sdi, la_threshold_map[devc->la_threshold]);
}

SR_PRIV int mso_read_buffer(struct sr_dev_inst *sdi)
{
	uint16_t ops[] = { mso_trans(REG_BUFFER, 0) };
	struct dev_context *devc = sdi->priv;

	sr_dbg("Requesting buffer dump.");
	return mso_send_control_message(devc->serial, ARRAY_AND_SIZE(ops));
}

SR_PRIV int mso_arm(struct sr_dev_inst *sdi)
{
	struct dev_context *devc = sdi->priv;
	uint16_t ops[] = {
		mso_trans(REG_CTL1, devc->ctlbase1 | BIT_CTL1_RESETFSM),
		mso_trans(REG_CTL1, devc->ctlbase1 | BIT_CTL1_ARM),
		mso_trans(REG_CTL1, devc->ctlbase1),
	};

	sr_dbg("Requesting trigger arm.");
	return mso_send_control_message(devc->serial, ARRAY_AND_SIZE(ops));
}

SR_PRIV int mso_force_capture(struct sr_dev_inst *sdi)
{
	struct dev_context *devc = sdi->priv;
	uint16_t ops[] = {
		mso_trans(REG_CTL1, devc->ctlbase1 | 8),
		mso_trans(REG_CTL1, devc->ctlbase1),
	};

	sr_dbg("Requesting forced capture.");
	return mso_send_control_message(devc->serial, ARRAY_AND_SIZE(ops));
}

SR_PRIV int mso_dac_out(struct sr_dev_inst *sdi, uint16_t val)
{
	struct dev_context *devc = sdi->priv;
	uint16_t ops[] = {
		mso_trans(REG_DAC1, (val >> 8) & 0xff),
		mso_trans(REG_DAC2, val & 0xff),
		mso_trans(REG_CTL1, devc->ctlbase1 | BIT_CTL1_RESETADC),
	};

	sr_dbg("Setting dac word to 0x%x.", val);
	return mso_send_control_message(devc->serial, ARRAY_AND_SIZE(ops));
}

SR_PRIV inline uint16_t mso_calc_raw_from_mv(struct dev_context *devc)
{
	return (uint16_t) (0x200 -
			((devc->dso_trigger_voltage / devc->dso_probe_attn) /
			 devc->vbit));
}


SR_PRIV int mso_parse_serial(const char *iSerial, const char *iProduct,
    struct dev_context *devc)
{
	unsigned int u1, u2, u3, u4, u5, u6;

  iProduct = iProduct;
  /* FIXME: This code is in the original app, but I think its
   * used only for the GUI */
  /*	if (strstr(iProduct, "REV_02") || strstr(iProduct, "REV_03"))
      devc->num_sample_rates = 0x16;
      else
      devc->num_sample_rates = 0x10; */
  

	/* parse iSerial */
	if (iSerial[0] != '4' || sscanf(iSerial, "%5u%3u%3u%1u%1u%6u",
				&u1, &u2, &u3, &u4, &u5, &u6) != 6)
		return SR_ERR;
	devc->hwmodel = u4;
	devc->hwrev = u5;
	devc->vbit = u1 / 10000;
	if (devc->vbit == 0)
		devc->vbit = 4.19195;
	devc->dac_offset = u2;
	if (devc->dac_offset == 0)
		devc->dac_offset = 0x1ff;
	devc->offset_range = u3;
	if (devc->offset_range == 0)
		devc->offset_range = 0x17d;

	/*
	 * FIXME: There is more code on the original software to handle
	 * bigger iSerial strings, but as I can't test on my device
	 * I will not implement it yet
	 */

	return SR_OK;
}

SR_PRIV int mso_reset_adc(struct sr_dev_inst *sdi)
{
	struct dev_context *devc = sdi->priv;
	uint16_t ops[2];

	ops[0] = mso_trans(REG_CTL1, (devc->ctlbase1 | BIT_CTL1_RESETADC));
	ops[1] = mso_trans(REG_CTL1, devc->ctlbase1);
	devc->ctlbase1 |= BIT_CTL1_ADC_UNKNOWN4;

	sr_dbg("Requesting ADC reset.");
	return mso_send_control_message(devc->serial, ARRAY_AND_SIZE(ops));
}

SR_PRIV int mso_reset_fsm(struct sr_dev_inst *sdi)
{
	struct dev_context *devc = sdi->priv;
	uint16_t ops[1];

	devc->ctlbase1 |= BIT_CTL1_RESETFSM;
	ops[0] = mso_trans(REG_CTL1, devc->ctlbase1);

	sr_dbg("Requesting ADC reset.");
	return mso_send_control_message(devc->serial, ARRAY_AND_SIZE(ops));
}

SR_PRIV int mso_toggle_led(struct sr_dev_inst *sdi, int state)
{
	struct dev_context *devc = sdi->priv;
	uint16_t ops[1];

	devc->ctlbase1 &= ~BIT_CTL1_LED;
	if (state)
		devc->ctlbase1 |= BIT_CTL1_LED;
	ops[0] = mso_trans(REG_CTL1, devc->ctlbase1);

	sr_dbg("Requesting LED toggle.");
	return mso_send_control_message(devc->serial, ARRAY_AND_SIZE(ops));
}

SR_PRIV void stop_acquisition(const struct sr_dev_inst *sdi)
{
	struct sr_datafeed_packet packet;
	struct dev_context *devc;

	devc = sdi->priv;
	sr_source_remove(devc->serial->fd);

	/* Terminate session */
	packet.type = SR_DF_END;
	sr_session_send(sdi, &packet);
}

SR_PRIV int mso_clkrate_out(struct sr_serial_dev_inst *serial, uint16_t val)
{
	uint16_t ops[] = {
		mso_trans(REG_CLKRATE1, (val >> 8) & 0xff),
		mso_trans(REG_CLKRATE2, val & 0xff),
	};

	sr_dbg("Setting clkrate word to 0x%x.", val);
	return mso_send_control_message(serial, ARRAY_AND_SIZE(ops));
}

SR_PRIV int mso_configure_rate(struct sr_dev_inst *sdi, uint32_t rate)
{
	struct dev_context *devc = sdi->priv;
	unsigned int i;
	int ret = SR_ERR;

	for (i = 0; i < ARRAY_SIZE(rate_map); i++) {
		if (rate_map[i].rate == rate) {
			devc->ctlbase2 = rate_map[i].slowmode;
			ret = mso_clkrate_out(devc->serial, rate_map[i].val);
			if (ret == SR_OK)
				devc->cur_rate = rate;
			return ret;
		}
	}

  if (ret != SR_OK)
		sr_err("Unsupported rate.");

	return ret;
}


SR_PRIV int mso_check_trigger(struct sr_serial_dev_inst *serial, uint8_t *info)
{
	uint16_t ops[] = { mso_trans(REG_TRIGGER, 0) };
	int ret;

	sr_dbg("Requesting trigger state.");
	ret = mso_send_control_message(serial, ARRAY_AND_SIZE(ops));
	if (info == NULL || ret != SR_OK)
		return ret;


  uint8_t buf = 0;
	if (serial_read(serial, &buf, 1) != 1) /* FIXME: Need timeout */
		ret = SR_ERR;
	*info = buf;

	sr_dbg("Trigger state is: 0x%x.", *info);
	return ret;
}

SR_PRIV int mso_receive_data(int fd, int revents, void *cb_data)
{

	struct sr_datafeed_packet packet;
	struct sr_datafeed_logic logic;
	struct sr_dev_inst *sdi;
	GSList *l;
	int i;

	struct drv_context *drvc = di->priv;

	/* Find this device's devc struct by its fd. */
	struct dev_context *devc = NULL;
	for (l = drvc->instances; l; l = l->next) {
		sdi = l->data;
		devc = sdi->priv;
		if (devc->serial->fd == fd)
			break;
		devc = NULL;
	}
	if (!devc)
		/* Shouldn't happen. */
		return TRUE;

	(void)revents;

	uint8_t in[1024];
	size_t s = serial_read(devc->serial, in, sizeof(in));
	if (s <= 0)
		return FALSE;
  
  /* No samples */
  if (devc->trigger_state != MSO_TRIGGER_DATAREADY) {
    devc->trigger_state = in[0];
    if (devc->trigger_state == MSO_TRIGGER_DATAREADY) {
      mso_read_buffer(sdi);
      devc->buffer_n = 0;
    } else {
      mso_check_trigger(devc->serial, NULL);
    }
    return FALSE;
  }

	/* the hardware always dumps 1024 samples, 24bits each */
	if (devc->buffer_n < 3072) {
		memcpy(devc->buffer + devc->buffer_n, in, s);
		devc->buffer_n += s;
	}
	if (devc->buffer_n < 3072)
		return FALSE;

	/* do the conversion */
	uint8_t logic_out[1024];
	double analog_out[1024];
	for (i = 0; i < 1024; i++) {
		/* FIXME: Need to do conversion to mV */
		analog_out[i] = (devc->buffer[i * 3] & 0x3f) |
			((devc->buffer[i * 3 + 1] & 0xf) << 6);
		logic_out[i] = ((devc->buffer[i * 3 + 1] & 0x30) >> 4) |
			((devc->buffer[i * 3 + 2] & 0x3f) << 2);
	}

	packet.type = SR_DF_LOGIC;
	packet.payload = &logic;
	logic.length = 1024;
	logic.unitsize = 1;
	logic.data = logic_out;
	sr_session_send(cb_data, &packet);

	// Dont bother fixing this yet, keep it "old style"
	/*
	packet.type = SR_DF_ANALOG;
	packet.length = 1024;
	packet.unitsize = sizeof(double);
	packet.payload = analog_out;
	sr_session_send(ctx->session_dev_id, &packet);
	*/

	packet.type = SR_DF_END;
	sr_session_send(devc->session_dev_id, &packet);

  return TRUE;
}
Commit	Line	Data
df92e5cf	1	/*
	2	* This file is part of the sigrok project.
	3	*
	4	* Copyright (C) 2010-2012 Bert Vermeulen <bert@biot.com>
	5	*
	6	* This program is free software: you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation, either version 3 of the License, or
	9	* (at your option) any later version.
	10	*
	11	* This program is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	* GNU General Public License for more details.
	15	*
	16	* You should have received a copy of the GNU General Public License
	17	* along with this program. If not, see <http://www.gnu.org/licenses/>.
	18	*/
	19
	20	#include "protocol.h"
4db2aaff	21	#include <arpa/inet.h>
df92e5cf	22
	23	extern SR_PRIV struct sr_dev_driver link_mso19_driver_info;
	24	static struct sr_dev_driver *di = &link_mso19_driver_info;
	25
4db2aaff	26	SR_PRIV int mso_send_control_message(struct sr_serial_dev_inst *serial,
	27	uint16_t payload[], int n)
	28	{
	29	int i, w, ret, s = n * 2 + sizeof(mso_head) + sizeof(mso_foot);
	30	char p, buf;
	31
	32	ret = SR_ERR;
	33
	34	if (serial->fd < 0)
	35	goto ret;
	36
	37	if (!(buf = g_try_malloc(s))) {
	38	sr_err("Failed to malloc message buffer.");
	39	ret = SR_ERR_MALLOC;
	40	goto ret;
	41	}
	42
	43	p = buf;
	44	memcpy(p, mso_head, sizeof(mso_head));
	45	p += sizeof(mso_head);
	46
	47	for (i = 0; i < n; i++) {
	48	(uint16_t ) p = htons(payload[i]);
	49	p += 2;
	50	}
	51	memcpy(p, mso_foot, sizeof(mso_foot));
	52
	53	w = 0;
	54	while (w < s) {
	55	ret = serial_write(serial, buf + w, s - w);
	56	if (ret < 0) {
	57	ret = SR_ERR;
	58	goto free;
	59	}
	60	w += ret;
	61	}
	62	ret = SR_OK;
	63	free:
	64	g_free(buf);
	65	ret:
	66	return ret;
	67	}
	68
	69
4b719338	70	SR_PRIV int mso_configure_trigger(struct sr_dev_inst *sdi)
	71	{
	72	struct dev_context *devc = sdi->priv;
	73	uint16_t ops[16];
	74	uint16_t dso_trigger = mso_calc_raw_from_mv(devc);
	75
	76	dso_trigger &= 0x3ff;
	77	if ((!devc->trigger_slope && devc->trigger_chan == 1) \|\|
	78	(devc->trigger_slope &&
	79	(devc->trigger_chan == 0 \|\|
	80	devc->trigger_chan == 2 \|\|
	81	devc->trigger_chan == 3)))
	82	dso_trigger \|= 0x400;
	83
	84	switch (devc->trigger_chan) {
	85	case 1:
	86	dso_trigger \|= 0xe000;
	87	case 2:
	88	dso_trigger \|= 0x4000;
	89	break;
	90	case 3:
	91	dso_trigger \|= 0x2000;
	92	break;
	93	case 4:
	94	dso_trigger \|= 0xa000;
	95	break;
	96	case 5:
	97	dso_trigger \|= 0x8000;
	98	break;
	99	default:
	100	case 0:
	101	break;
	102	}
	103
	104	switch (devc->trigger_outsrc) {
	105	case 1:
	106	dso_trigger \|= 0x800;
	107	break;
	108	case 2:
	109	dso_trigger \|= 0x1000;
	110	break;
	111	case 3:
	112	dso_trigger \|= 0x1800;
	113	break;
	114
	115	}
	116
	117	ops[0] = mso_trans(5, devc->la_trigger);
	118	ops[1] = mso_trans(6, devc->la_trigger_mask);
	119	ops[2] = mso_trans(3, dso_trigger & 0xff);
	120	ops[3] = mso_trans(4, (dso_trigger >> 8) & 0xff);
	121	ops[4] = mso_trans(11,
	122	devc->dso_trigger_width / SR_HZ_TO_NS(devc->cur_rate));
	123
	124	/* Select the SPI/I2C trigger config bank */
	125	ops[5] = mso_trans(REG_CTL2, (devc->ctlbase2 \| BITS_CTL2_BANK(2)));
	126	/* Configure the SPI/I2C protocol trigger */
	127	ops[6] = mso_trans(REG_PT_WORD(0), devc->protocol_trigger.word[0]);
	128	ops[7] = mso_trans(REG_PT_WORD(1), devc->protocol_trigger.word[1]);
	129	ops[8] = mso_trans(REG_PT_WORD(2), devc->protocol_trigger.word[2]);
	130	ops[9] = mso_trans(REG_PT_WORD(3), devc->protocol_trigger.word[3]);
	131	ops[10] = mso_trans(REG_PT_MASK(0), devc->protocol_trigger.mask[0]);
	132	ops[11] = mso_trans(REG_PT_MASK(1), devc->protocol_trigger.mask[1]);
	133	ops[12] = mso_trans(REG_PT_MASK(2), devc->protocol_trigger.mask[2]);
134	ops[13] = mso_trans(REG_PT_MASK(3), devc->protocol_trigger.mask[3]);
135	ops[14] = mso_trans(REG_PT_SPIMODE, devc->protocol_trigger.spimode);
136	/* Select the default config bank */
137	ops[15] = mso_trans(REG_CTL2, devc->ctlbase2);
138
4db2aaff	139	return mso_send_control_message(devc->serial, ARRAY_AND_SIZE(ops));
4b719338	140	}
	141
	142	SR_PRIV int mso_configure_threshold_level(struct sr_dev_inst *sdi)
	143	{
	144	struct dev_context *devc = sdi->priv;
	145
	146	return mso_dac_out(sdi, la_threshold_map[devc->la_threshold]);
	147	}
	148
	149	SR_PRIV int mso_read_buffer(struct sr_dev_inst *sdi)
	150	{
	151	uint16_t ops[] = { mso_trans(REG_BUFFER, 0) };
	152	struct dev_context *devc = sdi->priv;
	153
	154	sr_dbg("Requesting buffer dump.");
	155	return mso_send_control_message(devc->serial, ARRAY_AND_SIZE(ops));
	156	}
	157
	158	SR_PRIV int mso_arm(struct sr_dev_inst *sdi)
	159	{
	160	struct dev_context *devc = sdi->priv;
	161	uint16_t ops[] = {
	162	mso_trans(REG_CTL1, devc->ctlbase1 \| BIT_CTL1_RESETFSM),
	163	mso_trans(REG_CTL1, devc->ctlbase1 \| BIT_CTL1_ARM),
	164	mso_trans(REG_CTL1, devc->ctlbase1),
	165	};
	166
	167	sr_dbg("Requesting trigger arm.");
	168	return mso_send_control_message(devc->serial, ARRAY_AND_SIZE(ops));
	169	}
	170
	171	SR_PRIV int mso_force_capture(struct sr_dev_inst *sdi)
	172	{
	173	struct dev_context *devc = sdi->priv;
	174	uint16_t ops[] = {
	175	mso_trans(REG_CTL1, devc->ctlbase1 \| 8),
	176	mso_trans(REG_CTL1, devc->ctlbase1),
	177	};
	178
	179	sr_dbg("Requesting forced capture.");
	180	return mso_send_control_message(devc->serial, ARRAY_AND_SIZE(ops));
	181	}
	182
	183	SR_PRIV int mso_dac_out(struct sr_dev_inst *sdi, uint16_t val)
	184	{
	185	struct dev_context *devc = sdi->priv;
	186	uint16_t ops[] = {
	187	mso_trans(REG_DAC1, (val >> 8) & 0xff),
	188	mso_trans(REG_DAC2, val & 0xff),
	189	mso_trans(REG_CTL1, devc->ctlbase1 \| BIT_CTL1_RESETADC),
	190	};
	191
	192	sr_dbg("Setting dac word to 0x%x.", val);
	193	return mso_send_control_message(devc->serial, ARRAY_AND_SIZE(ops));
	194	}
	195
	196	SR_PRIV inline uint16_t mso_calc_raw_from_mv(struct dev_context *devc)
	197	{
	198	return (uint16_t) (0x200 -
	199	((devc->dso_trigger_voltage / devc->dso_probe_attn) /
	200	devc->vbit));
	201	}
	202
	203
df92e5cf	204	SR_PRIV int mso_parse_serial(const char iSerial, const char iProduct,
	205	struct dev_context *devc)
	206	{
	207	unsigned int u1, u2, u3, u4, u5, u6;
	208
	209	iProduct = iProduct;
	210	/* FIXME: This code is in the original app, but I think its
	211	* used only for the GUI */
	212	/* if (strstr(iProduct, "REV_02") \|\| strstr(iProduct, "REV_03"))
	213	devc->num_sample_rates = 0x16;
	214	else
	215	devc->num_sample_rates = 0x10; */
	216
	217
	218	/* parse iSerial */
	219	if (iSerial[0] != '4' \|\| sscanf(iSerial, "%5u%3u%3u%1u%1u%6u",
	220	&u1, &u2, &u3, &u4, &u5, &u6) != 6)
	221	return SR_ERR;
	222	devc->hwmodel = u4;
	223	devc->hwrev = u5;
df92e5cf	224	devc->vbit = u1 / 10000;
	225	if (devc->vbit == 0)
	226	devc->vbit = 4.19195;
	227	devc->dac_offset = u2;
	228	if (devc->dac_offset == 0)
	229	devc->dac_offset = 0x1ff;
	230	devc->offset_range = u3;
	231	if (devc->offset_range == 0)
	232	devc->offset_range = 0x17d;
	233
	234	/*
	235	* FIXME: There is more code on the original software to handle
	236	* bigger iSerial strings, but as I can't test on my device
	237	* I will not implement it yet
	238	*/
	239
	240	return SR_OK;
	241	}
	242
4db2aaff	243	SR_PRIV int mso_reset_adc(struct sr_dev_inst *sdi)
df92e5cf	244	{
4db2aaff	245	struct dev_context *devc = sdi->priv;
4db2aaff	246	uint16_t ops[2];
df92e5cf	247
4db2aaff	248	ops[0] = mso_trans(REG_CTL1, (devc->ctlbase1 \| BIT_CTL1_RESETADC));
	249	ops[1] = mso_trans(REG_CTL1, devc->ctlbase1);
	250	devc->ctlbase1 \|= BIT_CTL1_ADC_UNKNOWN4;
df92e5cf	251
4db2aaff	252	sr_dbg("Requesting ADC reset.");
	253	return mso_send_control_message(devc->serial, ARRAY_AND_SIZE(ops));
	254	}
df92e5cf	255
4db2aaff	256	SR_PRIV int mso_reset_fsm(struct sr_dev_inst *sdi)
	257	{
	258	struct dev_context *devc = sdi->priv;
	259	uint16_t ops[1];
df92e5cf	260
4db2aaff	261	devc->ctlbase1 \|= BIT_CTL1_RESETFSM;
4db2aaff	262	ops[0] = mso_trans(REG_CTL1, devc->ctlbase1);
df92e5cf	263
4db2aaff	264	sr_dbg("Requesting ADC reset.");
4db2aaff	265	return mso_send_control_message(devc->serial, ARRAY_AND_SIZE(ops));
df92e5cf	266	}
df92e5cf	267
4db2aaff	268	SR_PRIV int mso_toggle_led(struct sr_dev_inst *sdi, int state)
df92e5cf	269	{
df92e5cf	270	struct dev_context *devc = sdi->priv;
4db2aaff	271	uint16_t ops[1];
df92e5cf	272
4db2aaff	273	devc->ctlbase1 &= ~BIT_CTL1_LED;
	274	if (state)
	275	devc->ctlbase1 \|= BIT_CTL1_LED;
	276	ops[0] = mso_trans(REG_CTL1, devc->ctlbase1);
df92e5cf	277
4db2aaff	278	sr_dbg("Requesting LED toggle.");
df92e5cf	279	return mso_send_control_message(devc->serial, ARRAY_AND_SIZE(ops));
	280	}
	281
	282	SR_PRIV void stop_acquisition(const struct sr_dev_inst *sdi)
	283	{
	284	struct sr_datafeed_packet packet;
	285	struct dev_context *devc;
	286
	287	devc = sdi->priv;
	288	sr_source_remove(devc->serial->fd);
	289
	290	/* Terminate session */
	291	packet.type = SR_DF_END;
	292	sr_session_send(sdi, &packet);
	293	}
	294
	295	SR_PRIV int mso_clkrate_out(struct sr_serial_dev_inst *serial, uint16_t val)
	296	{
	297	uint16_t ops[] = {
	298	mso_trans(REG_CLKRATE1, (val >> 8) & 0xff),
	299	mso_trans(REG_CLKRATE2, val & 0xff),
	300	};
	301
	302	sr_dbg("Setting clkrate word to 0x%x.", val);
	303	return mso_send_control_message(serial, ARRAY_AND_SIZE(ops));
	304	}
	305
	306	SR_PRIV int mso_configure_rate(struct sr_dev_inst *sdi, uint32_t rate)
	307	{
	308	struct dev_context *devc = sdi->priv;
	309	unsigned int i;
	310	int ret = SR_ERR;
	311
	312	for (i = 0; i < ARRAY_SIZE(rate_map); i++) {
	313	if (rate_map[i].rate == rate) {
	314	devc->ctlbase2 = rate_map[i].slowmode;
4b719338	315	ret = mso_clkrate_out(devc->serial, rate_map[i].val);
df92e5cf	316	if (ret == SR_OK)
	317	devc->cur_rate = rate;
	318	return ret;
	319	}
	320	}
4db2aaff	321
	322	if (ret != SR_OK)
	323	sr_err("Unsupported rate.");
	324
df92e5cf	325	return ret;
	326	}
	327
	328
	329
	330
	331
	332	SR_PRIV int mso_check_trigger(struct sr_serial_dev_inst serial, uint8_t info)
	333	{
	334	uint16_t ops[] = { mso_trans(REG_TRIGGER, 0) };
	335	int ret;
	336
	337	sr_dbg("Requesting trigger state.");
	338	ret = mso_send_control_message(serial, ARRAY_AND_SIZE(ops));
	339	if (info == NULL \|\| ret != SR_OK)
	340	return ret;
	341
	342
	343	uint8_t buf = 0;
	344	if (serial_read(serial, &buf, 1) != 1) /* FIXME: Need timeout */
	345	ret = SR_ERR;
	346	*info = buf;
	347
	348	sr_dbg("Trigger state is: 0x%x.", *info);
	349	return ret;
	350	}
	351
	352	SR_PRIV int mso_receive_data(int fd, int revents, void *cb_data)
	353	{
	354
	355	struct sr_datafeed_packet packet;
	356	struct sr_datafeed_logic logic;
	357	struct sr_dev_inst *sdi;
df92e5cf	358	GSList *l;
4db2aaff	359	int i;
df92e5cf	360
4db2aaff	361	struct drv_context *drvc = di->priv;
df92e5cf	362
df92e5cf	363	/* Find this device's devc struct by its fd. */
4db2aaff	364	struct dev_context *devc = NULL;
df92e5cf	365	for (l = drvc->instances; l; l = l->next) {
	366	sdi = l->data;
	367	devc = sdi->priv;
	368	if (devc->serial->fd == fd)
	369	break;
	370	devc = NULL;
	371	}
	372	if (!devc)
	373	/* Shouldn't happen. */
	374	return TRUE;
	375
	376	(void)revents;
	377
	378	uint8_t in[1024];
	379	size_t s = serial_read(devc->serial, in, sizeof(in));
	380	if (s <= 0)
	381	return FALSE;
	382
	383	/* No samples */
	384	if (devc->trigger_state != MSO_TRIGGER_DATAREADY) {
	385	devc->trigger_state = in[0];
	386	if (devc->trigger_state == MSO_TRIGGER_DATAREADY) {
	387	mso_read_buffer(sdi);
	388	devc->buffer_n = 0;
	389	} else {
	390	mso_check_trigger(devc->serial, NULL);
	391	}
	392	return FALSE;
	393	}
	394
	395	/* the hardware always dumps 1024 samples, 24bits each */
	396	if (devc->buffer_n < 3072) {
	397	memcpy(devc->buffer + devc->buffer_n, in, s);
	398	devc->buffer_n += s;
	399	}
	400	if (devc->buffer_n < 3072)
	401	return FALSE;
	402
	403	/* do the conversion */
	404	uint8_t logic_out[1024];
	405	double analog_out[1024];
	406	for (i = 0; i < 1024; i++) {
	407	/* FIXME: Need to do conversion to mV */
	408	analog_out[i] = (devc->buffer[i * 3] & 0x3f) \|
	409	((devc->buffer[i * 3 + 1] & 0xf) << 6);
	410	logic_out[i] = ((devc->buffer[i * 3 + 1] & 0x30) >> 4) \|
	411	((devc->buffer[i * 3 + 2] & 0x3f) << 2);
	412	}
	413
	414	packet.type = SR_DF_LOGIC;
	415	packet.payload = &logic;
	416	logic.length = 1024;
	417	logic.unitsize = 1;
	418	logic.data = logic_out;
	419	sr_session_send(cb_data, &packet);
	420
	421	// Dont bother fixing this yet, keep it "old style"
	422	/*
	423	packet.type = SR_DF_ANALOG;
	424	packet.length = 1024;
	425	packet.unitsize = sizeof(double);
	426	packet.payload = analog_out;
	427	sr_session_send(ctx->session_dev_id, &packet);
	428	*/
429
430	packet.type = SR_DF_END;
431	sr_session_send(devc->session_dev_id, &packet);
432
4db2aaff	433	return TRUE;
df92e5cf	434	}