2 * This file is part of the sigrok-firmware-fx2lafw project.
4 * Copyright (C) 2009 Ubixum, Inc.
5 * Copyright (C) 2015 Jochen Hoenicke
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2.1 of the License, or (at your option) any later version.
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
21 #include <fx2macros.h>
23 #include <autovector.h>
27 #define SET_ANALOG_MODE() PA7 = 1
29 #define SET_COUPLING(x)
31 #define SET_CALIBRATION_PULSE(x)
33 /* Toggle the 1kHz calibration pin, only accurate up to ca. 8MHz. */
34 #define TOGGLE_CALIBRATION_PIN() PC2 = !PC2
36 #define LED_CLEAR() PC0 = 1; PC1 = 1;
37 #define LED_GREEN() PC0 = 1; PC1 = 0;
38 #define LED_RED() PC0 = 0; PC1 = 1;
40 /* CTLx pin index (IFCLK, ADC clock input). */
43 #define OUT0 ((1 << CTL_BIT) << 4) /* OEx = 1, CTLx = 0 */
44 #define OE_CTL (((1 << CTL_BIT) << 4) | (1 << CTL_BIT)) /* OEx = CTLx = 1 */
46 /* Change to support as many interfaces as you need. */
47 static BYTE altiface = 0;
49 static volatile WORD ledcounter = 0;
51 static volatile __bit dosud = FALSE;
52 static volatile __bit dosuspend = FALSE;
54 extern __code BYTE highspd_dscr;
55 extern __code BYTE fullspd_dscr;
57 void resume_isr(void) __interrupt RESUME_ISR
62 void sudav_isr(void) __interrupt SUDAV_ISR
68 void usbreset_isr(void) __interrupt USBRESET_ISR
70 handle_hispeed(FALSE);
74 void hispeed_isr(void) __interrupt HISPEED_ISR
80 void suspend_isr(void) __interrupt SUSPEND_ISR
86 void timer2_isr(void) __interrupt TF2_ISR
88 TOGGLE_CALIBRATION_PIN();
90 if (ledcounter && (--ledcounter == 0))
97 * This sets three bits for each channel, one channel at a time.
98 * For channel 0 we want to set bits 1, 2 & 3
99 * For channel 1 we want to set bits 4, 5 & 6
101 * We convert the input values that are strange due to original
102 * firmware code into the value of the three bits as follows:
110 * The third bit is always zero since there are only four outputs connected
111 * in the serial selector chip.
113 * The multiplication of the converted value by 0x24 sets the relevant bits in
114 * both channels and then we mask it out to only affect the channel currently
117 static BOOL set_voltage(BYTE channel, BYTE val)
138 bits = bits << (channel ? 1 : 4);
139 mask = (channel) ? 0x70 : 0x0e;
140 IOA = (IOA & ~mask) | (bits & mask);
146 * Each LSB in the nibble of the byte controls the coupling per channel.
148 * Setting PE3 disables AC coupling capacitor on CH0.
149 * Setting PE0 disables AC coupling capacitor on CH1.
151 static void set_coupling(BYTE coupling_cfg)
153 if (coupling_cfg & 0x01)
158 if (coupling_cfg & 0x10)
164 static BOOL set_numchannels(BYTE numchannels)
166 if (numchannels == 1 || numchannels == 2) {
167 BYTE fifocfg = 7 + numchannels;
168 EP2FIFOCFG = fifocfg;
169 EP6FIFOCFG = fifocfg;
176 static void clear_fifo(void)
189 static void stop_sampling(void)
193 INPKTEND = (altiface == 0) ? 6 : 2;
196 static void start_sampling(void)
204 for (i = 0; i < 1000; i++);
206 while (!(GPIFTRIG & 0x80))
213 GPIFTRIG = (altiface == 0) ? 6 : 4;
215 /* Set green LED, don't clear LED afterwards (ledcounter = 0). */
220 static void select_interface(BYTE alt)
222 const BYTE *pPacketSize = \
223 ((USBCS & bmHSM) ? &highspd_dscr : &fullspd_dscr)
224 + (9 + (16 * alt) + 9 + 4);
233 EP6AUTOINLENL = pPacketSize[0];
234 EP6AUTOINLENH = pPacketSize[1];
240 EP2AUTOINLENL = pPacketSize[0];
241 EP2AUTOINLENH = pPacketSize[1] & 0x7;
242 EP2ISOINPKTS = (pPacketSize[1] >> 3) + 1;
246 static const struct samplerate_info {
255 { 48, 0x80, 0, 3, 0, 0x00, 0xea },
256 { 30, 0x80, 0, 3, 0, 0x00, 0xaa },
257 { 24, 1, 0, 2, 1, OUT0, 0xca },
258 { 16, 1, 1, 2, 0, OUT0, 0xca },
259 { 12, 2, 1, 2, 0, OUT0, 0xca },
260 { 8, 3, 2, 2, 0, OUT0, 0xca },
261 { 4, 6, 5, 2, 0, OUT0, 0xca },
262 { 2, 12, 11, 2, 0, OUT0, 0xca },
263 { 1, 24, 23, 2, 0, OUT0, 0xca },
264 { 50, 48, 47, 2, 0, OUT0, 0xca },
265 { 20, 120, 119, 2, 0, OUT0, 0xca },
266 { 10, 240, 239, 2, 0, OUT0, 0xca },
269 static BOOL set_samplerate(BYTE rate)
273 while (samplerates[i].rate != rate) {
275 if (i == sizeof(samplerates) / sizeof(samplerates[0]))
279 IFCONFIG = samplerates[i].ifcfg;
282 AUTOPTRH2 = 0xE4; /* 0xE400: GPIF waveform descriptor 0. */
286 * The program for low-speed, e.g. 1 MHz, is:
287 * wait 24, CTLx=0, FIFO
291 * The program for 24 MHz is:
292 * wait 1, CTLx=0, FIFO
295 * The program for 30/48 MHz is:
296 * jump 0, CTLx=Z, FIFO, LOOP
298 * (CTLx is device-dependent, could be e.g. CTL0 or CTL2.)
301 /* LENGTH / BRANCH 0-7 */
302 EXTAUTODAT2 = samplerates[i].wait0;
303 EXTAUTODAT2 = samplerates[i].wait1;
312 EXTAUTODAT2 = samplerates[i].opc0;
313 EXTAUTODAT2 = samplerates[i].opc1;
314 EXTAUTODAT2 = 1; /* DATA=0 DP=1 */
322 EXTAUTODAT2 = samplerates[i].out0;
323 EXTAUTODAT2 = OE_CTL;
324 EXTAUTODAT2 = OE_CTL;
331 /* LOGIC FUNCTION 0-7 */
341 for (i = 0; i < 96; i++)
347 static BOOL set_calibration_pulse(BYTE fs)
351 RCAP2L = -10000 & 0xff;
352 RCAP2H = (-10000 & 0xff00) >> 8;
355 RCAP2L = -1000 & 0xff;
356 RCAP2H = (-1000 & 0xff00) >> 8;
359 RCAP2L = (BYTE)(-100 & 0xff);
363 RCAP2L = (BYTE)(-20 & 0xff);
371 /* Set *alt_ifc to the current alt interface for ifc. */
372 BOOL handle_get_interface(BYTE ifc, BYTE *alt_ifc)
382 * Return TRUE if you set the interface requested.
384 * Note: This function should reconfigure and reset the endpoints
385 * according to the interface descriptors you provided.
387 BOOL handle_set_interface(BYTE ifc,BYTE alt_ifc)
390 select_interface(alt_ifc);
395 BYTE handle_get_configuration(void)
397 /* We only support configuration 0. */
401 BOOL handle_set_configuration(BYTE cfg)
403 /* We only support configuration 0. */
409 BOOL handle_vendorcommand(BYTE cmd)
413 /* Set red LED, clear after timeout. */
417 /* Clear EP0BCH/L for each valid command. */
418 if (cmd >= 0xe0 && cmd <= 0xe6) {
421 while (EP0CS & bmEPBUSY);
427 set_voltage(cmd - 0xe0, EP0BUF[0]);
430 set_samplerate(EP0BUF[0]);
437 set_numchannels(EP0BUF[0]);
440 SET_COUPLING(EP0BUF[0]);
443 SET_CALIBRATION_PULSE(EP0BUF[0]);
447 return FALSE; /* Not handled by handlers. */
450 static void init(void)
457 /* In idle mode tristate all outputs. */
458 GPIFIDLECTL = 0x00; /* Don't enable CTL0-5 outputs. */
459 GPIFCTLCFG = 0x80; /* TRICTL=1. CTL0-2: CMOS outputs, tri-statable. */
461 GPIFREADYSTAT = 0x00;
472 static void main(void)
479 /* Set up interrupts. */
488 /* Global (8051) interrupt enable. */
492 RCAP2L = -500 & 0xff;
493 RCAP2H = (-500 & 0xff00) >> 8;
516 /* Make sure ext wakeups are cleared. */
517 WAKEUPCS |= bmWU | bmWU2;
529 } while (!remote_wakeup_allowed && REMOTE_WAKEUP());
531 /* Resume (TRM 6.4). */
532 if (REMOTE_WAKEUP()) {
534 USBCS |= bmSIGRESUME;
536 USBCS &= ~bmSIGRESUME;