2 ## This file is part of the libsigrokdecode project.
4 ## Copyright (C) 2011 Gareth McMullin <gareth@blacksphere.co.nz>
5 ## Copyright (C) 2012-2013 Uwe Hermann <uwe@hermann-uwe.de>
7 ## This program is free software; you can redistribute it and/or modify
8 ## it under the terms of the GNU General Public License as published by
9 ## the Free Software Foundation; either version 2 of the License, or
10 ## (at your option) any later version.
12 ## This program is distributed in the hope that it will be useful,
13 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
14 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 ## GNU General Public License for more details.
17 ## You should have received a copy of the GNU General Public License
18 ## along with this program; if not, write to the Free Software
19 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 import sigrokdecode as srd
39 - 'J', 'K', 'SE0', or 'SE1'
43 - Note: Symbols like SE0, SE1, and the J that's part of EOP don't yield 'BIT'.
46 # Low-/full-speed symbols.
47 # Note: Low-speed J and K are inverted compared to the full-speed J and K!
50 # (<dp>, <dm>): <symbol/state>
57 # (<dp>, <dm>): <symbol/state>
66 'low-speed': 1500000, # 1.5Mb/s (+/- 1.5%)
67 'full-speed': 12000000, # 12Mb/s (+/- 0.25%)
73 'SE0': [2, ['SE0', '0']],
74 'SE1': [3, ['SE1', '1']],
77 class SamplerateError(Exception):
80 class Decoder(srd.Decoder):
83 name = 'USB signalling'
84 longname = 'Universal Serial Bus (LS/FS) signalling'
85 desc = 'USB (low-speed and full-speed) signalling protocol.'
88 outputs = ['usb_signalling']
90 {'id': 'dp', 'name': 'D+', 'desc': 'USB D+ signal'},
91 {'id': 'dm', 'name': 'D-', 'desc': 'USB D- signal'},
94 {'id': 'signalling', 'desc': 'Signalling',
95 'default': 'full-speed', 'values': ('full-speed', 'low-speed')},
98 ('sym-j', 'J symbol'),
99 ('sym-k', 'K symbol'),
100 ('sym-se0', 'SE0 symbol'),
101 ('sym-se1', 'SE1 symbol'),
102 ('sop', 'Start of packet (SOP)'),
103 ('eop', 'End of packet (EOP)'),
105 ('stuffbit', 'Stuff bit'),
109 ('bits', 'Bits', (4, 5, 6, 7, 8)),
110 ('symbols', 'Symbols', (0, 1, 2, 3)),
114 self.samplerate = None
115 self.oldsym = 'J' # The "idle" state is J.
122 self.samplepos = None
123 self.samplenum_target = None
124 self.samplenum_edge = None
127 self.consecutive_ones = 0
131 self.out_python = self.register(srd.OUTPUT_PYTHON)
132 self.out_ann = self.register(srd.OUTPUT_ANN)
134 def metadata(self, key, value):
135 if key == srd.SRD_CONF_SAMPLERATE:
136 self.samplerate = value
137 self.bitrate = bitrates[self.options['signalling']]
138 self.bitwidth = float(self.samplerate) / float(self.bitrate)
139 self.halfbit = int(self.bitwidth / 2)
141 def putpx(self, data):
142 self.put(self.samplenum, self.samplenum, self.out_python, data)
144 def putx(self, data):
145 self.put(self.samplenum, self.samplenum, self.out_ann, data)
147 def putpm(self, data):
148 s, h = self.samplenum, self.halfbit
149 self.put(self.ss_block - h, s + h, self.out_python, data)
151 def putm(self, data):
152 s, h = self.samplenum, self.halfbit
153 self.put(self.ss_block - h, s + h, self.out_ann, data)
155 def putpb(self, data):
156 s, h = self.samplenum, self.halfbit
157 self.put(self.samplenum_edge, s + h, self.out_python, data)
159 def putb(self, data):
160 s, h = self.samplenum, self.halfbit
161 self.put(self.samplenum_edge, s + h, self.out_ann, data)
163 def set_new_target_samplenum(self):
164 self.samplepos += self.bitwidth;
165 self.samplenum_target = int(self.samplepos)
166 self.samplenum_edge = int(self.samplepos - (self.bitwidth / 2))
168 def wait_for_sop(self, sym):
169 # Wait for a Start of Packet (SOP), i.e. a J->K symbol change.
173 self.consecutive_ones = 0
174 self.ss_sop = self.samplenum
175 self.samplepos = self.ss_sop - (self.bitwidth / 2) + 0.5
176 self.set_new_target_samplenum()
177 self.putpx(['SOP', None])
178 self.putx([4, ['SOP', 'S']])
179 self.state = 'GET BIT'
181 def handle_bit(self, sym, b):
182 if self.consecutive_ones == 6:
185 self.putpb(['STUFF BIT', None])
186 self.putb([7, ['Stuff bit: 0', 'SB: 0', '0']])
187 self.consecutive_ones = 0
189 self.putpb(['ERR', None])
190 self.putb([8, ['Bit stuff error', 'BS ERR', 'B']])
193 # Normal bit (not a stuff bit).
194 self.putpb(['BIT', b])
195 self.putb([6, ['%s' % b]])
197 self.consecutive_ones += 1
199 self.consecutive_ones = 0
201 def get_eop(self, sym):
202 # EOP: SE0 for >= 1 bittime (usually 2 bittimes), then J.
203 self.syms.append(sym)
204 self.putpb(['SYM', sym])
205 self.putb(sym_annotation[sym])
206 self.set_new_target_samplenum()
208 if self.syms[-2:] == ['SE0', 'J']:
210 self.putpm(['EOP', None])
211 self.putm([5, ['EOP', 'E']])
212 self.syms, self.state = [], 'IDLE'
213 self.bitwidth = float(self.samplerate) / float(self.bitrate)
215 def get_bit(self, sym):
217 # Start of an EOP. Change state, run get_eop() for this bit.
218 self.state = 'GET EOP'
219 self.ss_block = self.samplenum
222 self.syms.append(sym)
223 self.putpb(['SYM', sym])
224 b = '0' if self.oldsym != sym else '1'
225 self.putb(sym_annotation[sym])
226 if self.oldsym != sym:
227 edgesym = symbols[self.options['signalling']][tuple(self.edgepins)]
228 if edgesym not in ('SE0', 'SE1'):
230 self.bitwidth = self.bitwidth - (0.001 * self.bitwidth)
231 self.samplepos = self.samplepos - (0.01 * self.bitwidth)
233 self.bitwidth = self.bitwidth + (0.001 * self.bitwidth)
234 self.samplepos = self.samplepos + (0.01 * self.bitwidth)
235 self.handle_bit(sym, b)
236 self.set_new_target_samplenum()
239 def decode(self, ss, es, data):
240 if not self.samplerate:
241 raise SamplerateError('Cannot decode without samplerate.')
242 for (self.samplenum, pins) in data:
244 if self.state == 'IDLE':
245 # Ignore identical samples early on (for performance reasons).
246 if self.oldpins == pins:
249 sym = symbols[self.options['signalling']][tuple(pins)]
250 self.wait_for_sop(sym)
252 elif self.state in ('GET BIT', 'GET EOP'):
253 # Wait until we're in the middle of the desired bit.
254 if self.samplenum == self.samplenum_edge:
256 if self.samplenum < self.samplenum_target:
258 sym = symbols[self.options['signalling']][tuple(pins)]
259 if self.state == 'GET BIT':
261 elif self.state == 'GET EOP':