2 ## This file is part of the libsigrokdecode project.
4 ## Copyright (C) 2013-2016 Uwe Hermann <uwe@hermann-uwe.de>
6 ## This program is free software; you can redistribute it and/or modify
7 ## it under the terms of the GNU General Public License as published by
8 ## the Free Software Foundation; either version 2 of the License, or
9 ## (at your option) any later version.
11 ## This program is distributed in the hope that it will be useful,
12 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
13 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 ## GNU General Public License for more details.
16 ## You should have received a copy of the GNU General Public License
17 ## along with this program; if not, see <http://www.gnu.org/licenses/>.
20 import sigrokdecode as srd
21 from common.srdhelper import bitpack
30 - 'ITEM', [<item>, <itembitsize>]
31 - 'WORD', [<word>, <wordbitsize>, <worditemcount>]
34 - A single item (a number). It can be of arbitrary size. The max. number
35 of bits in this item is specified in <itembitsize>.
38 - The size of an item (in bits). For a 4-bit parallel bus this is 4,
39 for a 16-bit parallel bus this is 16, and so on.
42 - A single word (a number). It can be of arbitrary size. The max. number
43 of bits in this word is specified in <wordbitsize>. The (exact) number
44 of items in this word is specified in <worditemcount>.
47 - The size of a word (in bits). For a 2-item word with 8-bit items
48 <wordbitsize> is 16, for a 3-item word with 4-bit items <wordbitsize>
52 - The size of a word (in number of items). For a 4-item word (no matter
53 how many bits each item consists of) <worditemcount> is 4, for a 7-item
54 word <worditemcount> is 7, and so on.
57 def channel_list(num_channels):
58 l = [{'id': 'clk', 'name': 'CLK', 'desc': 'Clock line'}]
59 for i in range(num_channels):
60 d = {'id': 'd%d' % i, 'name': 'D%d' % i, 'desc': 'Data line %d' % i}
64 class ChannelError(Exception):
69 class Decoder(srd.Decoder):
73 longname = 'Parallel sync bus'
74 desc = 'Generic parallel synchronous bus.'
77 outputs = ['parallel']
78 optional_channels = channel_list(NUM_CHANNELS)
80 {'id': 'clock_edge', 'desc': 'Clock edge to sample on',
81 'default': 'rising', 'values': ('rising', 'falling')},
82 {'id': 'wordsize', 'desc': 'Data wordsize', 'default': 1},
83 {'id': 'endianness', 'desc': 'Data endianness',
84 'default': 'little', 'values': ('little', 'big')},
96 self.saved_item = None
97 self.ss_item = self.es_item = None
101 self.out_python = self.register(srd.OUTPUT_PYTHON)
102 self.out_ann = self.register(srd.OUTPUT_ANN)
104 def putpb(self, data):
105 self.put(self.ss_item, self.es_item, self.out_python, data)
107 def putb(self, data):
108 self.put(self.ss_item, self.es_item, self.out_ann, data)
110 def putpw(self, data):
111 self.put(self.ss_word, self.es_word, self.out_python, data)
113 def putw(self, data):
114 self.put(self.ss_word, self.es_word, self.out_ann, data)
116 def handle_bits(self, item, used_pins):
117 # Save the item, and its sample number if it's the first part of a word.
119 self.ss_word = self.samplenum
120 self.items.append(item)
123 # Save the start sample and item for later (no output yet).
124 self.ss_item = self.samplenum
126 self.saved_item = item
128 # Output the saved item (from the last CLK edge to the current).
129 self.es_item = self.samplenum
130 self.putpb(['ITEM', self.saved_item])
131 self.putb([0, ['%X' % self.saved_item]])
132 self.ss_item = self.samplenum
133 self.saved_item = item
135 # Get as many items as the configured wordsize says.
136 ws = self.options['wordsize']
137 if len(self.items) < ws:
140 # Output annotations/python for a word (a collection of items).
141 # NOTE that this feature is currently not effective. The emission
142 # of Python annotations is commented out.
143 endian = self.options['endianness']
144 if endian == 'little':
148 word |= self.items[i] << (i * used_pins)
150 self.es_word = self.samplenum
151 # self.putpw(['WORD', word])
152 # self.putw([1, ['%X' % word]])
153 self.ss_word = self.samplenum
158 # Determine which (optional) channels have input data. Insist in
159 # a non-empty input data set. Cope with sparse connection maps.
160 # Store enough state to later "compress" sampled input data.
161 max_possible = len(self.optional_channels)
163 idx if self.has_channel(idx) else None
164 for idx in range(max_possible)
166 has_channels = [idx for idx in idx_channels if idx is not None]
168 raise ChannelError('At least one channel has to be supplied.')
169 max_connected = max(has_channels)
170 idx_strip = max_connected + 1
172 # Determine .wait() conditions, depending on the presence of a
173 # clock signal. Either inspect samples on the configured edge of
174 # the clock, or inspect samples upon ANY edge of ANY of the pins
175 # which provide input data.
176 if self.has_channel(0):
177 edge = self.options['clock_edge'][0]
180 conds = [{idx: 'e'} for idx in has_channels]
182 # Keep processing the input stream. Assume "always zero" for
183 # not-connected input lines. Pass data bits (all inputs except
184 # clock) to the handle_bits() method.
186 pins = self.wait(conds)
187 bits = [0 if idx is None else pins[idx] for idx in idx_channels]
188 bits = bits[1:idx_strip]
189 self.handle_bits(bitpack(bits), len(bits))