2 ## This file is part of the sigrok project.
4 ## Copyright (C) 2011-2012 Uwe Hermann <uwe@hermann-uwe.de>
6 ## This program is free software; you can redistribute it and/or modify
7 ## it under the terms of the GNU General Public License as published by
8 ## the Free Software Foundation; either version 2 of the License, or
9 ## (at your option) any later version.
11 ## This program is distributed in the hope that it will be useful,
12 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
13 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 ## GNU General Public License for more details.
16 ## You should have received a copy of the GNU General Public License
17 ## along with this program; if not, write to the Free Software
18 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
21 # Macronix MX25Lxx05D SPI (NOR) flash chip protocol decoder
23 # Note: Works for MX25L1605D/MX25L3205D/MX25L6405D.
25 import sigrokdecode as srd
30 # Chip commands (also used as additional decoder states).
48 CMD_RDP_RES = 0xab # Note: RDP/RES have the same ID.
58 # TODO: (Short) command names as strings in a dict, too?
60 # Dict which maps command IDs to their description.
62 CMD_WREN: 'Write enable',
63 CMD_WRDI: 'Write disable',
64 CMD_RDID: 'Read identification',
65 CMD_RDSR: 'Read status register',
66 CMD_WRSR: 'Write status register',
67 CMD_READ: 'Read data',
68 CMD_FAST_READ: 'Fast read data',
69 CMD_2READ: '2x I/O read',
70 CMD_SE: 'Sector erase',
71 CMD_BE: 'Block erase',
73 CMD_CE2: 'Chip erase', # Alternative command ID
74 CMD_PP: 'Page program',
75 CMD_CP: 'Continuously program mode',
76 CMD_DP: 'Deep power down',
77 # CMD_RDP: 'Release from deep powerdown',
78 # CMD_RES: 'Read electronic ID',
79 CMD_RDP_RES: 'Release from deep powerdown / Read electronic ID',
80 CMD_REMS: 'Read electronic manufacturer & device ID',
81 CMD_REMS2: 'Read ID for 2x I/O mode',
82 CMD_ENSO: 'Enter secured OTP',
83 CMD_EXSO: 'Exit secured OTP',
84 CMD_RDSCUR: 'Read security register',
85 CMD_WRSCUR: 'Write security register',
86 CMD_ESRY: 'Enable SO to output RY/BY#',
87 CMD_DSRY: 'Disable SO to output RY/BY#',
96 def decode_status_reg(data):
97 # TODO: Additional per-bit(s) self.put() calls with correct start/end.
99 # Bits[0:0]: WIP (write in progress)
100 s = 'W' if (data & (1 << 0)) else 'No w'
101 ret = '%srite operation in progress.\n' % s
103 # Bits[1:1]: WEL (write enable latch)
104 s = '' if (data & (1 << 1)) else 'not '
105 ret += 'Internal write enable latch is %sset.\n' % s
107 # Bits[5:2]: Block protect bits
108 # TODO: More detailed decoding (chip-dependent).
109 ret += 'Block protection bits (BP3-BP0): 0x%x.\n' % ((data & 0x3c) >> 2)
111 # Bits[6:6]: Continuously program mode (CP mode)
112 s = '' if (data & (1 << 6)) else 'not '
113 ret += 'Device is %sin continuously program mode (CP mode).\n' % s
115 # Bits[7:7]: SRWD (status register write disable)
116 s = 'not ' if (data & (1 << 7)) else ''
117 ret += 'Status register writes are %sallowed.\n' % s
121 class Decoder(srd.Decoder):
125 longname = 'Macronix MX25Lxx05D'
126 desc = 'SPI (NOR) flash chip protocol.'
128 inputs = ['spi', 'logic']
129 outputs = ['mx25lxx05d']
132 {'id': 'hold', 'name': 'HOLD#', 'desc': 'TODO.'},
133 {'id': 'wp_acc', 'name': 'WP#/ACC', 'desc': 'TODO.'},
137 ['Text', 'Human-readable text'],
140 def __init__(self, **kwargs):
142 self.cmdstate = 1 # TODO
146 def start(self, metadata):
147 # self.out_proto = self.add(srd.OUTPUT_PROTO, 'mx25lxx05d')
148 self.out_ann = self.add(srd.OUTPUT_ANN, 'mx25lxx05d')
153 def putx(self, data):
154 # Simplification, most annotations span exactly one SPI byte/packet.
155 self.put(self.ss, self.es, self.out_ann, data)
157 def handle_wren(self, mosi, miso):
158 self.putx([0, ['Command: %s' % cmds[self.cmd]]])
161 # TODO: Check/display device ID / name
162 def handle_rdid(self, mosi, miso):
163 if self.cmdstate == 1:
164 # Byte 1: Master sends command ID.
165 self.start_sample = self.ss
166 self.putx([0, ['Command: %s' % cmds[self.cmd]]])
167 elif self.cmdstate == 2:
168 # Byte 2: Slave sends the JEDEC manufacturer ID.
169 self.putx([0, ['Manufacturer ID: 0x%02x' % miso]])
170 elif self.cmdstate == 3:
171 # Byte 3: Slave sends the memory type (0x20 for this chip).
172 self.putx([0, ['Memory type: 0x%02x' % miso]])
173 elif self.cmdstate == 4:
174 # Byte 4: Slave sends the device ID.
175 self.device_id = miso
176 self.putx([0, ['Device ID: 0x%02x' % miso]])
178 if self.cmdstate == 4:
179 # TODO: Check self.device_id is valid & exists in device_names.
180 # TODO: Same device ID? Check!
181 d = 'Device: Macronix %s' % device_name[self.device_id]
182 self.put(self.start_sample, self.es, self.out_ann, [0, [d]])
187 # TODO: Warn/abort if we don't see the necessary amount of bytes.
188 # TODO: Warn if WREN was not seen before.
189 def handle_se(self, mosi, miso):
190 if self.cmdstate == 1:
191 # Byte 1: Master sends command ID.
193 self.start_sample = self.ss
194 self.putx([0, ['Command: %s' % cmds[self.cmd]]])
195 elif self.cmdstate in (2, 3, 4):
196 # Bytes 2/3/4: Master sends sectror address (24bits, MSB-first).
197 self.addr |= (mosi << ((4 - self.cmdstate) * 8))
198 # self.putx([0, ['Sector address, byte %d: 0x%02x' % \
199 # (4 - self.cmdstate, mosi)]])
201 if self.cmdstate == 4:
202 d = 'Erase sector %d (0x%06x)' % (self.addr, self.addr)
203 self.put(self.start_sample, self.es, self.out_ann, [0, [d]])
204 # TODO: Max. size depends on chip, check that too if possible.
205 if self.addr % 4096 != 0:
206 # Sector addresses must be 4K-aligned (same for all 3 chips).
207 d = 'Warning: Invalid sector address!' # TODO: type == WARN?
208 self.put(self.start_sample, self.es, self.out_ann, [0, [d]])
213 def handle_rems(self, mosi, miso):
214 if self.cmdstate == 1:
215 # Byte 1: Master sends command ID.
216 self.start_sample = self.ss
217 self.putx([0, ['Command: %s' % cmds[self.cmd]]])
218 elif self.cmdstate in (2, 3):
219 # Bytes 2/3: Master sends two dummy bytes.
220 # TODO: Check dummy bytes? Check reply from device?
221 self.putx([0, ['Dummy byte: %s' % mosi]])
222 elif self.cmdstate == 4:
223 # Byte 4: Master sends 0x00 or 0x01.
224 # 0x00: Master wants manufacturer ID as first reply byte.
225 # 0x01: Master wants device ID as first reply byte.
226 self.manufacturer_id_first = True if (mosi == 0x00) else False
227 d = 'manufacturer' if (mosi == 0x00) else 'device'
228 self.putx([0, ['Master wants %s ID first' % d]])
229 elif self.cmdstate == 5:
230 # Byte 5: Slave sends manufacturer ID (or device ID).
232 d = 'Manufacturer' if self.manufacturer_id_first else 'Device'
233 self.putx([0, ['%s ID' % d]])
234 elif self.cmdstate == 6:
235 # Byte 6: Slave sends device ID (or manufacturer ID).
236 self.ids.append(miso)
237 d = 'Manufacturer' if self.manufacturer_id_first else 'Device'
238 self.putx([0, ['%s ID' % d]])
243 if self.cmdstate == 6:
244 self.end_sample = self.es
245 id = self.ids[1] if self.manufacturer_id_first else self.ids[0]
246 self.putx([0, ['Device: Macronix %s' % device_name[id]]])
251 def handle_rdsr(self, mosi, miso):
252 # Read status register: Master asserts CS#, sends RDSR command,
253 # reads status register byte. If CS# is kept asserted, the status
254 # register can be read continuously / multiple times in a row.
255 # When done, the master de-asserts CS# again.
256 if self.cmdstate == 1:
257 # Byte 1: Master sends command ID.
258 self.putx([0, ['Command: %s' % cmds[self.cmd]]])
259 elif self.cmdstate >= 2:
260 # Bytes 2-x: Slave sends status register as long as master clocks.
261 if self.cmdstate <= 3: # TODO: While CS# asserted.
262 self.putx([0, ['Status register: 0x%02x' % miso]])
263 self.putx([0, [decode_status_reg(miso)]])
265 if self.cmdstate == 3: # TODO: If CS# got de-asserted.
271 def handle_pp(self, mosi, miso):
272 # Page program: Master asserts CS#, sends PP command, sends 3-byte
273 # page address, sends >= 1 data bytes, de-asserts CS#.
274 if self.cmdstate == 1:
275 # Byte 1: Master sends command ID.
276 self.putx([0, ['Command: %s' % cmds[self.cmd]]])
277 elif self.cmdstate in (2, 3, 4):
278 # Bytes 2/3/4: Master sends page address (24bits, MSB-first).
279 self.addr |= (mosi << ((4 - self.cmdstate) * 8))
280 # self.putx([0, ['Page address, byte %d: 0x%02x' % \
281 # (4 - self.cmdstate, mosi)]])
282 if self.cmdstate == 4:
283 self.putx([0, ['Page address: 0x%06x' % self.addr]])
285 elif self.cmdstate >= 5:
286 # Bytes 5-x: Master sends data bytes (until CS# de-asserted).
287 # TODO: For now we hardcode 256 bytes per page / PP command.
288 if self.cmdstate <= 256 + 4: # TODO: While CS# asserted.
289 self.data.append(mosi)
290 # self.putx([0, ['New data byte: 0x%02x' % mosi]])
292 if self.cmdstate == 256 + 4: # TODO: If CS# got de-asserted.
293 # s = ', '.join(map(hex, self.data))
294 s = ''.join(map(chr, self.data))
295 self.putx([0, ['Page data: %s' % s]])
302 def handle_read(self, mosi, miso):
303 # Read data bytes: Master asserts CS#, sends READ command, sends
304 # 3-byte address, reads >= 1 data bytes, de-asserts CS#.
305 if self.cmdstate == 1:
306 # Byte 1: Master sends command ID.
307 self.putx([0, ['Command: %s' % cmds[self.cmd]]])
308 elif self.cmdstate in (2, 3, 4):
309 # Bytes 2/3/4: Master sends read address (24bits, MSB-first).
310 self.addr |= (mosi << ((4 - self.cmdstate) * 8))
311 # self.putx([0, ['Read address, byte %d: 0x%02x' % \
312 # (4 - self.cmdstate, mosi)]])
313 if self.cmdstate == 4:
314 self.putx([0, ['Read address: 0x%06x' % self.addr]])
316 elif self.cmdstate >= 5:
317 # Bytes 5-x: Master reads data bytes (until CS# de-asserted).
318 # TODO: For now we hardcode 256 bytes per READ command.
319 if self.cmdstate <= 256 + 4: # TODO: While CS# asserted.
320 self.data.append(miso)
321 # self.putx([0, ['New read byte: 0x%02x' % miso]])
323 if self.cmdstate == 256 + 4: # TODO: If CS# got de-asserted.
324 # s = ', '.join(map(hex, self.data))
325 s = ''.join(map(chr, self.data))
326 self.putx([0, ['Read data: %s' % s]])
333 def decode(self, ss, es, data):
335 ptype, mosi, miso = data
337 # if ptype == 'DATA':
338 # s = 'MOSI: 0x%02x, MISO: 0x%02x' % (mosi, miso)
339 # self.put(0, 0, self.out_ann, [0, [s]])
342 # if ptype == 'CS-CHANGE':
343 # if mosi == 1 and miso == 0:
344 # self.put(0, 0, self.out_ann, [0, ['Asserting CS#']])
345 # elif mosi == 0 and miso == 1:
346 # self.put(0, 0, self.out_ann, [0, ['De-asserting CS#']])
353 self.ss, self.es = ss, es
355 # If we encountered a known chip command, enter the resp. state.
356 if self.state == IDLE:
359 self.cmd = cmd # TODO: Eliminate?
365 # TODO: Use some generic way to invoke the resp. method.
366 if self.state == CMD_WREN:
367 self.handle_wren(mosi, miso)
368 elif self.state == CMD_SE:
369 self.handle_se(mosi, miso)
370 elif self.state == CMD_RDID:
371 self.handle_rdid(mosi, miso)
372 elif self.state == CMD_REMS:
373 self.handle_rems(mosi, miso)
374 elif self.state == CMD_RDSR:
375 self.handle_rdsr(mosi, miso)
376 elif self.state == CMD_PP:
377 self.handle_pp(mosi, miso)
378 elif self.state == CMD_READ:
379 self.handle_read(mosi, miso)
381 self.put(0, 0, self.out_ann, [0, ['Unknown command: 0x%02x' % cmd]])