2 ## This file is part of the libsigrokdecode project.
4 ## Copyright (C) 2018 fenugrec <fenugrec@users.sourceforge.net>
6 ## This program is free software; you can redistribute it and/or modify
7 ## it under the terms of the GNU General Public License as published by
8 ## the Free Software Foundation; either version 2 of the License, or
9 ## (at your option) any later version.
11 ## This program is distributed in the hope that it will be useful,
12 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
13 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 ## GNU General Public License for more details.
16 ## You should have received a copy of the GNU General Public License
17 ## along with this program; if not, see <http://www.gnu.org/licenses/>.
20 import sigrokdecode as srd
21 from common.srdhelper import SrdIntEnum
23 Ann = SrdIntEnum.from_str('Ann', 'ROMDATA')
24 Bin = SrdIntEnum.from_str('Bin', 'ROMDATA')
26 class ChannelError(Exception):
29 class Decoder(srd.Decoder):
33 longname = 'Intel MCS-48'
34 desc = 'Intel MCS-48 external memory access protocol.'
38 tags = ['Retro computing']
40 {'id': 'ale', 'name': 'ALE', 'desc': 'Address latch enable'},
41 {'id': 'psen', 'name': '/PSEN', 'desc': 'Program store enable'},
45 'desc': 'CPU data line %d' % i
46 } for i in range(0, 8)
50 'desc': 'CPU address line %d' % i
51 } for i in range(8, 12)
53 optional_channels = tuple({
56 'desc': 'CPU address line %d' % i
57 } for i in range(12, 13)
60 ('romdata', 'Address:Data'),
63 ('romdata', 'AAAA:DD'),
65 OFF_ALE, OFF_PSEN = 0, 1
66 OFF_DATA_BOT, OFF_DATA_TOP = 2, 10
67 OFF_ADDR_BOT, OFF_ADDR_TOP = 10, 14
68 OFF_BANK_BOT, OFF_BANK_TOP = 14, 15
79 # Flag to make sure we get an ALE pulse first.
83 self.out_ann = self.register(srd.OUTPUT_ANN)
84 self.out_bin = self.register(srd.OUTPUT_BINARY)
86 def newaddr(self, addr, data):
87 # Falling edge on ALE: reconstruct address.
89 addr = sum([bit << i for i, bit in enumerate(addr)])
91 addr |= sum([bit << i for i, bit in enumerate(data)])
93 self.addr_s = self.samplenum
95 def newdata(self, data):
96 # Edge on PSEN: get data.
97 data = sum([bit << i for i, bit in enumerate(data)])
99 self.data_s = self.samplenum
101 anntext = '{:04X}:{:02X}'.format(self.addr, self.data)
102 self.put(self.addr_s, self.data_s, self.out_ann, [Ann.ROMDATA, [anntext]])
103 bindata = self.addr.to_bytes(2, byteorder='big')
104 bindata += self.data.to_bytes(1, byteorder='big')
105 self.put(self.addr_s, self.data_s, self.out_bin, [Bin.ROMDATA, bindata])
108 # Address bits above A11 are optional, and are considered to be A12+.
109 # This logic needs more adjustment when more bank address pins are
110 # to get supported. For now, having just A12 is considered sufficient.
111 has_bank = self.has_channel(self.OFF_BANK_BOT)
112 bank_pin_count = 1 if has_bank else 0
113 # Sample address on the falling ALE edge.
114 # Save data on falling edge of PSEN.
116 pins = self.wait([{self.OFF_ALE: 'f'}, {self.OFF_PSEN: 'r'}])
117 data = pins[self.OFF_DATA_BOT:self.OFF_DATA_TOP]
118 addr = pins[self.OFF_ADDR_BOT:self.OFF_ADDR_TOP]
119 bank = pins[self.OFF_BANK_BOT:self.OFF_BANK_TOP]
121 addr += bank[:bank_pin_count]
122 # Handle those conditions (one or more) that matched this time.
124 self.newaddr(addr, data)