2 ## This file is part of the libsigrokdecode project.
4 ## Copyright (C) 2012-2015 Uwe Hermann <uwe@hermann-uwe.de>
6 ## This program is free software; you can redistribute it and/or modify
7 ## it under the terms of the GNU General Public License as published by
8 ## the Free Software Foundation; either version 2 of the License, or
9 ## (at your option) any later version.
11 ## This program is distributed in the hope that it will be useful,
12 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
13 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 ## GNU General Public License for more details.
16 ## You should have received a copy of the GNU General Public License
17 ## along with this program; if not, write to the Free Software
18 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
21 import sigrokdecode as srd
30 - 'NEW STATE': <pdata> is the new state of the JTAG state machine.
31 Valid values: 'TEST-LOGIC-RESET', 'RUN-TEST/IDLE', 'SELECT-DR-SCAN',
32 'CAPTURE-DR', 'SHIFT-DR', 'EXIT1-DR', 'PAUSE-DR', 'EXIT2-DR', 'UPDATE-DR',
33 'SELECT-IR-SCAN', 'CAPTURE-IR', 'SHIFT-IR', 'EXIT1-IR', 'PAUSE-IR',
34 'EXIT2-IR', 'UPDATE-IR'.
35 - 'IR TDI BIT': Bit that was clocked into the IR register.
36 - 'IR TDO BIT': Bit that was clocked out of the IR register.
37 - 'DR TDI BIT': Bit that was clocked into the DR register.
38 - 'DR TDO BIT': Bit that was clocked out of the DR register.
39 - 'IR TDI': Bitstring that was clocked into the IR register.
40 - 'IR TDO': Bitstring that was clocked out of the IR register.
41 - 'DR TDI': Bitstring that was clocked into the DR register.
42 - 'DR TDO': Bitstring that was clocked out of the DR register.
44 All bits are either '1' or '0' characters.
45 All bitstrings are a sequence of '1' and '0' characters. The right-most
46 character in the bitstring is the LSB. Example: '01110001' (1 is LSB).
51 'TEST-LOGIC-RESET', 'RUN-TEST/IDLE',
53 'SELECT-DR-SCAN', 'CAPTURE-DR', 'UPDATE-DR', 'PAUSE-DR',
54 'SHIFT-DR', 'EXIT1-DR', 'EXIT2-DR',
56 'SELECT-IR-SCAN', 'CAPTURE-IR', 'UPDATE-IR', 'PAUSE-IR',
57 'SHIFT-IR', 'EXIT1-IR', 'EXIT2-IR',
60 class Decoder(srd.Decoder):
64 longname = 'Joint Test Action Group (IEEE 1149.1)'
65 desc = 'Protocol for testing, debugging, and flashing ICs.'
70 {'id': 'tdi', 'name': 'TDI', 'desc': 'Test data input'},
71 {'id': 'tdo', 'name': 'TDO', 'desc': 'Test data output'},
72 {'id': 'tck', 'name': 'TCK', 'desc': 'Test clock'},
73 {'id': 'tms', 'name': 'TMS', 'desc': 'Test mode select'},
76 {'id': 'trst', 'name': 'TRST#', 'desc': 'Test reset'},
77 {'id': 'srst', 'name': 'SRST#', 'desc': 'System reset'},
78 {'id': 'rtck', 'name': 'RTCK', 'desc': 'Return clock signal'},
80 annotations = tuple([tuple([s.lower(), s]) for s in jtag_states]) + ( \
81 ('bit-tdi', 'Bit (TDI)'),
82 ('bit-tdo', 'Bit (TDO)'),
83 ('bitstring-tdi', 'Bitstring (TDI)'),
84 ('bitstring-tdo', 'Bitstring (TDO)'),
87 ('bits-tdi', 'Bits (TDI)', (16,)),
88 ('bits-tdo', 'Bits (TDO)', (17,)),
89 ('bitstrings-tdi', 'Bitstring (TDI)', (18,)),
90 ('bitstrings-tdo', 'Bitstring (TDO)', (19,)),
91 ('states', 'States', tuple(range(15 + 1))),
94 def __init__(self, **kwargs):
95 # self.state = 'TEST-LOGIC-RESET'
96 self.state = 'RUN-TEST/IDLE'
98 self.oldpins = (-1, -1, -1, -1)
103 self.ss_item = self.es_item = None
104 self.ss_bitstring = self.es_bitstring = None
105 self.saved_item = None
107 self.first_bit = True
110 self.out_python = self.register(srd.OUTPUT_PYTHON)
111 self.out_ann = self.register(srd.OUTPUT_ANN)
113 def putx(self, data):
114 self.put(self.ss_item, self.es_item, self.out_ann, data)
116 def putp(self, data):
117 self.put(self.ss_item, self.es_item, self.out_python, data)
119 def putx_bs(self, data):
120 self.put(self.ss_bitstring, self.es_bitstring, self.out_ann, data)
122 def putp_bs(self, data):
123 self.put(self.ss_bitstring, self.es_bitstring, self.out_python, data)
125 def advance_state_machine(self, tms):
126 self.oldstate = self.state
129 if self.state == 'TEST-LOGIC-RESET':
130 self.state = 'TEST-LOGIC-RESET' if (tms) else 'RUN-TEST/IDLE'
131 elif self.state == 'RUN-TEST/IDLE':
132 self.state = 'SELECT-DR-SCAN' if (tms) else 'RUN-TEST/IDLE'
135 elif self.state == 'SELECT-DR-SCAN':
136 self.state = 'SELECT-IR-SCAN' if (tms) else 'CAPTURE-DR'
137 elif self.state == 'CAPTURE-DR':
138 self.state = 'EXIT1-DR' if (tms) else 'SHIFT-DR'
139 elif self.state == 'SHIFT-DR':
140 self.state = 'EXIT1-DR' if (tms) else 'SHIFT-DR'
141 elif self.state == 'EXIT1-DR':
142 self.state = 'UPDATE-DR' if (tms) else 'PAUSE-DR'
143 elif self.state == 'PAUSE-DR':
144 self.state = 'EXIT2-DR' if (tms) else 'PAUSE-DR'
145 elif self.state == 'EXIT2-DR':
146 self.state = 'UPDATE-DR' if (tms) else 'SHIFT-DR'
147 elif self.state == 'UPDATE-DR':
148 self.state = 'SELECT-DR-SCAN' if (tms) else 'RUN-TEST/IDLE'
151 elif self.state == 'SELECT-IR-SCAN':
152 self.state = 'TEST-LOGIC-RESET' if (tms) else 'CAPTURE-IR'
153 elif self.state == 'CAPTURE-IR':
154 self.state = 'EXIT1-IR' if (tms) else 'SHIFT-IR'
155 elif self.state == 'SHIFT-IR':
156 self.state = 'EXIT1-IR' if (tms) else 'SHIFT-IR'
157 elif self.state == 'EXIT1-IR':
158 self.state = 'UPDATE-IR' if (tms) else 'PAUSE-IR'
159 elif self.state == 'PAUSE-IR':
160 self.state = 'EXIT2-IR' if (tms) else 'PAUSE-IR'
161 elif self.state == 'EXIT2-IR':
162 self.state = 'UPDATE-IR' if (tms) else 'SHIFT-IR'
163 elif self.state == 'UPDATE-IR':
164 self.state = 'SELECT-DR-SCAN' if (tms) else 'RUN-TEST/IDLE'
166 def handle_rising_tck_edge(self, tdi, tdo, tck, tms):
167 # Rising TCK edges always advance the state machine.
168 self.advance_state_machine(tms)
171 # Save the start sample and item for later (no output yet).
172 self.ss_item = self.samplenum
175 # Output the saved item (from the last CLK edge to the current).
176 self.es_item = self.samplenum
177 # Output the old state (from last rising TCK edge to current one).
178 self.putx([jtag_states.index(self.oldstate), [self.oldstate]])
179 self.putp(['NEW STATE', self.state])
181 # Upon SHIFT-IR/SHIFT-DR collect the current TDI/TDO values.
182 if self.state.startswith('SHIFT-'):
184 self.ss_bitstring = self.samplenum
185 self.first_bit = False
187 self.putx([16, [str(self.bits_tdi[0])]])
188 self.putx([17, [str(self.bits_tdo[0])]])
189 self.putp([self.state[-2:] + ' TDI BIT', str(self.bits_tdi[0])])
190 self.putp([self.state[-2:] + ' TDO BIT', str(self.bits_tdo[0])])
191 self.bits_tdi.insert(0, tdi)
192 self.bits_tdo.insert(0, tdo)
194 # Output all TDI/TDO bits if we just switched from SHIFT-* to EXIT1-*.
195 if self.oldstate.startswith('SHIFT-') and \
196 self.state.startswith('EXIT1-'):
198 self.es_bitstring = self.samplenum
200 t = self.state[-2:] + ' TDI'
201 b = ''.join(map(str, self.bits_tdi))
202 h = ' (0x%x' % int('0b' + b, 2) + ')'
203 s = t + ': ' + b + h + ', ' + str(len(self.bits_tdi)) + ' bits'
204 self.putx_bs([18, [s]])
206 self.putx([16, [str(self.bits_tdi[0])]]) # Last bit.
207 self.putp([t + ' BIT', str(self.bits_tdi[0])]) # Last bit.
210 t = self.state[-2:] + ' TDO'
211 b = ''.join(map(str, self.bits_tdo))
212 h = ' (0x%x' % int('0b' + b, 2) + ')'
213 s = t + ': ' + b + h + ', ' + str(len(self.bits_tdo)) + ' bits'
214 self.putx_bs([19, [s]])
216 self.putx([17, [str(self.bits_tdo[0])]]) # Last bit.
217 self.putp([t + ' BIT', str(self.bits_tdo[0])]) # Last bit.
220 self.first_bit = True
222 self.ss_bitstring = self.samplenum
224 self.ss_item = self.samplenum
226 def decode(self, ss, es, data):
227 for (self.samplenum, pins) in data:
229 # If none of the pins changed, there's nothing to do.
230 if self.oldpins == pins:
233 # Store current pin values for the next round.
236 # Get individual pin values into local variables.
237 # Unused channels will have a value of > 1.
238 (tdi, tdo, tck, tms, trst, srst, rtck) = pins
240 # We only care about TCK edges (either rising or falling).
241 if (self.oldtck == tck):
244 # Store start/end sample for later usage.
245 self.ss, self.es = ss, es
247 if (self.oldtck == 0 and tck == 1):
248 self.handle_rising_tck_edge(tdi, tdo, tck, tms)