2 ## This file is part of the libsigrokdecode project.
4 ## Copyright (C) 2012-2013 Uwe Hermann <uwe@hermann-uwe.de>
6 ## This program is free software; you can redistribute it and/or modify
7 ## it under the terms of the GNU General Public License as published by
8 ## the Free Software Foundation; either version 2 of the License, or
9 ## (at your option) any later version.
11 ## This program is distributed in the hope that it will be useful,
12 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
13 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 ## GNU General Public License for more details.
16 ## You should have received a copy of the GNU General Public License
17 ## along with this program; if not, write to the Free Software
18 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
21 import sigrokdecode as srd
30 - 'NEW STATE': <pdata> is the new state of the JTAG state machine.
31 Valid values: 'TEST-LOGIC-RESET', 'RUN-TEST/IDLE', 'SELECT-DR-SCAN',
32 'CAPTURE-DR', 'SHIFT-DR', 'EXIT1-DR', 'PAUSE-DR', 'EXIT2-DR', 'UPDATE-DR',
33 'SELECT-IR-SCAN', 'CAPTURE-IR', 'SHIFT-IR', 'EXIT1-IR', 'PAUSE-IR',
34 'EXIT2-IR', 'UPDATE-IR'.
35 - 'IR TDI': Bitstring that was clocked into the IR register.
36 - 'IR TDO': Bitstring that was clocked out of the IR register.
37 - 'DR TDI': Bitstring that was clocked into the DR register.
38 - 'DR TDO': Bitstring that was clocked out of the DR register.
41 All bitstrings are a sequence of '1' and '0' characters. The right-most
42 character in the bitstring is the LSB. Example: '01110001' (1 is LSB).
47 'TEST-LOGIC-RESET', 'RUN-TEST/IDLE',
49 'SELECT-DR-SCAN', 'CAPTURE-DR', 'UPDATE-DR', 'PAUSE-DR',
50 'SHIFT-DR', 'EXIT1-DR', 'EXIT2-DR',
52 'SELECT-IR-SCAN', 'CAPTURE-IR', 'UPDATE-IR', 'PAUSE-IR',
53 'SHIFT-IR', 'EXIT1-IR', 'EXIT2-IR',
56 class Decoder(srd.Decoder):
60 longname = 'Joint Test Action Group (IEEE 1149.1)'
61 desc = 'Protocol for testing, debugging, and flashing ICs.'
66 {'id': 'tdi', 'name': 'TDI', 'desc': 'Test data input'},
67 {'id': 'tdo', 'name': 'TDO', 'desc': 'Test data output'},
68 {'id': 'tck', 'name': 'TCK', 'desc': 'Test clock'},
69 {'id': 'tms', 'name': 'TMS', 'desc': 'Test mode select'},
72 {'id': 'trst', 'name': 'TRST#', 'desc': 'Test reset'},
73 {'id': 'srst', 'name': 'SRST#', 'desc': 'System reset'},
74 {'id': 'rtck', 'name': 'RTCK', 'desc': 'Return clock signal'},
76 annotations = tuple([tuple([s.lower(), s]) for s in jtag_states])
78 def __init__(self, **kwargs):
79 # self.state = 'TEST-LOGIC-RESET'
80 self.state = 'RUN-TEST/IDLE'
82 self.oldpins = (-1, -1, -1, -1)
87 self.ss_item = self.es_item = None
88 self.saved_item = None
92 self.out_python = self.register(srd.OUTPUT_PYTHON)
93 self.out_ann = self.register(srd.OUTPUT_ANN)
96 self.put(self.ss_item, self.es_item, self.out_ann, data)
99 self.put(self.ss_item, self.es_item, self.out_python, data)
101 def advance_state_machine(self, tms):
102 self.oldstate = self.state
105 if self.state == 'TEST-LOGIC-RESET':
106 self.state = 'TEST-LOGIC-RESET' if (tms) else 'RUN-TEST/IDLE'
107 elif self.state == 'RUN-TEST/IDLE':
108 self.state = 'SELECT-DR-SCAN' if (tms) else 'RUN-TEST/IDLE'
111 elif self.state == 'SELECT-DR-SCAN':
112 self.state = 'SELECT-IR-SCAN' if (tms) else 'CAPTURE-DR'
113 elif self.state == 'CAPTURE-DR':
114 self.state = 'EXIT1-DR' if (tms) else 'SHIFT-DR'
115 elif self.state == 'SHIFT-DR':
116 self.state = 'EXIT1-DR' if (tms) else 'SHIFT-DR'
117 elif self.state == 'EXIT1-DR':
118 self.state = 'UPDATE-DR' if (tms) else 'PAUSE-DR'
119 elif self.state == 'PAUSE-DR':
120 self.state = 'EXIT2-DR' if (tms) else 'PAUSE-DR'
121 elif self.state == 'EXIT2-DR':
122 self.state = 'UPDATE-DR' if (tms) else 'SHIFT-DR'
123 elif self.state == 'UPDATE-DR':
124 self.state = 'SELECT-DR-SCAN' if (tms) else 'RUN-TEST/IDLE'
127 elif self.state == 'SELECT-IR-SCAN':
128 self.state = 'TEST-LOGIC-RESET' if (tms) else 'CAPTURE-IR'
129 elif self.state == 'CAPTURE-IR':
130 self.state = 'EXIT1-IR' if (tms) else 'SHIFT-IR'
131 elif self.state == 'SHIFT-IR':
132 self.state = 'EXIT1-IR' if (tms) else 'SHIFT-IR'
133 elif self.state == 'EXIT1-IR':
134 self.state = 'UPDATE-IR' if (tms) else 'PAUSE-IR'
135 elif self.state == 'PAUSE-IR':
136 self.state = 'EXIT2-IR' if (tms) else 'PAUSE-IR'
137 elif self.state == 'EXIT2-IR':
138 self.state = 'UPDATE-IR' if (tms) else 'SHIFT-IR'
139 elif self.state == 'UPDATE-IR':
140 self.state = 'SELECT-DR-SCAN' if (tms) else 'RUN-TEST/IDLE'
142 def handle_rising_tck_edge(self, tdi, tdo, tck, tms):
143 # Rising TCK edges always advance the state machine.
144 self.advance_state_machine(tms)
147 # Save the start sample and item for later (no output yet).
148 self.ss_item = self.samplenum
150 self.saved_item = self.state
152 # Output the saved item (from the last CLK edge to the current).
153 self.es_item = self.samplenum
154 # Output the state we just switched to.
155 self.putx([jtag_states.index(self.state), [self.state]])
156 self.putp(['NEW STATE', self.state])
157 self.ss_item = self.samplenum
158 self.saved_item = self.state
160 # If we went from SHIFT-IR to SHIFT-IR, or SHIFT-DR to SHIFT-DR,
161 # collect the current TDI/TDO values (upon rising TCK edge).
162 if self.state.startswith('SHIFT-') and self.oldstate == self.state:
163 self.bits_tdi.insert(0, tdi)
164 self.bits_tdo.insert(0, tdo)
165 # TODO: ANN/PROTO output.
166 # self.putx([0, ['TDI add: ' + str(tdi)]])
167 # self.putp([0, ['TDO add: ' + str(tdo)]])
169 # Output all TDI/TDO bits if we just switched from SHIFT-* to EXIT1-*.
170 if self.oldstate.startswith('SHIFT-') and \
171 self.state.startswith('EXIT1-'):
173 t = self.state[-2:] + ' TDI'
174 b = ''.join(map(str, self.bits_tdi))
175 h = ' (0x%x' % int('0b' + b, 2) + ')'
176 s = t + ': ' + b + h + ', ' + str(len(self.bits_tdi)) + ' bits'
177 # self.putx([0, [s]])
181 t = self.state[-2:] + ' TDO'
182 b = ''.join(map(str, self.bits_tdo))
183 h = ' (0x%x' % int('0b' + b, 2) + ')'
184 s = t + ': ' + b + h + ', ' + str(len(self.bits_tdo)) + ' bits'
185 # self.putx([0, [s]])
189 def decode(self, ss, es, data):
190 for (self.samplenum, pins) in data:
192 # If none of the pins changed, there's nothing to do.
193 if self.oldpins == pins:
196 # Store current pin values for the next round.
199 # Get individual pin values into local variables.
200 # Unused channels will have a value of > 1.
201 (tdi, tdo, tck, tms, trst, srst, rtck) = pins
203 # We only care about TCK edges (either rising or falling).
204 if (self.oldtck == tck):
207 # Store start/end sample for later usage.
208 self.ss, self.es = ss, es
210 # self.putx([0, ['tdi:%s, tdo:%s, tck:%s, tms:%s' \
211 # % (tdi, tdo, tck, tms)]])
213 if (self.oldtck == 0 and tck == 1):
214 self.handle_rising_tck_edge(tdi, tdo, tck, tms)