2 ## This file is part of the libsigrokdecode project.
4 ## Copyright (C) 2012-2013 Uwe Hermann <uwe@hermann-uwe.de>
6 ## This program is free software; you can redistribute it and/or modify
7 ## it under the terms of the GNU General Public License as published by
8 ## the Free Software Foundation; either version 2 of the License, or
9 ## (at your option) any later version.
11 ## This program is distributed in the hope that it will be useful,
12 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
13 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 ## GNU General Public License for more details.
16 ## You should have received a copy of the GNU General Public License
17 ## along with this program; if not, write to the Free Software
18 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
21 import sigrokdecode as srd
23 class Decoder(srd.Decoder):
27 longname = 'Controller Area Network'
28 desc = 'Field bus protocol for distributed realtime control.'
33 {'id': 'can_rx', 'name': 'CAN RX', 'desc': 'CAN bus line'},
36 {'id': 'bitrate', 'desc': 'Bitrate (bits/s)', 'default': 1000000},
37 {'id': 'sample_point', 'desc': 'Sample point (%)', 'default': 70.0},
40 ('data', 'CAN payload data'),
41 ('sof', 'Start of frame'),
42 ('eof', 'End of frame'),
44 ('ext-id', 'Extended identifier'),
45 ('full-id', 'Full identifier'),
46 ('ide', 'Identifier extension bit'),
47 ('reserved-bit', 'Reserved bit 0 and 1'),
48 ('rtr', 'Remote transmission request'),
49 ('srr', 'Substitute remote request'),
50 ('dlc', 'Data length count'),
51 ('crc-sequence', 'CRC sequence'),
52 ('crc-delimiter', 'CRC delimiter'),
53 ('ack-slot', 'ACK slot'),
54 ('ack-delimiter', 'ACK delimiter'),
55 ('stuff-bit', 'Stuff bit'),
56 ('warnings', 'Human-readable warnings'),
59 def __init__(self, **kwargs):
60 self.samplerate = None
61 self.reset_variables()
64 # self.out_python = self.register(srd.OUTPUT_PYTHON)
65 self.out_ann = self.register(srd.OUTPUT_ANN)
67 def metadata(self, key, value):
68 if key == srd.SRD_CONF_SAMPLERATE:
69 self.samplerate = value
70 self.bit_width = float(self.samplerate) / float(self.options['bitrate'])
71 self.bitpos = (self.bit_width / 100.0) * self.options['sample_point']
73 # Generic helper for CAN bit annotations.
74 def putg(self, ss, es, data):
75 left, right = int(self.bitpos), int(self.bit_width - self.bitpos)
76 self.put(ss - left, es + right, self.out_ann, data)
78 # Single-CAN-bit annotation using the current samplenum.
80 self.putg(self.samplenum, self.samplenum, data)
82 # Single-CAN-bit annotation using the samplenum of CAN bit 12.
83 def put12(self, data):
84 self.putg(self.ss_bit12, self.ss_bit12, data)
86 # Multi-CAN-bit annotation from self.ss_block to current samplenum.
88 self.putg(self.ss_block, self.samplenum, data)
90 def reset_variables(self):
92 self.sof = self.frame_type = self.dlc = None
93 self.rawbits = [] # All bits, including stuff bits
94 self.bits = [] # Only actual CAN frame bits (no stuff bits)
95 self.curbit = 0 # Current bit of CAN frame (bit 0 == SOF)
96 self.last_databit = 999 # Positive value that bitnum+x will never match
99 self.ss_databytebits = []
101 # Return True if we reached the desired bit position, False otherwise.
102 def reached_bit(self, bitnum):
103 bitpos = int(self.sof + (self.bit_width * bitnum) + self.bitpos)
104 if self.samplenum >= bitpos:
108 def is_stuff_bit(self):
109 # CAN uses NRZ encoding and bit stuffing.
110 # After 5 identical bits, a stuff bit of opposite value is added.
111 last_6_bits = self.rawbits[-6:]
112 if last_6_bits not in ([0, 0, 0, 0, 0, 1], [1, 1, 1, 1, 1, 0]):
115 # Stuff bit. Keep it in self.rawbits, but drop it from self.bits.
116 self.putx([15, ['Stuff bit: %d' % self.rawbits[-1],
117 'SB: %d' % self.rawbits[-1], 'SB']])
118 self.bits.pop() # Drop last bit.
121 def is_valid_crc(self, crc_bits):
124 def decode_error_frame(self, bits):
127 def decode_overload_frame(self, bits):
130 # Both standard and extended frames end with CRC, CRC delimiter, ACK,
131 # ACK delimiter, and EOF fields. Handle them in a common function.
132 # Returns True if the frame ended (EOF), False otherwise.
133 def decode_frame_end(self, can_rx, bitnum):
135 # Remember start of CRC sequence (see below).
136 if bitnum == (self.last_databit + 1):
137 self.ss_block = self.samplenum
139 # CRC sequence (15 bits)
140 elif bitnum == (self.last_databit + 15):
141 x = self.last_databit + 1
142 crc_bits = self.bits[x:x + 15 + 1]
143 self.crc = int(''.join(str(d) for d in crc_bits), 2)
144 self.putb([11, ['CRC sequence: 0x%04x' % self.crc,
145 'CRC: 0x%04x' % self.crc, 'CRC']])
146 if not self.is_valid_crc(crc_bits):
147 self.putb([16, ['CRC is invalid']])
149 # CRC delimiter bit (recessive)
150 elif bitnum == (self.last_databit + 16):
151 self.putx([12, ['CRC delimiter: %d' % can_rx,
152 'CRC d: %d' % can_rx, 'CRC d']])
154 # ACK slot bit (dominant: ACK, recessive: NACK)
155 elif bitnum == (self.last_databit + 17):
156 ack = 'ACK' if can_rx == 0 else 'NACK'
157 self.putx([13, ['ACK slot: %s' % ack, 'ACK s: %s' % ack, 'ACK s']])
159 # ACK delimiter bit (recessive)
160 elif bitnum == (self.last_databit + 18):
161 self.putx([14, ['ACK delimiter: %d' % can_rx,
162 'ACK d: %d' % can_rx, 'ACK d']])
164 # Remember start of EOF (see below).
165 elif bitnum == (self.last_databit + 19):
166 self.ss_block = self.samplenum
168 # End of frame (EOF), 7 recessive bits
169 elif bitnum == (self.last_databit + 25):
170 self.putb([2, ['End of frame', 'EOF', 'E']])
171 self.reset_variables()
176 # Returns True if the frame ended (EOF), False otherwise.
177 def decode_standard_frame(self, can_rx, bitnum):
179 # Bit 14: RB0 (reserved bit)
180 # Has to be sent dominant, but receivers should accept recessive too.
182 self.putx([7, ['Reserved bit 0: %d' % can_rx,
183 'RB0: %d' % can_rx, 'RB0']])
185 # Bit 12: Remote transmission request (RTR) bit
186 # Data frame: dominant, remote frame: recessive
187 # Remote frames do not contain a data field.
188 rtr = 'remote' if self.bits[12] == 1 else 'data'
189 self.put12([8, ['Remote transmission request: %s frame' % rtr,
190 'RTR: %s frame' % rtr, 'RTR']])
192 # Remember start of DLC (see below).
194 self.ss_block = self.samplenum
196 # Bits 15-18: Data length code (DLC), in number of bytes (0-8).
198 self.dlc = int(''.join(str(d) for d in self.bits[15:18 + 1]), 2)
199 self.putb([10, ['Data length code: %d' % self.dlc,
200 'DLC: %d' % self.dlc, 'DLC']])
201 self.last_databit = 18 + (self.dlc * 8)
203 # Remember all databyte bits, except the very last one.
204 elif bitnum in range(19, self.last_databit):
205 self.ss_databytebits.append(self.samplenum)
207 # Bits 19-X: Data field (0-8 bytes, depending on DLC)
208 # The bits within a data byte are transferred MSB-first.
209 elif bitnum == self.last_databit:
210 self.ss_databytebits.append(self.samplenum) # Last databyte bit.
211 for i in range(self.dlc):
213 b = int(''.join(str(d) for d in self.bits[x:x + 8]), 2)
214 ss = self.ss_databytebits[i * 8]
215 es = self.ss_databytebits[((i + 1) * 8) - 1]
216 self.putg(ss, es, [0, ['Data byte %d: 0x%02x' % (i, b),
217 'DB %d: 0x%02x' % (i, b), 'DB']])
218 self.ss_databytebits = []
220 elif bitnum > self.last_databit:
221 return self.decode_frame_end(can_rx, bitnum)
225 # Returns True if the frame ended (EOF), False otherwise.
226 def decode_extended_frame(self, can_rx, bitnum):
228 # Remember start of EID (see below).
230 self.ss_block = self.samplenum
232 # Bits 14-31: Extended identifier (EID[17..0])
234 self.eid = int(''.join(str(d) for d in self.bits[14:]), 2)
235 s = '%d (0x%x)' % (self.eid, self.eid)
236 self.putb([4, ['Extended Identifier: %s' % s,
237 'Extended ID: %s' % s, 'Extended ID', 'EID']])
239 self.fullid = self.id << 18 | self.eid
240 s = '%d (0x%x)' % (self.fullid, self.fullid)
241 self.putb([5, ['Full Identifier: %s' % s, 'Full ID: %s' % s,
244 # Bit 12: Substitute remote request (SRR) bit
245 self.put12([9, ['Substitute remote request: %d' % self.bits[12],
246 'SRR: %d' % self.bits[12], 'SRR']])
248 # Bit 32: Remote transmission request (RTR) bit
249 # Data frame: dominant, remote frame: recessive
250 # Remote frames do not contain a data field.
252 rtr = 'remote' if can_rx == 1 else 'data'
253 self.putx([8, ['Remote transmission request: %s frame' % rtr,
254 'RTR: %s frame' % rtr, 'RTR']])
256 # Bit 33: RB1 (reserved bit)
258 self.putx([7, ['Reserved bit 1: %d' % can_rx,
259 'RB1: %d' % can_rx, 'RB1']])
261 # Bit 34: RB0 (reserved bit)
263 self.putx([7, ['Reserved bit 0: %d' % can_rx,
264 'RB0: %d' % can_rx, 'RB0']])
266 # Remember start of DLC (see below).
268 self.ss_block = self.samplenum
270 # Bits 35-38: Data length code (DLC), in number of bytes (0-8).
272 self.dlc = int(''.join(str(d) for d in self.bits[35:38 + 1]), 2)
273 self.putb([10, ['Data length code: %d' % self.dlc,
274 'DLC: %d' % self.dlc, 'DLC']])
275 self.last_databit = 38 + (self.dlc * 8)
277 # Remember all databyte bits, except the very last one.
278 elif bitnum in range(39, self.last_databit):
279 self.ss_databytebits.append(self.samplenum)
281 # Bits 39-X: Data field (0-8 bytes, depending on DLC)
282 # The bits within a data byte are transferred MSB-first.
283 elif bitnum == self.last_databit:
284 self.ss_databytebits.append(self.samplenum) # Last databyte bit.
285 for i in range(self.dlc):
287 b = int(''.join(str(d) for d in self.bits[x:x + 8]), 2)
288 ss = self.ss_databytebits[i * 8]
289 es = self.ss_databytebits[((i + 1) * 8) - 1]
290 self.putg(ss, es, [0, ['Data byte %d: 0x%02x' % (i, b),
291 'DB %d: 0x%02x' % (i, b), 'DB']])
292 self.ss_databytebits = []
294 elif bitnum > self.last_databit:
295 return self.decode_frame_end(can_rx, bitnum)
299 def handle_bit(self, can_rx):
300 self.rawbits.append(can_rx)
301 self.bits.append(can_rx)
303 # Get the index of the current CAN frame bit (without stuff bits).
304 bitnum = len(self.bits) - 1
307 # self.putx([0, ['Bit %d (CAN bit %d): %d' % \
308 # (self.curbit, bitnum, can_rx)]])
310 # If this is a stuff bit, remove it from self.bits and ignore it.
311 if self.is_stuff_bit():
312 self.curbit += 1 # Increase self.curbit (bitnum is not affected).
315 # Bit 0: Start of frame (SOF) bit
318 self.putx([1, ['Start of frame', 'SOF', 'S']])
320 self.putx([16, ['Start of frame (SOF) must be a dominant bit']])
322 # Remember start of ID (see below).
324 self.ss_block = self.samplenum
326 # Bits 1-11: Identifier (ID[10..0])
327 # The bits ID[10..4] must NOT be all recessive.
329 self.id = int(''.join(str(d) for d in self.bits[1:]), 2)
330 s = '%d (0x%x)' % (self.id, self.id),
331 self.putb([3, ['Identifier: %s' % s, 'ID: %s' % s, 'ID']])
333 # RTR or SRR bit, depending on frame type (gets handled later).
335 # self.putx([0, ['RTR/SRR: %d' % can_rx]]) # Debug only.
336 self.ss_bit12 = self.samplenum
338 # Bit 13: Identifier extension (IDE) bit
339 # Standard frame: dominant, extended frame: recessive
341 ide = self.frame_type = 'standard' if can_rx == 0 else 'extended'
342 self.putx([6, ['Identifier extension bit: %s frame' % ide,
343 'IDE: %s frame' % ide, 'IDE']])
345 # Bits 14-X: Frame-type dependent, passed to the resp. handlers.
347 if self.frame_type == 'standard':
348 done = self.decode_standard_frame(can_rx, bitnum)
350 done = self.decode_extended_frame(can_rx, bitnum)
352 # The handlers return True if a frame ended (EOF).
356 # After a frame there are 3 intermission bits (recessive).
357 # After these bits, the bus is considered free.
361 def decode(self, ss, es, data):
362 if self.samplerate is None:
363 raise Exception("Cannot decode without samplerate.")
364 for (self.samplenum, pins) in data:
369 if self.state == 'IDLE':
370 # Wait for a dominant state (logic 0) on the bus.
373 self.sof = self.samplenum
374 self.state = 'GET BITS'
375 elif self.state == 'GET BITS':
376 # Wait until we're in the correct bit/sampling position.
377 if not self.reached_bit(self.curbit):
379 self.handle_bit(can_rx)
381 raise Exception("Invalid state: %s" % self.state)