2 ## This file is part of the libsigrokdecode project.
4 ## Copyright (C) 2018 Michalis Pappas <mpappas@fastmail.fm>
6 ## This program is free software; you can redistribute it and/or modify
7 ## it under the terms of the GNU General Public License as published by
8 ## the Free Software Foundation; either version 2 of the License, or
9 ## (at your option) any later version.
11 ## This program is distributed in the hope that it will be useful,
12 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
13 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 ## GNU General Public License for more details.
16 ## You should have received a copy of the GNU General Public License
17 ## along with this program; if not, see <http://www.gnu.org/licenses/>.
20 import sigrokdecode as srd
22 WORD_ADDR_RESET = 0x00
23 WORD_ADDR_SLEEP = 0x01
25 WORD_ADDR_COMMAND = 0x03
27 WORD_ADDR = {0x00: 'RESET', 0x01: 'SLEEP', 0x02: 'IDLE', 0x03: 'COMMAND'}
29 OPCODE_DERIVE_KEY = 0x1c
33 OPCODE_CHECK_MAC = 0x28
41 OPCODE_UPDATE_EXTRA = 0x20
65 ZONES = {0x00: 'CONFIG', 0x01: 'OTP', 0x02: 'DATA'}
68 STATUS_CHECKMAC_FAIL = 0x01
69 STATUS_PARSE_ERROR = 0x03
70 STATUS_EXECUTION_ERROR = 0x0f
72 STATUS_CRC_COMM_ERROR = 0xff
75 0x00: 'Command success',
76 0x01: 'Checkmac failure',
78 0x0f: 'Execution error',
80 0xff: 'CRC / communications error',
83 class Decoder(srd.Decoder):
87 longname = 'Microchip ATSHA204A'
88 desc = 'Microchip ATSHA204A CryptoAuthentication device'
91 outputs = ['atsha204a']
93 ('waddr', 'Word address'),
100 ('status', 'Status'),
101 ('warning', 'Warning'),
104 ('frame', 'Frame', (0, 1, 2, 3, 4, 5, 6)),
105 ('status', 'Status', (7,)),
106 ('warnings', 'Warnings', (8,)),
111 self.waddr = self.opcode = -1
112 self.ss_block = self.es_block = 0
116 self.out_ann = self.register(srd.OUTPUT_ANN)
118 def output_tx_bytes(self):
119 if len(self.bytes) < 1: # Ignore wakeup.
121 self.waddr = self.bytes[0][2]
122 self.display_waddr(self.bytes[0])
123 if self.waddr == WORD_ADDR_COMMAND:
124 count = self.bytes[1][2]
125 self.display_count(self.bytes[1])
126 if len(self.bytes) - 1 != count:
127 self.display_warning(self.bytes[0][0], self.bytes[-1][1],
128 'Invalid frame length: Got {}, expecting {} '.format(
129 len(self.bytes) - 1, count))
131 self.opcode = self.bytes[2][2]
132 self.display_opcode(self.bytes[2])
133 self.display_param1(self.bytes[3])
134 self.display_param2([self.bytes[4], self.bytes[5]])
135 self.display_data(self.bytes[6:-2])
136 self.display_crc([self.bytes[-2], self.bytes[-1]])
138 def output_rx_bytes(self):
139 count = self.bytes[0][2]
140 self.display_count(self.bytes[0])
141 if self.waddr == WORD_ADDR_RESET:
142 self.display_data([self.bytes[1]])
143 self.display_crc([self.bytes[2], self.bytes[3]])
144 self.display_status(self.bytes[0][0], self.bytes[-1][1], self.bytes[1][2])
145 elif self.waddr == WORD_ADDR_COMMAND:
146 if count == 4: # Status / Error.
147 self.display_data([self.bytes[1]])
148 self.display_crc([self.bytes[2], self.bytes[3]])
149 self.display_status(self.bytes[0][0], self.bytes[-1][1], self.bytes[1][2])
151 self.display_data(self.bytes[1:-2])
152 self.display_crc([self.bytes[-2], self.bytes[-1]])
154 def display_waddr(self, data):
155 self.put(data[0], data[1], self.out_ann, [0, ['Word addr: %s' % WORD_ADDR[data[2]]]])
157 def display_count(self, data):
158 self.put(data[0], data[1], self.out_ann, [1, ['Count: %s' % data[2]]])
160 def display_opcode(self, data):
161 self.put(data[0], data[1], self.out_ann, [2, ['Opcode: %s' % OPCODES[data[2]]]])
163 def display_param1(self, data):
164 if (self.opcode == OPCODE_CHECK_MAC) or (self.opcode == OPCODE_DEV_REV) or \
165 (self.opcode == OPCODE_HMAC) or (self.opcode == OPCODE_MAC) or \
166 (self.opcode == OPCODE_NONCE) or (self.opcode == OPCODE_RANDOM) or \
167 (self.opcode == OPCODE_SHA):
168 self.put(data[0], data[1], self.out_ann, [3, ['Mode: %02X' % data[2]]])
169 elif self.opcode == OPCODE_DERIVE_KEY:
170 self.put(data[0], data[1], self.out_ann, [3, ['Random: %s' % data[2]]])
171 elif self.opcode == OPCODE_GEN_DIG:
172 self.put(data[0], data[1], self.out_ann, [3, ['Zone: %s' % ZONES[data[2]]]])
173 elif self.opcode == OPCODE_LOCK:
174 self.put(data[0], data[1], self.out_ann, [3, ['Zone: {}, Summary: {}'.format(
175 'DATA/OTP' if data[2] else 'CONFIG',
176 'Ignored' if data[2] & 0x80 else 'Used')]])
177 elif self.opcode == OPCODE_PAUSE:
178 self.put(data[0], data[1], self.out_ann, [3, ['Selector: %02X' % data[2]]])
179 elif self.opcode == OPCODE_READ:
180 self.put(data[0], data[1], self.out_ann, [3, ['Zone: {}, Length: {}'.format(ZONES[data[2] & 0x03],
181 '32 bytes' if data[2] & 0x90 else '4 bytes')]])
182 elif self.opcode == OPCODE_WRITE:
183 self.put(data[0], data[1], self.out_ann, [3, ['Zone: {}, Encrypted: {}, Length: {}'.format(ZONES[data[2] & 0x03],
184 'Yes' if data[2] & 0x40 else 'No', '32 bytes' if data[2] & 0x90 else '4 bytes')]])
186 self.put(data[0], data[1], self.out_ann, [3, ['Param1: %02X' % data[2]]])
188 def display_param2(self, data):
189 if self.opcode == OPCODE_DERIVE_KEY:
190 self.put(data[0][0], data[1][1], self.out_ann, [4, ['TargetKey: {:02x} {:02x}'.format(data[1][2], data[0][2])]])
191 elif (self.opcode == OPCODE_NONCE) or (self.opcode == OPCODE_PAUSE) or (self.opcode == OPCODE_RANDOM):
192 self.put(data[0][0], data[1][1], self.out_ann, [4, ['Zero: {:02x} {:02x}'.format(data[1][2], data[0][2])]])
193 elif (self.opcode == OPCODE_HMAC) or (self.opcode == OPCODE_MAC) or \
194 (self.opcode == OPCODE_CHECK_MAC) or (self.opcode == OPCODE_GEN_DIG):
195 self.put(data[0][0], data[1][1], self.out_ann, [4, ['SlotID: {:02x} {:02x}'.format(data[1][2], data[0][2])]])
196 elif self.opcode == OPCODE_LOCK:
197 self.put(data[0][0], data[1][1], self.out_ann, [4, ['Summary: {:02x} {:02x}'.format(data[1][2], data[0][2])]])
198 elif (self.opcode == OPCODE_READ) or (self.opcode == OPCODE_WRITE):
199 self.put(data[0][0], data[1][1], self.out_ann, [4, ['Address: {:02x} {:02x}'.format(data[1][2], data[0][2])]])
200 elif self.opcode == OPCODE_UPDATE_EXTRA:
201 self.put(data[0][0], data[1][1], self.out_ann, [4, ['NewValue: {:02x}'.format(data[0][2])]])
203 self.put(data[0][0], data[1][1], self.out_ann, [4, ['-']])
205 def display_data(self, data):
208 if self.opcode == OPCODE_CHECK_MAC:
209 self.put(data[0][0], data[31][1], self.out_ann, [5, ['ClientChal: %s' % ' '.join(format(i[2], '02x') for i in data[0:31])]])
210 self.put(data[32][0], data[63][1], self.out_ann, [5, ['ClientResp: %s' % ' '.join(format(i[2], '02x') for i in data[32:63])]])
211 self.put(data[64][0], data[76][1], self.out_ann, [5, ['OtherData: %s' % ' '.join(format(i[2], '02x') for i in data[64:76])]])
212 elif self.opcode == OPCODE_DERIVE_KEY:
213 self.put(data[0][0], data[31][1], self.out_ann, [5, ['MAC: %s' % ' '.join(format(i[2], '02x') for i in data)]])
214 elif self.opcode == OPCODE_GEN_DIG:
215 self.put(data[0][0], data[3][1], self.out_ann, [5, ['OtherData: %s' % ' '.join(format(i[2], '02x') for i in data)]])
216 elif self.opcode == OPCODE_MAC:
217 self.put(data[0][0], data[31][1], self.out_ann, [5, ['Challenge: %s' % ' '.join(format(i[2], '02x') for i in data)]])
218 elif self.opcode == OPCODE_WRITE:
219 if len(data) > 32: # Value + MAC.
220 self.put(data[0][0], data[-31][1], self.out_ann, [5, ['Value: %s' % ' '.join(format(i[2], '02x') for i in data)]])
221 self.put(data[-32][0], data[-1][1], self.out_ann, [5, ['MAC: %s' % ' '.join(format(i[2], '02x') for i in data)]])
223 self.put(data[0][0], data[-1][1], self.out_ann, [5, ['Value: %s' % ' '.join(format(i[2], '02x') for i in data)]])
225 self.put(data[0][0], data[-1][1], self.out_ann, [5, ['Data: %s' % ' '.join(format(i[2], '02x') for i in data)]])
227 def display_crc(self, data):
228 self.put(data[0][0], data[1][1], self.out_ann, [6, ['CRC: {:02X} {:02X}'.format(data[0][2], data[1][2])]])
230 def display_status(self, start, end, status):
231 self.put(start, end, self.out_ann, [7, ['Status: %s' % STATUS[status]]])
233 def display_warning(self, start, end, msg):
234 self.put(start, end, self.out_ann, [8, ['Warning: %s' % msg]])
236 def decode(self, ss, es, data):
240 if self.state == 'IDLE':
241 # Wait for an I²C START condition.
244 self.state = 'GET SLAVE ADDR'
246 elif self.state == 'GET SLAVE ADDR':
247 # Wait for an address read/write operation.
248 if cmd == 'ADDRESS READ':
249 self.state = 'READ REGS'
250 elif cmd == 'ADDRESS WRITE':
251 self.state = 'WRITE REGS'
252 elif self.state == 'READ REGS':
253 if cmd == 'DATA READ':
254 self.bytes.append([ss, es, databyte])
257 # Reset the opcode before received data, as this causes
258 # responses to be displayed incorrectly.
260 self.output_rx_bytes()
264 elif self.state == 'WRITE REGS':
265 if cmd == 'DATA WRITE':
266 self.bytes.append([ss, es, databyte])
269 self.output_tx_bytes()