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hw_init(): Save struct sr_context * parameter in struct drv_context
[libsigrok.git] / hardware / hantek-dso / api.c
CommitLineData
3b533202
BV
1/*
2 * This file is part of the sigrok project.
3 *
4 * Copyright (C) 2012 Bert Vermeulen <bert@biot.com>
5 *
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include <stdio.h>
21#include <stdint.h>
22#include <stdlib.h>
23#include <sys/types.h>
24#include <sys/stat.h>
25#include <fcntl.h>
26#include <unistd.h>
27#include <string.h>
28#include <sys/time.h>
29#include <inttypes.h>
3b533202
BV
30#include <glib.h>
31#include <libusb.h>
45c59c8b
BV
32#include "libsigrok.h"
33#include "libsigrok-internal.h"
3b533202
BV
34#include "dso.h"
35
fc8fe3e3
BV
36/* Max time in ms before we want to check on USB events */
37/* TODO tune this properly */
e98b7f1b 38#define TICK 1
3b533202 39
62bb8840 40static const int hwcaps[] = {
3b533202 41 SR_HWCAP_OSCILLOSCOPE,
ae88b97b 42 SR_HWCAP_LIMIT_SAMPLES,
3b533202 43 SR_HWCAP_CONTINUOUS,
a370ef19
BV
44 SR_HWCAP_TIMEBASE,
45 SR_HWCAP_BUFFERSIZE,
46 SR_HWCAP_TRIGGER_SOURCE,
47 SR_HWCAP_TRIGGER_SLOPE,
48 SR_HWCAP_HORIZ_TRIGGERPOS,
ebb781a6 49 SR_HWCAP_FILTER,
313deed2 50 SR_HWCAP_VDIV,
4a090d72 51 SR_HWCAP_COUPLING,
3b533202
BV
52 0,
53};
54
55static const char *probe_names[] = {
56 "CH1",
57 "CH2",
58 NULL,
59};
60
62bb8840 61static const struct dso_profile dev_profiles[] = {
88a13f30 62 { 0x04b4, 0x2090, 0x04b5, 0x2090,
3b533202 63 "Hantek", "DSO-2090",
88a13f30
BV
64 FIRMWARE_DIR "/hantek-dso-2xxx.fw" },
65 { 0x04b4, 0x2150, 0x04b5, 0x2150,
66 "Hantek", "DSO-2150",
67 FIRMWARE_DIR "/hantek-dso-2xxx.fw" },
68 { 0x04b4, 0x2250, 0x04b5, 0x2250,
69 "Hantek", "DSO-2250",
70 FIRMWARE_DIR "/hantek-dso-2xxx.fw" },
71 { 0x04b4, 0x5200, 0x04b5, 0x5200,
72 "Hantek", "DSO-5200",
73 FIRMWARE_DIR "/hantek-dso-5xxx.fw" },
74 { 0x04b4, 0x520a, 0x04b5, 0x520a,
75 "Hantek", "DSO-5200A",
76 FIRMWARE_DIR "/hantek-dso-5xxx.fw" },
77 { 0, 0, 0, 0, 0, 0, 0 },
3b533202
BV
78};
79
62bb8840 80static const uint64_t buffersizes[] = {
a370ef19
BV
81 10240,
82 32768,
83 /* TODO: 65535 */
62bb8840 84 0,
a370ef19
BV
85};
86
62bb8840 87static const struct sr_rational timebases[] = {
a370ef19
BV
88 /* microseconds */
89 { 10, 1000000 },
90 { 20, 1000000 },
91 { 40, 1000000 },
92 { 100, 1000000 },
93 { 200, 1000000 },
94 { 400, 1000000 },
95 /* milliseconds */
96 { 1, 1000 },
97 { 2, 1000 },
98 { 4, 1000 },
99 { 10, 1000 },
100 { 20, 1000 },
101 { 40, 1000 },
102 { 100, 1000 },
103 { 200, 1000 },
104 { 400, 1000 },
62bb8840 105 { 0, 0},
a370ef19
BV
106};
107
62bb8840 108static const struct sr_rational vdivs[] = {
313deed2
BV
109 /* millivolts */
110 { 10, 1000 },
111 { 20, 1000 },
112 { 50, 1000 },
113 { 100, 1000 },
114 { 200, 1000 },
115 { 500, 1000 },
116 /* volts */
117 { 1, 1 },
118 { 2, 1 },
119 { 5, 1 },
62bb8840 120 { 0, 0 },
313deed2
BV
121};
122
62bb8840 123static const char *trigger_sources[] = {
a370ef19
BV
124 "CH1",
125 "CH2",
126 "EXT",
88a13f30 127 /* TODO: forced */
62bb8840 128 NULL,
a370ef19 129};
3b533202 130
62bb8840 131static const char *filter_targets[] = {
ebb781a6
BV
132 "CH1",
133 "CH2",
134 /* TODO: "TRIGGER", */
62bb8840 135 NULL,
ebb781a6
BV
136};
137
62bb8840 138static const char *coupling[] = {
b58fbd99
BV
139 "AC",
140 "DC",
141 "GND",
62bb8840 142 NULL,
b58fbd99
BV
143};
144
982947f7
BV
145SR_PRIV struct sr_dev_driver hantek_dso_driver_info;
146static struct sr_dev_driver *hdi = &hantek_dso_driver_info;
e98b7f1b 147
69b07d14 148static int hw_dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data);
3b533202 149
62bb8840 150static struct sr_dev_inst *dso_dev_new(int index, const struct dso_profile *prof)
3b533202
BV
151{
152 struct sr_dev_inst *sdi;
87ca93c5 153 struct sr_probe *probe;
269971dd
BV
154 struct drv_context *drvc;
155 struct dev_context *devc;
87ca93c5 156 int i;
3b533202
BV
157
158 sdi = sr_dev_inst_new(index, SR_ST_INITIALIZING,
88a13f30 159 prof->vendor, prof->model, NULL);
3b533202
BV
160 if (!sdi)
161 return NULL;
b0c8d7ac 162 sdi->driver = hdi;
3b533202 163
e98b7f1b
UH
164 /*
165 * Add only the real probes -- EXT isn't a source of data, only
87ca93c5
BV
166 * a trigger source internal to the device.
167 */
168 for (i = 0; probe_names[i]; i++) {
169 if (!(probe = sr_probe_new(i, SR_PROBE_ANALOG, TRUE,
170 probe_names[i])))
171 return NULL;
172 sdi->probes = g_slist_append(sdi->probes, probe);
173 }
174
269971dd 175 if (!(devc = g_try_malloc0(sizeof(struct dev_context)))) {
e98b7f1b 176 sr_err("Device context malloc failed.");
3b533202
BV
177 return NULL;
178 }
e98b7f1b 179
269971dd
BV
180 devc->profile = prof;
181 devc->dev_state = IDLE;
182 devc->timebase = DEFAULT_TIMEBASE;
183 devc->ch1_enabled = TRUE;
184 devc->ch2_enabled = TRUE;
185 devc->voltage_ch1 = DEFAULT_VOLTAGE;
186 devc->voltage_ch2 = DEFAULT_VOLTAGE;
187 devc->coupling_ch1 = DEFAULT_COUPLING;
188 devc->coupling_ch2 = DEFAULT_COUPLING;
189 devc->voffset_ch1 = DEFAULT_VERT_OFFSET;
190 devc->voffset_ch2 = DEFAULT_VERT_OFFSET;
191 devc->voffset_trigger = DEFAULT_VERT_TRIGGERPOS;
192 devc->framesize = DEFAULT_FRAMESIZE;
193 devc->triggerslope = SLOPE_POSITIVE;
194 devc->triggersource = g_strdup(DEFAULT_TRIGGER_SOURCE);
195 devc->triggerposition = DEFAULT_HORIZ_TRIGGERPOS;
196 sdi->priv = devc;
197 drvc = hdi->priv;
198 drvc->instances = g_slist_append(drvc->instances, sdi);
3b533202
BV
199
200 return sdi;
201}
202
014359e3 203static int configure_probes(const struct sr_dev_inst *sdi)
3b533202 204{
014359e3 205 struct dev_context *devc;
62bb8840
UH
206 const struct sr_probe *probe;
207 const GSList *l;
3b533202 208
014359e3
BV
209 devc = sdi->priv;
210
269971dd 211 devc->ch1_enabled = devc->ch2_enabled = FALSE;
014359e3 212 for (l = sdi->probes; l; l = l->next) {
3b533202 213 probe = (struct sr_probe *)l->data;
b35c8293 214 if (probe->index == 0)
269971dd 215 devc->ch1_enabled = probe->enabled;
b35c8293 216 else if (probe->index == 1)
269971dd 217 devc->ch2_enabled = probe->enabled;
3b533202
BV
218 }
219
220 return SR_OK;
221}
222
39cfdd75 223/* Properly close and free all devices. */
811deee4 224static int clear_instances(void)
39cfdd75
BV
225{
226 struct sr_dev_inst *sdi;
269971dd
BV
227 struct drv_context *drvc;
228 struct dev_context *devc;
39cfdd75
BV
229 GSList *l;
230
269971dd
BV
231 drvc = hdi->priv;
232 for (l = drvc->instances; l; l = l->next) {
39cfdd75
BV
233 if (!(sdi = l->data)) {
234 /* Log error, but continue cleaning up the rest. */
e98b7f1b 235 sr_err("%s: sdi was NULL, continuing", __func__);
39cfdd75
BV
236 continue;
237 }
269971dd 238 if (!(devc = sdi->priv)) {
39cfdd75 239 /* Log error, but continue cleaning up the rest. */
e98b7f1b 240 sr_err("%s: sdi->priv was NULL, continuing", __func__);
39cfdd75
BV
241 continue;
242 }
243 dso_close(sdi);
269971dd
BV
244 sr_usb_dev_inst_free(devc->usb);
245 g_free(devc->triggersource);
39cfdd75
BV
246
247 sr_dev_inst_free(sdi);
248 }
249
269971dd
BV
250 g_slist_free(drvc->instances);
251 drvc->instances = NULL;
39cfdd75 252
811deee4 253 return SR_OK;
39cfdd75
BV
254}
255
34f06b90 256static int hw_init(struct sr_context *sr_ctx)
61136ea6 257{
269971dd
BV
258 struct drv_context *drvc;
259
260 if (!(drvc = g_try_malloc0(sizeof(struct drv_context)))) {
e98b7f1b 261 sr_err("Driver context malloc failed.");
886a52b6 262 return SR_ERR_MALLOC;
269971dd 263 }
61136ea6 264
19b0cce3 265 if (libusb_init(NULL) != 0) {
269971dd 266 g_free(drvc);
e98b7f1b 267 sr_err("Failed to initialize USB.");
61136ea6
BV
268 return SR_ERR;
269 }
270
1ebe4b4e 271 drvc->sr_ctx = sr_ctx;
269971dd
BV
272 hdi->priv = drvc;
273
61136ea6
BV
274 return SR_OK;
275}
276
39cfdd75 277static GSList *hw_scan(GSList *options)
3b533202
BV
278{
279 struct sr_dev_inst *sdi;
62bb8840 280 const struct dso_profile *prof;
269971dd
BV
281 struct drv_context *drvc;
282 struct dev_context *devc;
39cfdd75
BV
283 GSList *devices;
284 struct libusb_device_descriptor des;
3b533202 285 libusb_device **devlist;
61136ea6 286 int devcnt, ret, i, j;
3b533202 287
39cfdd75 288 (void)options;
e98b7f1b 289
3b533202 290 devcnt = 0;
39cfdd75 291 devices = 0;
269971dd
BV
292 drvc = hdi->priv;
293 drvc->instances = NULL;
39cfdd75
BV
294
295 clear_instances();
296
297 /* Find all Hantek DSO devices and upload firmware to all of them. */
19b0cce3 298 libusb_get_device_list(NULL, &devlist);
3b533202 299 for (i = 0; devlist[i]; i++) {
61136ea6 300 if ((ret = libusb_get_device_descriptor(devlist[i], &des))) {
e98b7f1b 301 sr_err("Failed to get device descriptor: %d.", ret);
3b533202
BV
302 continue;
303 }
304
305 prof = NULL;
306 for (j = 0; dev_profiles[j].orig_vid; j++) {
307 if (des.idVendor == dev_profiles[j].orig_vid
308 && des.idProduct == dev_profiles[j].orig_pid) {
309 /* Device matches the pre-firmware profile. */
310 prof = &dev_profiles[j];
e98b7f1b 311 sr_dbg("Found a %s %s.", prof->vendor, prof->model);
3b533202 312 sdi = dso_dev_new(devcnt, prof);
39cfdd75 313 devices = g_slist_append(devices, sdi);
269971dd 314 devc = sdi->priv;
3b533202
BV
315 if (ezusb_upload_firmware(devlist[i], USB_CONFIGURATION,
316 prof->firmware) == SR_OK)
317 /* Remember when the firmware on this device was updated */
269971dd 318 devc->fw_updated = g_get_monotonic_time();
3b533202 319 else
e98b7f1b
UH
320 sr_err("Firmware upload failed for "
321 "device %d.", devcnt);
3b533202 322 /* Dummy USB address of 0xff will get overwritten later. */
269971dd 323 devc->usb = sr_usb_dev_inst_new(
3b533202
BV
324 libusb_get_bus_number(devlist[i]), 0xff, NULL);
325 devcnt++;
326 break;
327 } else if (des.idVendor == dev_profiles[j].fw_vid
328 && des.idProduct == dev_profiles[j].fw_pid) {
329 /* Device matches the post-firmware profile. */
330 prof = &dev_profiles[j];
e98b7f1b 331 sr_dbg("Found a %s %s.", prof->vendor, prof->model);
3b533202
BV
332 sdi = dso_dev_new(devcnt, prof);
333 sdi->status = SR_ST_INACTIVE;
39cfdd75 334 devices = g_slist_append(devices, sdi);
269971dd
BV
335 devc = sdi->priv;
336 devc->usb = sr_usb_dev_inst_new(
3b533202
BV
337 libusb_get_bus_number(devlist[i]),
338 libusb_get_device_address(devlist[i]), NULL);
339 devcnt++;
340 break;
341 }
342 }
343 if (!prof)
344 /* not a supported VID/PID */
345 continue;
346 }
347 libusb_free_device_list(devlist, 1);
348
39cfdd75 349 return devices;
3b533202
BV
350}
351
811deee4
BV
352static GSList *hw_dev_list(void)
353{
354 struct drv_context *drvc;
355
356 drvc = hdi->priv;
357
358 return drvc->instances;
359}
360
25a0f108 361static int hw_dev_open(struct sr_dev_inst *sdi)
3b533202 362{
269971dd 363 struct dev_context *devc;
fc8fe3e3
BV
364 int64_t timediff_us, timediff_ms;
365 int err;
3b533202 366
269971dd 367 devc = sdi->priv;
3b533202
BV
368
369 /*
e98b7f1b
UH
370 * If the firmware was recently uploaded, wait up to MAX_RENUM_DELAY_MS
371 * for the FX2 to renumerate.
3b533202 372 */
fc8fe3e3 373 err = SR_ERR;
269971dd 374 if (devc->fw_updated > 0) {
e98b7f1b
UH
375 sr_info("Waiting for device to reset.");
376 /* Takes >= 300ms for the FX2 to be gone from the USB bus. */
3b533202 377 g_usleep(300 * 1000);
fc8fe3e3
BV
378 timediff_ms = 0;
379 while (timediff_ms < MAX_RENUM_DELAY_MS) {
25a0f108 380 if ((err = dso_open(sdi)) == SR_OK)
3b533202
BV
381 break;
382 g_usleep(100 * 1000);
269971dd 383 timediff_us = g_get_monotonic_time() - devc->fw_updated;
fc8fe3e3 384 timediff_ms = timediff_us / 1000;
e98b7f1b 385 sr_spew("Waited %" PRIi64 " ms.", timediff_ms);
3b533202 386 }
e98b7f1b 387 sr_info("Device came back after %d ms.", timediff_ms);
3b533202 388 } else {
25a0f108 389 err = dso_open(sdi);
3b533202
BV
390 }
391
392 if (err != SR_OK) {
e98b7f1b 393 sr_err("Unable to open device.");
3b533202
BV
394 return SR_ERR;
395 }
396
269971dd 397 err = libusb_claim_interface(devc->usb->devhdl, USB_INTERFACE);
3b533202 398 if (err != 0) {
e98b7f1b 399 sr_err("Unable to claim interface: %d.", err);
3b533202
BV
400 return SR_ERR;
401 }
402
403 return SR_OK;
404}
405
25a0f108 406static int hw_dev_close(struct sr_dev_inst *sdi)
3b533202 407{
3b533202
BV
408 dso_close(sdi);
409
410 return SR_OK;
411}
412
413static int hw_cleanup(void)
414{
269971dd
BV
415 struct drv_context *drvc;
416
417 if (!(drvc = hdi->priv))
418 return SR_OK;
3b533202 419
39cfdd75 420 clear_instances();
3b533202 421
19b0cce3 422 libusb_exit(NULL);
3b533202
BV
423
424 return SR_OK;
425}
426
0b79bcbb 427static int hw_info_get(int info_id, const void **data,
e98b7f1b 428 const struct sr_dev_inst *sdi)
3b533202 429{
3b533202
BV
430 uint64_t tmp;
431
6f57fd96
BV
432 (void)sdi;
433
0b79bcbb 434 switch (info_id) {
2ce9f046
BV
435 case SR_DI_HWCAPS:
436 *data = hwcaps;
437 break;
3b533202 438 case SR_DI_NUM_PROBES:
0b79bcbb 439 *data = GINT_TO_POINTER(NUM_PROBES);
3b533202
BV
440 break;
441 case SR_DI_PROBE_NAMES:
0b79bcbb 442 *data = probe_names;
3b533202 443 break;
a370ef19 444 case SR_DI_BUFFERSIZES:
0b79bcbb 445 *data = buffersizes;
a370ef19
BV
446 break;
447 case SR_DI_TIMEBASES:
0b79bcbb 448 *data = timebases;
a370ef19
BV
449 break;
450 case SR_DI_TRIGGER_SOURCES:
0b79bcbb 451 *data = trigger_sources;
a370ef19 452 break;
ebb781a6 453 case SR_DI_FILTERS:
0b79bcbb 454 *data = filter_targets;
ebb781a6 455 break;
313deed2 456 case SR_DI_VDIVS:
0b79bcbb 457 *data = vdivs;
313deed2 458 break;
4a090d72 459 case SR_DI_COUPLING:
0b79bcbb 460 *data = coupling;
4a090d72 461 break;
3b533202
BV
462 /* TODO remove this */
463 case SR_DI_CUR_SAMPLERATE:
0b79bcbb 464 *data = &tmp;
3b533202 465 break;
b0c8d7ac
BV
466 default:
467 return SR_ERR_ARG;
3b533202
BV
468 }
469
0b79bcbb 470 return SR_OK;
3b533202
BV
471}
472
6f4b1868 473static int hw_dev_config_set(const struct sr_dev_inst *sdi, int hwcap,
e98b7f1b 474 const void *value)
3b533202 475{
269971dd 476 struct dev_context *devc;
a370ef19
BV
477 struct sr_rational tmp_rat;
478 float tmp_float;
479 uint64_t tmp_u64;
480 int ret, i;
4a090d72 481 char **targets;
3b533202 482
3b533202
BV
483 if (sdi->status != SR_ST_ACTIVE)
484 return SR_ERR;
485
a370ef19 486 ret = SR_OK;
269971dd 487 devc = sdi->priv;
3b533202 488 switch (hwcap) {
ae88b97b 489 case SR_HWCAP_LIMIT_FRAMES:
269971dd 490 devc->limit_frames = *(const uint64_t *)value;
ae88b97b 491 break;
a370ef19 492 case SR_HWCAP_TRIGGER_SLOPE:
62bb8840 493 tmp_u64 = *(const int *)value;
a370ef19
BV
494 if (tmp_u64 != SLOPE_NEGATIVE && tmp_u64 != SLOPE_POSITIVE)
495 ret = SR_ERR_ARG;
269971dd 496 devc->triggerslope = tmp_u64;
a370ef19
BV
497 break;
498 case SR_HWCAP_HORIZ_TRIGGERPOS:
62bb8840 499 tmp_float = *(const float *)value;
a370ef19 500 if (tmp_float < 0.0 || tmp_float > 1.0) {
e98b7f1b 501 sr_err("Trigger position should be between 0.0 and 1.0.");
3b533202 502 ret = SR_ERR_ARG;
a370ef19 503 } else
269971dd 504 devc->triggerposition = tmp_float;
a370ef19
BV
505 break;
506 case SR_HWCAP_BUFFERSIZE:
62bb8840 507 tmp_u64 = *(const int *)value;
a370ef19
BV
508 for (i = 0; buffersizes[i]; i++) {
509 if (buffersizes[i] == tmp_u64) {
269971dd 510 devc->framesize = tmp_u64;
a370ef19
BV
511 break;
512 }
513 }
514 if (buffersizes[i] == 0)
515 ret = SR_ERR_ARG;
516 break;
517 case SR_HWCAP_TIMEBASE:
62bb8840 518 tmp_rat = *(const struct sr_rational *)value;
a370ef19
BV
519 for (i = 0; timebases[i].p && timebases[i].q; i++) {
520 if (timebases[i].p == tmp_rat.p
521 && timebases[i].q == tmp_rat.q) {
269971dd 522 devc->timebase = i;
a370ef19
BV
523 break;
524 }
525 }
526 if (timebases[i].p == 0 && timebases[i].q == 0)
527 ret = SR_ERR_ARG;
528 break;
529 case SR_HWCAP_TRIGGER_SOURCE:
a370ef19 530 for (i = 0; trigger_sources[i]; i++) {
4a090d72 531 if (!strcmp(value, trigger_sources[i])) {
269971dd 532 devc->triggersource = g_strdup(value);
a370ef19
BV
533 break;
534 }
535 }
536 if (trigger_sources[i] == 0)
537 ret = SR_ERR_ARG;
538 break;
ebb781a6 539 case SR_HWCAP_FILTER:
269971dd 540 devc->filter_ch1 = devc->filter_ch2 = devc->filter_trigger = 0;
ebb781a6
BV
541 targets = g_strsplit(value, ",", 0);
542 for (i = 0; targets[i]; i++) {
543 if (targets[i] == '\0')
544 /* Empty filter string can be used to clear them all. */
545 ;
546 else if (!strcmp(targets[i], "CH1"))
269971dd 547 devc->filter_ch1 = TRUE;
ebb781a6 548 else if (!strcmp(targets[i], "CH2"))
269971dd 549 devc->filter_ch2 = TRUE;
ebb781a6 550 else if (!strcmp(targets[i], "TRIGGER"))
269971dd 551 devc->filter_trigger = TRUE;
ebb781a6 552 else {
e98b7f1b 553 sr_err("Invalid filter target %s.", targets[i]);
ebb781a6
BV
554 ret = SR_ERR_ARG;
555 }
556 }
557 g_strfreev(targets);
558 break;
313deed2 559 case SR_HWCAP_VDIV:
e98b7f1b 560 /* TODO: Not supporting vdiv per channel yet. */
62bb8840 561 tmp_rat = *(const struct sr_rational *)value;
313deed2
BV
562 for (i = 0; vdivs[i].p && vdivs[i].q; i++) {
563 if (vdivs[i].p == tmp_rat.p
564 && vdivs[i].q == tmp_rat.q) {
269971dd
BV
565 devc->voltage_ch1 = i;
566 devc->voltage_ch2 = i;
313deed2
BV
567 break;
568 }
569 }
570 if (vdivs[i].p == 0 && vdivs[i].q == 0)
571 ret = SR_ERR_ARG;
572 break;
b58fbd99 573 case SR_HWCAP_COUPLING:
e98b7f1b 574 /* TODO: Not supporting coupling per channel yet. */
b58fbd99 575 for (i = 0; coupling[i]; i++) {
4a090d72 576 if (!strcmp(value, coupling[i])) {
269971dd
BV
577 devc->coupling_ch1 = i;
578 devc->coupling_ch2 = i;
b58fbd99
BV
579 break;
580 }
581 }
582 if (coupling[i] == 0)
583 ret = SR_ERR_ARG;
584 break;
3b533202
BV
585 default:
586 ret = SR_ERR_ARG;
e98b7f1b 587 break;
3b533202
BV
588 }
589
590 return ret;
591}
592
269971dd 593static void send_chunk(struct dev_context *devc, unsigned char *buf,
e749a8cb 594 int num_samples)
3b533202
BV
595{
596 struct sr_datafeed_packet packet;
597 struct sr_datafeed_analog analog;
c5841b28 598 float ch1, ch2, range;
6e71ef3b 599 int num_probes, data_offset, i;
3b533202 600
269971dd 601 num_probes = (devc->ch1_enabled && devc->ch2_enabled) ? 2 : 1;
3b533202
BV
602 packet.type = SR_DF_ANALOG;
603 packet.payload = &analog;
6e71ef3b 604 /* TODO: support for 5xxx series 9-bit samples */
e749a8cb 605 analog.num_samples = num_samples;
9956f285
UH
606 analog.mq = SR_MQ_VOLTAGE;
607 analog.unit = SR_UNIT_VOLT;
886a52b6 608 /* TODO: Check malloc return value. */
6e71ef3b
BV
609 analog.data = g_try_malloc(analog.num_samples * sizeof(float) * num_probes);
610 data_offset = 0;
3b533202 611 for (i = 0; i < analog.num_samples; i++) {
e98b7f1b
UH
612 /*
613 * The device always sends data for both channels. If a channel
6e71ef3b 614 * is disabled, it contains a copy of the enabled channel's
e98b7f1b
UH
615 * data. However, we only send the requested channels to
616 * the bus.
c5841b28 617 *
e98b7f1b
UH
618 * Voltage values are encoded as a value 0-255 (0-512 on the
619 * DSO-5200*), where the value is a point in the range
620 * represented by the vdiv setting. There are 8 vertical divs,
621 * so e.g. 500mV/div represents 4V peak-to-peak where 0 = -2V
622 * and 255 = +2V.
6e71ef3b 623 */
e98b7f1b 624 /* TODO: Support for DSO-5xxx series 9-bit samples. */
269971dd
BV
625 if (devc->ch1_enabled) {
626 range = ((float)vdivs[devc->voltage_ch1].p / vdivs[devc->voltage_ch1].q) * 8;
e749a8cb 627 ch1 = range / 255 * *(buf + i * 2 + 1);
c5841b28
BV
628 /* Value is centered around 0V. */
629 ch1 -= range / 2;
6e71ef3b
BV
630 analog.data[data_offset++] = ch1;
631 }
269971dd
BV
632 if (devc->ch2_enabled) {
633 range = ((float)vdivs[devc->voltage_ch2].p / vdivs[devc->voltage_ch2].q) * 8;
e749a8cb 634 ch2 = range / 255 * *(buf + i * 2);
c5841b28 635 ch2 -= range / 2;
6e71ef3b
BV
636 analog.data[data_offset++] = ch2;
637 }
3b533202 638 }
269971dd 639 sr_session_send(devc->cb_data, &packet);
e749a8cb
BV
640}
641
e98b7f1b
UH
642/*
643 * Called by libusb (as triggered by handle_event()) when a transfer comes in.
e749a8cb 644 * Only channel data comes in asynchronously, and all transfers for this are
e98b7f1b 645 * queued up beforehand, so this just needs to chuck the incoming data onto
e749a8cb
BV
646 * the libsigrok session bus.
647 */
648static void receive_transfer(struct libusb_transfer *transfer)
649{
650 struct sr_datafeed_packet packet;
269971dd 651 struct dev_context *devc;
e749a8cb
BV
652 int num_samples, pre;
653
269971dd 654 devc = transfer->user_data;
e98b7f1b
UH
655 sr_dbg("receive_transfer(): status %d received %d bytes.",
656 transfer->status, transfer->actual_length);
e749a8cb
BV
657
658 if (transfer->actual_length == 0)
659 /* Nothing to send to the bus. */
660 return;
661
662 num_samples = transfer->actual_length / 2;
663
e98b7f1b
UH
664 sr_dbg("Got %d-%d/%d samples in frame.", devc->samp_received + 1,
665 devc->samp_received + num_samples, devc->framesize);
e749a8cb 666
e98b7f1b
UH
667 /*
668 * The device always sends a full frame, but the beginning of the frame
e749a8cb
BV
669 * doesn't represent the trigger point. The offset at which the trigger
670 * happened came in with the capture state, so we need to start sending
e98b7f1b
UH
671 * from there up the session bus. The samples in the frame buffer
672 * before that trigger point came after the end of the device's frame
673 * buffer was reached, and it wrapped around to overwrite up until the
674 * trigger point.
e749a8cb 675 */
269971dd 676 if (devc->samp_received < devc->trigger_offset) {
e749a8cb 677 /* Trigger point not yet reached. */
269971dd 678 if (devc->samp_received + num_samples < devc->trigger_offset) {
e749a8cb 679 /* The entire chunk is before the trigger point. */
269971dd 680 memcpy(devc->framebuf + devc->samp_buffered * 2,
e749a8cb 681 transfer->buffer, num_samples * 2);
269971dd 682 devc->samp_buffered += num_samples;
e749a8cb 683 } else {
e98b7f1b
UH
684 /*
685 * This chunk hits or overruns the trigger point.
e749a8cb 686 * Store the part before the trigger fired, and
e98b7f1b
UH
687 * send the rest up to the session bus.
688 */
269971dd
BV
689 pre = devc->trigger_offset - devc->samp_received;
690 memcpy(devc->framebuf + devc->samp_buffered * 2,
e749a8cb 691 transfer->buffer, pre * 2);
269971dd 692 devc->samp_buffered += pre;
e749a8cb
BV
693
694 /* The rest of this chunk starts with the trigger point. */
e98b7f1b
UH
695 sr_dbg("Reached trigger point, %d samples buffered.",
696 devc->samp_buffered);
e749a8cb
BV
697
698 /* Avoid the corner case where the chunk ended at
699 * exactly the trigger point. */
700 if (num_samples > pre)
269971dd 701 send_chunk(devc, transfer->buffer + pre * 2,
e749a8cb
BV
702 num_samples - pre);
703 }
704 } else {
705 /* Already past the trigger point, just send it all out. */
269971dd 706 send_chunk(devc, transfer->buffer,
e749a8cb
BV
707 num_samples);
708 }
709
269971dd 710 devc->samp_received += num_samples;
e749a8cb
BV
711
712 /* Everything in this transfer was either copied to the buffer or
713 * sent to the session bus. */
3b533202
BV
714 g_free(transfer->buffer);
715 libusb_free_transfer(transfer);
3b533202 716
269971dd 717 if (devc->samp_received >= devc->framesize) {
e749a8cb
BV
718 /* That was the last chunk in this frame. Send the buffered
719 * pre-trigger samples out now, in one big chunk. */
e98b7f1b
UH
720 sr_dbg("End of frame, sending %d pre-trigger buffered samples.",
721 devc->samp_buffered);
269971dd 722 send_chunk(devc, devc->framebuf, devc->samp_buffered);
e749a8cb
BV
723
724 /* Mark the end of this frame. */
ae88b97b 725 packet.type = SR_DF_FRAME_END;
269971dd 726 sr_session_send(devc->cb_data, &packet);
ae88b97b 727
269971dd 728 if (devc->limit_frames && ++devc->num_frames == devc->limit_frames) {
ae88b97b 729 /* Terminate session */
a3508e33 730 devc->dev_state = STOPPING;
ae88b97b 731 } else {
269971dd 732 devc->dev_state = NEW_CAPTURE;
ae88b97b
BV
733 }
734 }
3b533202
BV
735}
736
737static int handle_event(int fd, int revents, void *cb_data)
738{
a3508e33 739 const struct sr_dev_inst *sdi;
ae88b97b 740 struct sr_datafeed_packet packet;
3b533202 741 struct timeval tv;
269971dd 742 struct dev_context *devc;
a3508e33
BV
743 const struct libusb_pollfd **lupfd;
744 int num_probes, i;
6e6eeff4
BV
745 uint32_t trigger_offset;
746 uint8_t capturestate;
3b533202 747
3b533202
BV
748 (void)fd;
749 (void)revents;
750
269971dd
BV
751 sdi = cb_data;
752 devc = sdi->priv;
a3508e33
BV
753 if (devc->dev_state == STOPPING) {
754 /* We've been told to wind up the acquisition. */
e98b7f1b
UH
755 sr_dbg("Stopping acquisition.");
756 /*
757 * TODO: Doesn't really cancel pending transfers so they might
758 * come in after SR_DF_END is sent.
759 */
19b0cce3 760 lupfd = libusb_get_pollfds(NULL);
a3508e33
BV
761 for (i = 0; lupfd[i]; i++)
762 sr_source_remove(lupfd[i]->fd);
763 free(lupfd);
764
765 packet.type = SR_DF_END;
766 sr_session_send(sdi, &packet);
767
768 devc->dev_state = IDLE;
769
770 return TRUE;
771 }
772
3b533202
BV
773 /* Always handle pending libusb events. */
774 tv.tv_sec = tv.tv_usec = 0;
19b0cce3 775 libusb_handle_events_timeout(NULL, &tv);
3b533202 776
3b533202 777 /* TODO: ugh */
269971dd
BV
778 if (devc->dev_state == NEW_CAPTURE) {
779 if (dso_capture_start(devc) != SR_OK)
3b533202 780 return TRUE;
269971dd 781 if (dso_enable_trigger(devc) != SR_OK)
3b533202 782 return TRUE;
269971dd 783// if (dso_force_trigger(devc) != SR_OK)
a370ef19 784// return TRUE;
e98b7f1b 785 sr_dbg("Successfully requested next chunk.");
269971dd 786 devc->dev_state = CAPTURE;
3b533202
BV
787 return TRUE;
788 }
269971dd 789 if (devc->dev_state != CAPTURE)
3b533202
BV
790 return TRUE;
791
269971dd 792 if ((dso_get_capturestate(devc, &capturestate, &trigger_offset)) != SR_OK)
3b533202 793 return TRUE;
3b533202 794
e98b7f1b
UH
795 sr_dbg("Capturestate %d.", capturestate);
796 sr_dbg("Trigger offset 0x%.6x.", trigger_offset);
3b533202
BV
797 switch (capturestate) {
798 case CAPTURE_EMPTY:
269971dd
BV
799 if (++devc->capture_empty_count >= MAX_CAPTURE_EMPTY) {
800 devc->capture_empty_count = 0;
801 if (dso_capture_start(devc) != SR_OK)
3b533202 802 break;
269971dd 803 if (dso_enable_trigger(devc) != SR_OK)
3b533202 804 break;
269971dd 805// if (dso_force_trigger(devc) != SR_OK)
a370ef19 806// break;
e98b7f1b 807 sr_dbg("Successfully requested next chunk.");
3b533202
BV
808 }
809 break;
810 case CAPTURE_FILLING:
e98b7f1b 811 /* No data yet. */
3b533202
BV
812 break;
813 case CAPTURE_READY_8BIT:
e749a8cb 814 /* Remember where in the captured frame the trigger is. */
269971dd 815 devc->trigger_offset = trigger_offset;
e749a8cb 816
269971dd 817 num_probes = (devc->ch1_enabled && devc->ch2_enabled) ? 2 : 1;
886a52b6 818 /* TODO: Check malloc return value. */
269971dd
BV
819 devc->framebuf = g_try_malloc(devc->framesize * num_probes * 2);
820 devc->samp_buffered = devc->samp_received = 0;
e749a8cb 821
3b533202 822 /* Tell the scope to send us the first frame. */
269971dd 823 if (dso_get_channeldata(devc, receive_transfer) != SR_OK)
3b533202 824 break;
ae88b97b 825
e98b7f1b
UH
826 /*
827 * Don't hit the state machine again until we're done fetching
ae88b97b
BV
828 * the data we just told the scope to send.
829 */
269971dd 830 devc->dev_state = FETCH_DATA;
ae88b97b
BV
831
832 /* Tell the frontend a new frame is on the way. */
833 packet.type = SR_DF_FRAME_BEGIN;
269971dd 834 sr_session_send(sdi, &packet);
3b533202
BV
835 break;
836 case CAPTURE_READY_9BIT:
837 /* TODO */
e98b7f1b 838 sr_err("Not yet supported.");
3b533202
BV
839 break;
840 case CAPTURE_TIMEOUT:
841 /* Doesn't matter, we'll try again next time. */
842 break;
843 default:
e98b7f1b
UH
844 sr_dbg("Unknown capture state: %d.", capturestate);
845 break;
3b533202
BV
846 }
847
848 return TRUE;
849}
850
3ffb6964 851static int hw_dev_acquisition_start(const struct sr_dev_inst *sdi,
e98b7f1b 852 void *cb_data)
3b533202
BV
853{
854 const struct libusb_pollfd **lupfd;
855 struct sr_datafeed_packet packet;
856 struct sr_datafeed_header header;
857 struct sr_datafeed_meta_analog meta;
269971dd 858 struct dev_context *devc;
3b533202
BV
859 int i;
860
3b533202
BV
861 if (sdi->status != SR_ST_ACTIVE)
862 return SR_ERR;
863
269971dd
BV
864 devc = sdi->priv;
865 devc->cb_data = cb_data;
3b533202 866
014359e3 867 if (configure_probes(sdi) != SR_OK) {
e98b7f1b 868 sr_err("Failed to configure probes.");
014359e3
BV
869 return SR_ERR;
870 }
871
269971dd 872 if (dso_init(devc) != SR_OK)
3b533202
BV
873 return SR_ERR;
874
269971dd 875 if (dso_capture_start(devc) != SR_OK)
3b533202
BV
876 return SR_ERR;
877
269971dd 878 devc->dev_state = CAPTURE;
19b0cce3 879 lupfd = libusb_get_pollfds(NULL);
3b533202 880 for (i = 0; lupfd[i]; i++)
e98b7f1b
UH
881 sr_source_add(lupfd[i]->fd, lupfd[i]->events, TICK,
882 handle_event, (void *)sdi);
3b533202
BV
883 free(lupfd);
884
885 /* Send header packet to the session bus. */
886 packet.type = SR_DF_HEADER;
887 packet.payload = (unsigned char *)&header;
888 header.feed_version = 1;
889 gettimeofday(&header.starttime, NULL);
890 sr_session_send(cb_data, &packet);
891
892 /* Send metadata about the SR_DF_ANALOG packets to come. */
893 packet.type = SR_DF_META_ANALOG;
894 packet.payload = &meta;
88a13f30 895 meta.num_probes = NUM_PROBES;
3b533202
BV
896 sr_session_send(cb_data, &packet);
897
898 return SR_OK;
899}
900
69b07d14 901static int hw_dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data)
3b533202 902{
269971dd
BV
903 struct dev_context *devc;
904
905 (void)cb_data;
3b533202 906
3b533202
BV
907 if (sdi->status != SR_ST_ACTIVE)
908 return SR_ERR;
909
a3508e33
BV
910 devc = sdi->priv;
911 devc->dev_state = STOPPING;
3b533202
BV
912
913 return SR_OK;
914}
915
62bb8840 916SR_PRIV struct sr_dev_driver hantek_dso_driver_info = {
3b533202
BV
917 .name = "hantek-dso",
918 .longname = "Hantek DSO",
919 .api_version = 1,
920 .init = hw_init,
921 .cleanup = hw_cleanup,
61136ea6 922 .scan = hw_scan,
811deee4
BV
923 .dev_list = hw_dev_list,
924 .dev_clear = clear_instances,
3b533202
BV
925 .dev_open = hw_dev_open,
926 .dev_close = hw_dev_close,
0b79bcbb 927 .info_get = hw_info_get,
3b533202 928 .dev_config_set = hw_dev_config_set,
62bb8840
UH
929 .dev_acquisition_start = hw_dev_acquisition_start,
930 .dev_acquisition_stop = hw_dev_acquisition_stop,
269971dd 931 .priv = NULL,
3b533202 932};