2 * This file is part of the fx2lafw project.
4 * Copyright (C) 2011-2012 Uwe Hermann <uwe@hermann-uwe.de>
5 * Copyright (C) 2012 Joel Holdsworth <joel@airwebreathe.org.uk>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
23 #include <fx2macros.h>
28 #include <gpif-acquisition.h>
30 static void gpif_reset_waveforms(void)
38 for (i = 0; i < 128; i++)
42 static void gpif_setup_registers(void)
44 /* TODO. Value probably irrelevant, as we don't use RDY* signals? */
48 * Set TRICTL = 0, thus CTL0-CTL5 are CMOS outputs.
49 * TODO: Probably irrelevant, as we don't use CTL0-CTL5?
53 /* When GPIF is idle, tri-state the data bus. */
54 /* Bit 7: DONE, bit 0: IDLEDRV. TODO: Set/clear DONE bit? */
55 GPIFIDLECS = (1 << 0);
57 /* When GPIF is idle, set CTL0-CTL5 to 0. */
61 * Map index 0 in WAVEDATA to FIFORD. The rest is assigned too,
64 * GPIFWFSELECT: [7:6] = SINGLEWR index, [5:4] = SINGLERD index,
65 * [3:2] = FIFOWR index, [1:0] = FIFORD index
67 GPIFWFSELECT = (0x3 << 6) | (0x2 << 4) | (0x1 << 2) | (0x0 << 0);
69 /* Contains RDY* pin values. Read-only according to TRM. */
73 static void gpif_init_addr_pins(void)
76 * Configure the 9 GPIF address pins (GPIFADR[8:0], which consist of
77 * PORTC[7:0] and PORTE[7]), and output an initial address (zero).
78 * TODO: Probably irrelevant, the 56pin FX2 has no ports C and E.
80 PORTCCFG = 0xff; /* Set PORTC[7:0] as alt. func. (GPIFADR[7:0]). */
81 OEC = 0xff; /* Configure PORTC[7:0] as outputs. */
82 PORTECFG |= 0x80; /* Set PORTE[7] as alt. func. (GPIFADR[8]). */
83 OEE |= 0x80; /* Configure PORTE[7] as output. */
85 GPIFADRL = 0x00; /* Clear GPIFADR[7:0]. */
87 GPIFADRH = 0x00; /* Clear GPIFADR[8]. */
90 static void gpif_init_flowstates(void)
92 /* Clear all flowstate registers, we don't use this functionality. */
103 void gpif_init_la(void)
106 * Setup the FX2 in GPIF master mode, using the internal clock
107 * (non-inverted) at 48MHz, and using async sampling.
111 /* Abort currently executing GPIF waveform (if any). */
114 /* Setup the GPIF registers. */
115 gpif_setup_registers();
117 /* Reset WAVEDATA. */
118 gpif_reset_waveforms();
120 /* Initialize GPIF address pins, output initial values. */
121 gpif_init_addr_pins();
123 /* Initialize flowstate registers (not used by us). */
124 gpif_init_flowstates();
127 void gpif_acquisition_start(const struct cmd_start_acquisition *cmd)
129 xdata volatile BYTE *pSTATE;
131 /* Set IFCONFIG to the correct clock source */
132 if(cmd->flags & CMD_START_FLAGS_CLK_48MHZ) {
133 IFCONFIG = bmIFCLKSRC |
140 IFCONFIG = bmIFCLKSRC |
147 /* GPIF terminology: DP = decision point, NDP = non-decision-point */
151 * This is the basic algorithm implemented in our GPIF state machine:
153 * State 0: NDP: Sample the FIFO data bus.
154 * State 1: DP: If EP2 is full, go to state 7 (the IDLE state), i.e.,
155 * end the current waveform. Otherwise, go to state 0 again,
156 * i.e., sample data until EP2 is full.
165 pSTATE = &GPIF_WAVE_DATA;
166 pSTATE[0] = cmd->sample_delay;
172 pSTATE = &GPIF_WAVE_DATA + 1;
178 /* Populate Reserved Words */
179 pSTATE = &GPIF_WAVE_DATA + 7;
187 /* Perform the initial GPIF read. */
188 gpif_fifo_read(GPIF_EP2);