2 * This file is part of the fx2lafw project.
4 * Copyright (C) 2011-2012 Uwe Hermann <uwe@hermann-uwe.de>
5 * Copyright (C) 2012 Joel Holdsworth <joel@airwebreathe.org.uk>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
24 #include <fx2macros.h>
29 #include <gpif-acquisition.h>
33 static void gpif_reset_waveforms(void)
41 for (i = 0; i < 128; i++)
45 static void gpif_setup_registers(void)
47 /* TODO. Value probably irrelevant, as we don't use RDY* signals? */
51 * Set TRICTL = 0, thus CTL0-CTL5 are CMOS outputs.
52 * TODO: Probably irrelevant, as we don't use CTL0-CTL5?
56 /* When GPIF is idle, tri-state the data bus. */
57 /* Bit 7: DONE, bit 0: IDLEDRV. TODO: Set/clear DONE bit? */
58 GPIFIDLECS = (1 << 0);
60 /* When GPIF is idle, set CTL0-CTL5 to 0. */
64 * Map index 0 in WAVEDATA to FIFORD. The rest is assigned too,
67 * GPIFWFSELECT: [7:6] = SINGLEWR index, [5:4] = SINGLERD index,
68 * [3:2] = FIFOWR index, [1:0] = FIFORD index
70 GPIFWFSELECT = (0x3 << 6) | (0x2 << 4) | (0x1 << 2) | (0x0 << 0);
72 /* Contains RDY* pin values. Read-only according to TRM. */
75 /* Make GPIF stop on transcation count not flag */
76 EP2GPIFPFSTOP = (0 << 0);
79 static void gpif_init_addr_pins(void)
82 * Configure the 9 GPIF address pins (GPIFADR[8:0], which consist of
83 * PORTC[7:0] and PORTE[7]), and output an initial address (zero).
84 * TODO: Probably irrelevant, the 56pin FX2 has no ports C and E.
86 PORTCCFG = 0xff; /* Set PORTC[7:0] as alt. func. (GPIFADR[7:0]). */
87 OEC = 0xff; /* Configure PORTC[7:0] as outputs. */
88 PORTECFG |= 0x80; /* Set PORTE[7] as alt. func. (GPIFADR[8]). */
89 OEE |= 0x80; /* Configure PORTE[7] as output. */
91 GPIFADRL = 0x00; /* Clear GPIFADR[7:0]. */
93 GPIFADRH = 0x00; /* Clear GPIFADR[8]. */
96 static void gpif_init_flowstates(void)
98 /* Clear all flowstate registers, we don't use this functionality. */
109 void gpif_init_la(void)
112 * Setup the FX2 in GPIF master mode, using the internal clock
113 * (non-inverted) at 48MHz, and using async sampling.
117 /* Abort currently executing GPIF waveform (if any). */
120 /* Setup the GPIF registers. */
121 gpif_setup_registers();
123 /* Reset WAVEDATA. */
124 gpif_reset_waveforms();
126 /* Initialize GPIF address pins, output initial values. */
127 gpif_init_addr_pins();
129 /* Initialize flowstate registers (not used by us). */
130 gpif_init_flowstates();
132 /* Reset the status */
133 gpif_acquiring = FALSE;
136 void gpif_acquisition_start(const struct cmd_start_acquisition *cmd)
138 xdata volatile BYTE *pSTATE;
140 /* Ensure GPIF is idle before reconfiguration */
141 while(!(GPIFTRIG & 0x80));
143 /* Set IFCONFIG to the correct clock source */
144 if(cmd->flags & CMD_START_FLAGS_CLK_48MHZ) {
145 IFCONFIG = bmIFCLKSRC |
152 IFCONFIG = bmIFCLKSRC |
159 /* GPIF terminology: DP = decision point, NDP = non-decision-point */
163 * This is the basic algorithm implemented in our GPIF state machine:
165 * State 0: NDP: Sample the FIFO data bus.
166 * State 1: DP: If EP2 is full, go to state 7 (the IDLE state), i.e.,
167 * end the current waveform. Otherwise, go to state 0 again,
168 * i.e., sample data until EP2 is full.
177 pSTATE = &GPIF_WAVE_DATA;
180 * Delay cmd->sample_delay clocks.
182 pSTATE[0] = cmd->sample_delay;
185 * SGL=0, GIN=0, INCAD=0, NEXT=0, DATA=1, DP=0
186 * Collect data in this state.
191 * OE[0:3]=0, CTL[0:3]=0
200 /* Populate S1 - the decision point */
201 pSTATE = &GPIF_WAVE_DATA + 1;
204 * Branch to IDLE if condition is true, back to S0 otherwise
206 pSTATE[0] = (7 << 3) | (0 << 0);
209 * SGL=0, GIN=0, INCAD=0, NEXT=0, DATA=0, DP=1
211 pSTATE[8] = (1 << 0);
214 * OE[0:3]=0, CTL[0:3]=0
219 * Evaluate if the FIFO full flag is set.
220 * LFUNC=0 (AND), TERMA=6 (FIFO Flag), TERMB=6 (FIFO Flag)
222 pSTATE[24] = (6 << 3) | (6 << 0);
224 /* Execute the whole GPIF waveform once */
227 /* Perform the initial GPIF read. */
228 gpif_fifo_read(GPIF_EP2);
230 /* Update the status */
231 gpif_acquiring = TRUE;
236 /* Detect if acquisition has completed */
237 if(gpif_acquiring && (GPIFTRIG & 0x80))
239 /* Activate NAK-ALL to avoid race conditions */
243 /* Switch to manual mode */
251 /* Return to auto mode */
252 EP2FIFOCFG = bmAUTOIN;
255 /* Release NAK-ALL */
259 gpif_acquiring = FALSE;