2 * This file is part of the sigrok-firmware-fx2lafw project.
4 * Copyright (C) 2011-2012 Uwe Hermann <uwe@hermann-uwe.de>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see <http://www.gnu.org/licenses/>.
21 * fx2lafw is an open-source firmware for Cypress FX2 based logic analyzers.
23 * It is written in C, using fx2lib as helper library, and sdcc as compiler.
24 * The code is licensed under the terms of the GNU GPL, version 2 or later.
28 * - We use the FX2 in GPIF mode to sample the data (asynchronously).
29 * - We use the internal 48MHz clock for GPIF.
30 * - The 8 channels/pins we sample (the GPIF data bus) are PB0-PB7,
31 * or PB0-PB7 + PD0-PD7 for 16-channel sampling.
32 * - Endpoint 2 (quad-buffered) is used for data transfers from FX2 to host.
36 * - See http://sigrok.org/wiki/Fx2lafw
40 #include <fx2macros.h>
48 #include <gpif-acquisition.h>
51 volatile __bit got_sud;
54 volatile WORD ledcounter = 1000;
56 extern __bit gpif_acquiring;
58 static void setup_endpoints(void)
61 EP2CFG = (1 << 7) | /* EP is valid/activated */
62 (1 << 6) | /* EP direction: IN */
63 (1 << 5) | (0 << 4) | /* EP Type: bulk */
64 (1 << 3) | /* EP buffer size: 1024 */
65 (0 << 2) | /* Reserved. */
66 (0 << 1) | (0 << 0); /* EP buffering: quad buffering */
69 /* Disable all other EPs (EP1, EP4, EP6, and EP8). */
72 EP1OUTCFG &= ~bmVALID;
81 /* EP2: Reset the FIFOs. */
82 /* Note: RESETFIFO() gets the EP number WITHOUT bit 7 set/cleared. */
85 /* EP2: Enable AUTOIN mode. Set FIFO width to 8bits. */
86 EP2FIFOCFG = bmAUTOIN;
89 /* EP2: Auto-commit 512 (0x200) byte packets (due to AUTOIN = 1). */
95 /* EP2: Set the GPIF flag to 'full'. */
96 EP2GPIFFLGSEL = (1 << 1) | (0 << 1);
100 static void send_fw_version(void)
102 /* Populate the buffer. */
103 struct version_info *const vi = (struct version_info *)EP0BUF;
104 vi->major = FX2LAFW_VERSION_MAJOR;
105 vi->minor = FX2LAFW_VERSION_MINOR;
107 /* Send the message. */
109 EP0BCL = sizeof(struct version_info);
112 static void send_revid_version(void)
116 /* Populate the buffer. */
117 p = (uint8_t *)EP0BUF;
120 /* Send the message. */
125 BOOL handle_vendorcommand(BYTE cmd)
127 /* Protocol implementation */
130 vendor_command = cmd;
133 case CMD_GET_FW_VERSION:
136 case CMD_GET_REVID_VERSION:
137 send_revid_version();
144 BOOL handle_get_interface(BYTE ifc, BYTE *alt_ifc)
146 /* We only support interface 0, alternate interface 0. */
154 BOOL handle_set_interface(BYTE ifc, BYTE alt_ifc)
156 /* We only support interface 0, alternate interface 0. */
157 if (ifc != 0 || alt_ifc != 0)
160 /* Perform procedure from TRM, section 2.3.7: */
164 /* (2) Reset data toggles of the EPs in the interface. */
165 /* Note: RESETTOGGLE() gets the EP number WITH bit 7 set/cleared. */
168 /* (3) Restore EPs to their default conditions. */
169 /* Note: RESETFIFO() gets the EP number WITHOUT bit 7 set/cleared. */
173 /* (4) Clear the HSNAK bit. Not needed, fx2lib does this. */
178 BYTE handle_get_configuration(void)
180 /* We only support configuration 1. */
184 BOOL handle_set_configuration(BYTE cfg)
186 /* We only support configuration 1. */
187 return (cfg == 1) ? TRUE : FALSE;
190 void sudav_isr(void) __interrupt SUDAV_ISR
196 void usbreset_isr(void) __interrupt USBRESET_ISR
198 handle_hispeed(FALSE);
202 void hispeed_isr(void) __interrupt HISPEED_ISR
204 handle_hispeed(TRUE);
208 void timer2_isr(void) __interrupt TF2_ISR
210 /* Blink LED during acquisition, keep it on otherwise. */
211 if (gpif_acquiring) {
212 if (--ledcounter == 0) {
217 PA1 = 1; /* LED on. */
222 void fx2lafw_init(void)
224 /* Set DYN_OUT and ENH_PKT bits, as recommended by the TRM. */
225 REVCTL = bmNOAUTOARM | bmSKIPCOMMIT;
237 /* TODO: Does the order of the following lines matter? */
242 /* PA1 (LED) is an output. */
245 PA1 = 1; /* LED on. */
248 RCAP2L = -500 & 0xff;
249 RCAP2H = (-500 & 0xff00) >> 8;
254 /* Global (8051) interrupt enable. */
257 /* Setup the endpoints. */
260 /* Put the FX2 into GPIF master mode and setup the GPIF. */
264 void fx2lafw_poll(void)
271 if (vendor_command) {
272 switch (vendor_command) {
274 if ((EP0CS & bmEPBUSY) != 0)
277 if (EP0BCL == sizeof(struct cmd_start_acquisition)) {
278 gpif_acquisition_start(
279 (const struct cmd_start_acquisition *)EP0BUF);
282 /* Acknowledge the vendor command. */
286 /* Unimplemented command. */