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e41576ec JH |
1 | /* |
2 | * This file is part of the fx2lafw project. | |
3 | * | |
4 | * Copyright (C) 2011-2012 Uwe Hermann <uwe@hermann-uwe.de> | |
5 | * Copyright (C) 2012 Joel Holdsworth <joel@airwebreathe.org.uk> | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation; either version 2 of the License, or | |
10 | * (at your option) any later version. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License | |
18 | * along with this program; if not, write to the Free Software | |
19 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | |
20 | */ | |
21 | ||
22 | #include <fx2regs.h> | |
23 | #include <fx2macros.h> | |
24 | #include <delay.h> | |
25 | #include <gpif.h> | |
26 | ||
27 | #include <fx2lafw.h> | |
28 | #include <gpif-acquisition.h> | |
29 | ||
421e7d6d JH |
30 | static void gpif_reset_waveforms(void) |
31 | { | |
32 | int i; | |
e41576ec | 33 | |
421e7d6d JH |
34 | /* Reset WAVEDATA. */ |
35 | AUTOPTRSETUP = 0x03; | |
36 | AUTOPTRH1 = 0xe4; | |
37 | AUTOPTRL1 = 0x00; | |
38 | for (i = 0; i < 128; i++) | |
39 | EXTAUTODAT1 = 0; | |
40 | } | |
e41576ec JH |
41 | |
42 | static void gpif_setup_registers(void) | |
43 | { | |
44 | /* TODO. Value probably irrelevant, as we don't use RDY* signals? */ | |
45 | GPIFREADYCFG = 0; | |
46 | ||
47 | /* | |
48 | * Set TRICTL = 0, thus CTL0-CTL5 are CMOS outputs. | |
49 | * TODO: Probably irrelevant, as we don't use CTL0-CTL5? | |
50 | */ | |
51 | GPIFCTLCFG = 0; | |
52 | ||
53 | /* When GPIF is idle, tri-state the data bus. */ | |
54 | /* Bit 7: DONE, bit 0: IDLEDRV. TODO: Set/clear DONE bit? */ | |
55 | GPIFIDLECS = (1 << 0); | |
56 | ||
57 | /* When GPIF is idle, set CTL0-CTL5 to 0. */ | |
58 | GPIFIDLECTL = 0; | |
59 | ||
60 | /* | |
421e7d6d | 61 | * Map index 0 in WAVEDATA to FIFORD. The rest is assigned too, |
e41576ec JH |
62 | * but not used by us. |
63 | * | |
64 | * GPIFWFSELECT: [7:6] = SINGLEWR index, [5:4] = SINGLERD index, | |
65 | * [3:2] = FIFOWR index, [1:0] = FIFORD index | |
66 | */ | |
67 | GPIFWFSELECT = (0x3 << 6) | (0x2 << 4) | (0x1 << 2) | (0x0 << 0); | |
68 | ||
69 | /* Contains RDY* pin values. Read-only according to TRM. */ | |
70 | GPIFREADYSTAT = 0; | |
71 | } | |
72 | ||
e41576ec JH |
73 | static void gpif_init_addr_pins(void) |
74 | { | |
75 | /* | |
76 | * Configure the 9 GPIF address pins (GPIFADR[8:0], which consist of | |
77 | * PORTC[7:0] and PORTE[7]), and output an initial address (zero). | |
78 | * TODO: Probably irrelevant, the 56pin FX2 has no ports C and E. | |
79 | */ | |
80 | PORTCCFG = 0xff; /* Set PORTC[7:0] as alt. func. (GPIFADR[7:0]). */ | |
81 | OEC = 0xff; /* Configure PORTC[7:0] as outputs. */ | |
82 | PORTECFG |= 0x80; /* Set PORTE[7] as alt. func. (GPIFADR[8]). */ | |
83 | OEE |= 0x80; /* Configure PORTE[7] as output. */ | |
84 | SYNCDELAY(); | |
85 | GPIFADRL = 0x00; /* Clear GPIFADR[7:0]. */ | |
86 | SYNCDELAY(); | |
87 | GPIFADRH = 0x00; /* Clear GPIFADR[8]. */ | |
88 | } | |
89 | ||
90 | static void gpif_init_flowstates(void) | |
91 | { | |
92 | /* Clear all flowstate registers, we don't use this functionality. */ | |
93 | FLOWSTATE = 0; | |
94 | FLOWLOGIC = 0; | |
95 | FLOWEQ0CTL = 0; | |
96 | FLOWEQ1CTL = 0; | |
97 | FLOWHOLDOFF = 0; | |
98 | FLOWSTB = 0; | |
99 | FLOWSTBEDGE = 0; | |
100 | FLOWSTBHPERIOD = 0; | |
101 | } | |
102 | ||
103 | void gpif_init_la(void) | |
104 | { | |
105 | /* | |
106 | * Setup the FX2 in GPIF master mode, using the internal clock | |
107 | * (non-inverted) at 48MHz, and using async sampling. | |
108 | */ | |
109 | IFCONFIG = 0xee; | |
110 | ||
111 | /* Abort currently executing GPIF waveform (if any). */ | |
112 | GPIFABORT = 0xff; | |
113 | ||
114 | /* Setup the GPIF registers. */ | |
115 | gpif_setup_registers(); | |
116 | ||
421e7d6d JH |
117 | /* Reset WAVEDATA. */ |
118 | gpif_reset_waveforms(); | |
e41576ec JH |
119 | |
120 | /* Initialize GPIF address pins, output initial values. */ | |
121 | gpif_init_addr_pins(); | |
122 | ||
123 | /* Initialize flowstate registers (not used by us). */ | |
124 | gpif_init_flowstates(); | |
125 | } | |
126 | ||
2846a114 | 127 | void gpif_acquisition_start(const struct cmd_start_acquisition *cmd) |
e41576ec | 128 | { |
421e7d6d JH |
129 | xdata volatile BYTE *pSTATE; |
130 | ||
2846a114 JH |
131 | IFCONFIG = (IFCONFIG & ~bm3048MHZ) | |
132 | ((cmd->flags & CMD_START_FLAGS_CLK_48MHZ) ? bm3048MHZ : 0); | |
133 | ||
421e7d6d JH |
134 | /* GPIF terminology: DP = decision point, NDP = non-decision-point */ |
135 | ||
136 | /* Populate WAVEDATA | |
137 | * | |
138 | * This is the basic algorithm implemented in our GPIF state machine: | |
139 | * | |
140 | * State 0: NDP: Sample the FIFO data bus. | |
141 | * State 1: DP: If EP2 is full, go to state 7 (the IDLE state), i.e., | |
142 | * end the current waveform. Otherwise, go to state 0 again, | |
143 | * i.e., sample data until EP2 is full. | |
144 | * State 2: Unused. | |
145 | * State 3: Unused. | |
146 | * State 4: Unused. | |
147 | * State 5: Unused. | |
148 | * State 6: Unused. | |
149 | */ | |
150 | ||
151 | /* Populate S0 */ | |
152 | pSTATE = &GPIF_WAVE_DATA; | |
2846a114 | 153 | pSTATE[0] = cmd->sample_delay; |
421e7d6d JH |
154 | pSTATE[8] = 0x02; |
155 | pSTATE[16] = 0x00; | |
156 | pSTATE[24] = 0x00; | |
157 | ||
158 | /* Populate S1 */ | |
159 | pSTATE = &GPIF_WAVE_DATA + 1; | |
160 | pSTATE[0] = 0x00; | |
161 | pSTATE[8] = 0x01; | |
162 | pSTATE[16] = 0x00; | |
163 | pSTATE[24] = 0x36; | |
164 | ||
165 | /* Populate Reserved Words */ | |
166 | pSTATE = &GPIF_WAVE_DATA + 7; | |
167 | pSTATE[0] = 0x07; | |
168 | pSTATE[8] = 0x00; | |
169 | pSTATE[16] = 0x00; | |
170 | pSTATE[24] = 0x3f; | |
171 | ||
172 | SYNCDELAY(); | |
173 | ||
e41576ec JH |
174 | /* Perform the initial GPIF read. */ |
175 | gpif_fifo_read(GPIF_EP2); | |
176 | } |