Currently, samples of different channels are combined into one data word. This corresponds to the data format of several logic analyzers (e.g. all simple FX2 based ones), but other hardware combines several consecutive samples of one channel in to a data word, and then interleaves the data of the enabled channels in round robin fashion, e.g. Saleae Logic 16, Logic Pro 16. Allowing a "planar" format (i.e. an independent data stream for each channel) for sample data has several benefits: - No repacking or simpler repacking for some devices - Easier data processing (e.g. edge detection) - Higher data density (no storage space for disabled channels)
The DSLogic sends data in 32-bit words. 32-bits from channel #1, 32-bits from channel #2 etc. in a round-robin through all the enabled channels.