HT USBee-AxPro
Revision as of 20:51, 24 May 2016 by Uwe Hermann (talk | contribs)
| Status | supported |
|---|---|
| Source code | fx2lafw |
| Channels | 8 |
| Samplerate | 24MHz |
| Samplerate (state) | — |
| Triggers | none (SW-only) |
| Min/max voltage |
Digital: -1V — +6V Analog: ±10V (±20V max) |
| Threshold voltage | Fixed: VIH=1.6V, VIL=1.4V |
| Memory | none |
| Compression | none |
The HT USBee-AxPro is a USB-based, 8-channel logic analyzer with up to 24MHz sampling rate, with 1 additional analog channel.
It is able to switch between USBee AX-Pro, Salea Logic and Altera USB blaster mode via a button. When pressing the button the USB VID/PID changes.
It is a clone of the CWAV USBee AX-Pro.
In sigrok, we use the open-source fx2lafw firmware for this logic analyzer.
Hardware
HT2013 V5.00:
- Main chip: Cypress CY7C68013A-56SSOP (FX2LP)
- 64Kbit I²C EEPROM: Microchip 24LC641
- 2Kbit I²C EEPROM: Microchip 24LC02B
- Auxiliary 8051 chip: ST STM8S003F3 (used for handling the button)
- Supply voltage regulator: Advanced Monolithic Systems AMS1117-3.3
- Analog-to-digital converter: Texas Instruments TLC5510I
- Analog input amplifiers: Analog Devices AD8065 (SMD marking "HRA")
- Analog amplifiers negative supply: Intersil ICL7660 (7660 AIBAZ V120428A)
- Crystal: 24MHz
FX2LP pin mappings
| # | Pin | Destination | Remark |
|---|---|---|---|
| CTL_2 | ADC_CLK | ADC clock | |
| PD0..7 | ADC_D1..8 | ADC data output |
HT_V6.0:
- ...
Photos
HT2013 V5.00:
HT_V6.0:
Protocol
Since we use the open-source fx2lafw firmware for this device, we don't need to know the protocol.