IKALOGIC ScanaPLUS
Revision as of 14:39, 30 May 2013 by Uwe Hermann (talk | contribs) (Add ICs, datasheets, markings. Fix various typos and errors. Add missing photo.)
Status | planned |
---|---|
Channels | 9 |
Samplerate | 100MHz |
Samplerate (state) | — |
Triggers | rising, falling, logic level, pulse width |
Min/max voltage | -35V — 35V |
Threshold voltage | configurable per channel-group: 1.2V, 1.5V, 1.8V, 2.8V, 3.3V to 5V |
Memory | — |
Compression | yes |
Website | ikalogic.com |
The Ikalogic ScanaPLUS is a USB-based, 9-channel logic analyzer with up to 100MHz sampling rate.
See Ikalogic ScanaPLUS/Info for more details (such as lsusb -vvv output) about the device.
Hardware
- FPGA with 1Mbit flash memory: Xilinx XC3S50AN (markings: "Xilinx Spartan XC3S50AN QTG144AGQ1301 D4518897A 4C") (datasheet)
- Hi-speed single-channel USB UART/FIFO: FTDI FT232H (markings: "FTDI D5RHQ.1 FT232HL 1230-B") (datasheet)
- 2x 4-bit dual-supply bus transceiver with configurable voltage translation & 3-state outputs: Texas Instruments SN74AVC4T774 (markings: "WT774 09K G4 CLS4") (datasheet)
- Low-power dual op-amp: ST LM358 (markings: "358 ET eZ022") (datasheet)
- 2Kbit Microwire EEPROM: Microchip 93LC56B (markings: "93LC56BI SN e3 1302 PVA") (datasheet)
- Dual 1.8V low-power push-pull output comparator: Microchip MCP6562 (markings: "MCP6562E SN e3 1301 RPH") (datasheet)
Photos
Protocol
TODO.