HT USBee-AxPro
 | |
| Status | supported |
|---|---|
| Source code | fx2lafw |
| Channels | 8 |
| Samplerate | 24MHz |
| Samplerate (state) | — |
| Triggers | none (SW-only) |
| Min/max voltage |
Digital: -1V — +6V Analog: ±10V (±20V max) |
| Threshold voltage | Fixed: VIH=1.6V, VIL=1.4V |
| Memory | none |
| Compression | none |
The HT USBee-AxPro is a USB-based, 8-channel logic analyzer with up to 24MHz sampling rate, with 1 additional analog channel.
It is able to switch between USBee AX-Pro, Salea Logic and Altera USB blaster mode via a button. When pressing the button the USB VID/PID changes.
It is a clone of the CWAV USBee AX-Pro.
In sigrok, we use the open-source fx2lafw firmware for this logic analyzer.
Hardware
HT2013 V5.00:
- Main chip: Cypress CY7C68013A-56SSOP (FX2LP)
- 64Kbit I²C EEPROM: Microchip 24LC641
- 2Kbit I²C EEPROM: Microchip 24LC02B
- Auxiliary 8051 chip: ST STM8S003F3 (used for handling the button)
- Supply voltage regulator: Advanced Monolithic Systems AMS1117-3.3
- Analog-to-digital converter: Texas Instruments TLC5510I
- Analog input amplifiers: Analog Devices AD8065 (SMD marking "HRA")
- Analog amplifiers negative supply: Intersil ICL7660 (7660 AIBAZ V120428A)
- Crystal: 24MHz
FX2LP pin mappings
| # | Pin | Destination | Remark |
|---|---|---|---|
| CTL2 | ADC_CLK | ADC clock | |
| PD0..7 | ADC_D1..8 | ADC data output |
HT_V6.0:
- ...
Pin mappings
The FX2 CTL2 and PD0..7 pins are mapped exactly like the HT2013 V5.00 version. The TLC5510I OE# pin is tied to GND.
Photos
HT2013 V5.00:
Device package
Case, front
Device
PCB, front
PCB, front
PCB, front
PCB, back
TLC5510I
STM8 1
STM8 2
Probe adaptor
FX2
Expansion board
AMS1117
7660
24LC64
24LC02B
HT_V6.0:
Package contents
Device, top
Device, bottom
Connector
USB
Analog adapter, top
Analog adapter, bottom
PCB, top
PCB, bottom
Cypress FX2
Microchip 24LC02B
TI TLC5510I
Intersil ICL7660S
AMS1117-3.3
HRA
24MHz crystal
Protocol
Since we use the open-source fx2lafw firmware for this device, we don't need to know the protocol.